JP4319291B2 - Epitaxial substrate for semiconductor light emitting device and light emitting device - Google Patents

Epitaxial substrate for semiconductor light emitting device and light emitting device Download PDF

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JP4319291B2
JP4319291B2 JP17248299A JP17248299A JP4319291B2 JP 4319291 B2 JP4319291 B2 JP 4319291B2 JP 17248299 A JP17248299 A JP 17248299A JP 17248299 A JP17248299 A JP 17248299A JP 4319291 B2 JP4319291 B2 JP 4319291B2
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layer
light emitting
epitaxial
emitting device
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JP2001007383A (en
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敦 吉永
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Showa Denko KK
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Showa Denko KK
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Description

【0001】
【発明の属する技術分野】
本発明は、赤外線を利用した光通信や空間伝送用に使用される高速・高出力赤外発光素子を作製するためのエピタキシャル基板及び、このエピタキシャル基板から作製された赤外発光素子に関する。
【0002】
【従来の技術】
GaxAl1-xAs(0<x<1)(以下、混晶比xを省略してGaAlAsと表示する)系化合物半導体を利用した発光素子(以下LED)は赤外から赤色用の光源として広く用いられている。赤外LEDは光通信や空間伝送用に使用されているが、伝送するデータの大容量化、伝送距離の長距離化に伴い、高出力・高速の赤外LEDへの要求が高くなっている。
【0003】
従来から知られているように、GaAlAs系LEDにおいて、シングルへテロ構造よりもダブルヘテロ構造(以下DH構造)の方が出力が高く、また基板を除去することでさらなる高出力化が図られている。
【0004】
基板を除去するタイプのエピタキシャル基板(以下DDH構造)を作製する際、通常のDH構造、即ちp型クラッド層、活性層、n型クラッド層の3層構造のみをエピタキシャル成長して基板除去するとエピタキシャル基板の全厚が薄くなり、素子化工程でのハンドリングが困難になると同時に、このエピタキシャル基板から作製する素子の底面からpn接合までの高さが低くなり、素子を導体に接着するときのペーストが素子側面を這い上がり、pn接合を短絡するという問題が発生する。これを防ぐために、基板除去後の仕上がりの全厚と素子底面から接合までの距離を稼ぐための第4のエピタキシャル層をDH構造に付加することがDDH構造では標準的な構成になっている。第4のエピタキシャル層はバンドギャップが活性層よりも広く、活性層の発光光を吸収しないように設計される。
【0005】
また、液相エピタキシャル法でGaAlAs層を成長する場合、Al組成が成長方向に向かって減少すること、Teのような分配係数の温度依存性が大きいドーパントを使用すると成長初期と終期のキャリヤ濃度が大きく異なってしまうことなどの理由から、この第4のエピタキシャル層は2層、あるいはそれ以上の複数層で構成させる方が、エピタキシャル層の設計が容易である。
【0006】
この第4のエピタキシャル層は、素子の全抵抗を抑えることを考慮すると、n型クラッド層側にn型層として付け加えることが有利である。これは、GaAs−AlAs系においては正孔よりも電子の方が移動度が10倍以上高く、キャリヤ濃度とAl組成が同一であればn型の方が抵抗が低くなるためである。
【0007】
n型クラッド層側にn型層を付加してp型クラッド層をLED表面側とする場合、図1に示すようにn型GaAs基板を使用してn型層からエピタキシャル成長を開始する場合と、図2のようにp型GaAs基板を使用してp型クラッド層から成長を開始する場合とが考えられる。
【0008】
p型GaAs基板を使用してp型クラッド層から成長を開始する場合、n型基板を使用してn型層から成長する場合と比較すると、pn接合形成温度が高くなる。このため、活性層のドーパントがn型クラッド層に拡散し、接合位置が冶金学的界面からn型クラッド層内にずれる。このような現象は活性層のドーパントに拡散エネルギーの小さいZnを使用する場合に顕著であり、赤色LED用エピタキシャルウエーハでは、むしろこれを利用して出力を向上させている。しかしながら、応答速度の高速化という観点からはこの現象は不利であり、接合界面は冶金学的界面からずれないことが望ましい。このため、活性層のドーパントにZnよりも拡散しにくいMgやGeを使用することが考えられるが、この場合でも高速化のために高濃度にドープされ、接合形成温度が高い場合には、p型基板上にp型クラッド層側から成長すると、この拡散現象が抑制されない。
【0009】
以上の点から、前記のn型クラッド層側にn型層を付加する構造を作製する場合は、n型基板上にn型層から成長する方が有利である。
【0010】
【発明が解決しようとする課題】
図1に示したように、n型GaAs基板上にn型層を付加したDDH構造を作製した場合、前記第1のn型GaAlAs層と第2のn型GaAlAs層の界面にp型反転層が発生し、サイリスタ不良が発生するという問題が生じる。また、素子を高速化するために活性層厚を1μm未満に設定したとき、発光出力が低下するという問題も発生した。
【0011】
本発明はこれらの問題を解決し、n型GaAs基板上にn型層を付加したDDH構造の高速・高出力でサイリスタ不良が発生しない赤外LEDを作製するためのエピタキシャル基板及びこのエピタキシャル基板から作製された赤外LEDを提供することを目的とする
【0012】
【課題を解決するための手段】
図1の構造において、サイリスタの発生原因について鋭意、研究を進めたところ、第2のn型GaAlAs層の成長開始位置から2μm以内の領域において、アクセプタ不純物である炭素の濃度がスパイク状に上昇しており、このスパイクのピーク濃度が1×1017cm-3以上になると、サイリスタの発生率が上昇することが明らかになった。
【0013】
従って、本願の第1の発明は、n型GaAs基板上に第1のn型GaAlAs層、第2のn型GaAlAs層、n型GaAlAsクラッド層、発光波長が850〜900nmになるように調整したp型GaAlAs活性層、及びp型GaAlAsクラッド層を液相エピタキシャル法により順次積層した後に、前記n型GaAs基板を除去することからなる半導体LED用エピタキシャル基板において、前記第2のn型層の前記第1のn型層との界面から2μm以内の炭素濃度の極大値が1×1017cm-3未満であることを特徴とする前記半導体LED用エピタキシャル基板を提供することにある。
【0014】
また、活性層を薄くして応答速度を速くした場合に出力が低下する原因は、n型クラッド層と活性層界面の非発光過程の割合が大きいことが考えられたが、その非発光過程が生じる原因について鋭意、研究を進めたところ、n型クラッド層の活性層との界面部分のAl組成比が0.25以上である場合に、活性層厚を薄くした場合に出力が低下すること、即ち非発光過程の割合が大きくなることを見出した。また、前記n型クラッド層の活性層との界面部分のAl組成比が0.12未満になると、活性層厚に拘わらず出力が下がることがわかった。
【0015】
従って、本願の第2の発明は、前記n型GaAlAsクラッド層とp型GaAlAs活性層との界面における前記n型GaAlAsクラッド層のAl組成比が0.25未満、かつ0.12以上であることを特徴とする前記請求項1に記載の半導体LED用エピタキシャル基板を提供することにある。
【0016】
また、本願の第3の発明は、上記の半導体LED用エピタキシャル基板を用いて作製した発光素子に関する。
【0017】
【実施例】
以下、実施例に基づいて本願発明を詳細に説明する。
(実施例)図3の治具を用いてエピタキシャル成長を行った。図3において、n型GaAs基板13はウエハーカセット14に垂直にセットされ、複数のウエハーカセットをホルダー15にセットする。ホルダー15は駆動機構(図示しない)により上下方向に移動できる。ルツボ台22には6つのルツボ16〜21がセットされる。ルツボ17は原料溶解中にn型GaAs基板13が熱劣化するのを防ぐための退避用空ルツボである。ルツボ21は前記第1のn型GaAlAs層、ルツボ20は前記第2のn型GaAlAs層、ルツボ19は前記n型GaAlAsクラッド層、ルツボ18は前記p型GaAlAs活性層、ルツボ16は前記p型GaAlAsクラッド層を成長するためのメルトがそれぞれ仕込まれている。各ルツボへの原料の仕込量は表1のとおりである。
【0018】
【表1】

Figure 0004319291
メルトの入っているルツボ(16、18〜21)はルツボ蓋23をメルト表面に浮かべてある。
【0019】
ルツボ16〜21、及びルツボ蓋23はグラッシーカーボン製であり、これら以外の治具は通常の黒鉛材を使用している。
【0020】
実際の成長は以下のようにして行った。図3の治具を石英反応管(図示しない)内にセットし、水素気流中で920℃まで加温し原料を溶解した。この間、ホルダー15は空のルツボ17内で保持した。続いて雰囲気温度を900℃まで降温し、ホルダー15を上昇させてからルツボ台22を図3の左側に押してルツボ21をホルダー15の下にセットした。次に、ホルダー15を下降してルツボ21にウエハを浸漬した。続いて雰囲気温度を0.5℃/分の速度で855℃まで降温して図1の第1のn型GaAlAs層を成長させた。次に、雰囲気温度を855℃に保持した状態でホルダー15を上昇させてメルトからウエハを分離した。次に、ルツボ台22を図3の右の方向へ引いて、ホルダー15の下にルツボ20をセットした後、ホルダー15を下降させてルツボ20内のメルトに浸漬した。次に雰囲気温度を855℃から850℃までは0.2℃/分、850℃から800℃までは0.5℃/分で降温することにより、図1の第2のn型GaAlAs層を成長させた。次に雰囲気温度を800℃に保持した状態で、前記と同様の操作でホルダー15をルツボ19に浸漬する。次に雰囲気温度を800℃から795℃までは0.2℃/分、795℃から725℃までは0.5℃/分で降温することにより、図1のn型GaAlAsクラッド層を成長させた。続いて725℃で15分温度を保持した後、ホルダー15を上昇させてルツボ台を移動、ルツボ18に浸漬する。引き続き、723℃まで0.5℃/分で降温し、ホルダーを上昇してメルトから分離する。ルツボ台を移動してホルダーをルツボ16に浸漬、723℃から670℃まで0.5℃/分で降温してp型GaAlAsクラッド層を成長させた。
【0021】
以上のようにして成長したエピタキシャル層の層厚、Al組成、キャリヤ濃度を表2に示す。
【0022】
【表2】
Figure 0004319291
エピタキシャル成長終了後、エピタキシャル基板を取り出し、図1のp型GaAlAsクラッド層表面を耐酸シートで保護してアンモニア−過酸化水素系エッチャントでn型GaAs基板を選択的に除去した。その後、エピタキシャル基板両面に電極を形成し、ダイシングで分離することにより、p型GaAlAsクラッド層が表面側となるようにした350μm角のLEDを作製した。
【0023】
(比較例1)実施例と同様じ条件でメルトを調整し、エピタキシャル成長を実施した。このとき、前記第2のn型GaAlAs層を成長させる際の855℃から850℃までの降温速度を0.10、0.15、0.25、0.30、0.35、0.40、0.45及び0.5℃/分の8水準とした。
【0024】
(比較例2)前記n型GaAlAsクラッド層のAl組成を変更するため、表1のルツボ19の仕込量を数水準かえたものについて、実施例と同様の方法でエピタキシャル成長しLEDを作製した。また、活性層厚を1μmに変更するために、前記実施例の725℃における15分の保持時間を10分に短縮したものについても前記Al組成を変更して実施した。
【0025】
図4に前記第2のn型GaAlAs層の前記第1のn型GaAlAs層との界面付近の炭素濃度をSIMS分析した結果を示す。第2のn型GaAlAsエピタキシャル層成長開始部分で、図に示したような炭素濃度のスパイクが発生していることがわかる。
【0026】
種々の検討を重ねた結果、このスパイクのピーク高さは第2のn型層の成長開始部分の成長速度に依存することが明らかになった。
【0027】
実施例と比較例1の条件で作製したLEDについてサイリスタ検査を実施した。
サイリスタ検査は、エピタキシャル成長したウエーハからLEDを作製し、LED10万個当たりのサイリスタチップを計数した。
【0028】
図5に実施例と比較例1で成長したウエーハの前記第2のn型層の前記第1のn型層との界面付近の炭素濃度スパイクのピーク濃度とサイリスタ発生率の関係を示す。この結果から、サイリスタを抑制するためには、この炭素濃度スパイクのピーク濃度が1×1017cm-3未満であればよく、これを実現するためには前記第2のn型GaAlAs層を成長させる際の855℃から850℃までの降温速度を0.2℃/分以下にすればよいことがわかった。
【0029】
実施例、及び比較例2の条件で成長したエピタキシャル基板を用いてLEDを作製し、その特性を比較した結果を図6に示す。この結果からn型クラッド層と活性層界面のnクラッド層側のAl組成比が0.25より大きいと、LED出力の絶対値がこのAl組成比が0.25の場合よりも小さく、活性層を薄くすると出力はむしろ低下することがわかる。また、このAl組成比が0.12未満になると、活性層を薄膜化することで出力は上昇するが、絶対値が小さくなることがわかる。
【0030】
従って、図6に示した出力の目標レベルを達成するためには前記界面のAl組成の最適値は0.12以上0.25未満であることが明らかになった。
【0031】
尚、何れのAl組成水準においても、LEDの応答速度は活性層が0.4μmの場合の方が1.0μmの場合よりも速く、活性層厚が0.4μmであれば目標値を達成できた。
【0032】
【発明の効果】
以上のようにして、本発明によればn型GaAs基板上にn型層を付加したDDH構造の高速・高出力でサイリスタ不良が発生しない赤外LEDを作製するためのエピタキシャル基板及びこのエピタキシャル基板から作製された赤外LEDを提供することができる。
【図面の簡単な説明】
【図1】本発明によるエピタキシャル構造の概略図である。
【図2】本発明によるエピタキシャル構造をp型GaAs基板から成長した例である。
【図3】エピタキシャル成長に用いた治具の概略図である。
【図4】第1のn型層と第2のn型層界面領域における炭素濃度プロファイルをSIMS分析した結果である。
【図5】第2のn型GaAlAs層の第1のn型GaAlAs層との界面に現れる炭素ピーク濃度とサイリスタ発生率の関係を示すものである。
【図6】n型GaAlAsクラッド層のp型GaAlAs活性層界面のAl組成と出力の関係を活性層厚をパラメータとして示したものである。
【符号の説明】
1 n型GaAs基板
2 第1のn型GaAlAs層
3 第2のn型GaAlAs層
4 n型GaAlAsクラッド層
5 p型GaAlAs活性層
6 p型GaAlAsクラッド層
7 p型GaAs基板
8 p型GaAlAsクラッド層
9 p型GaAlAs活性層
10 n型GaAlAsクラッド層
11 第2のn型GaAlAs層
12 第1のn型GaAlAs層
13 n型GaAs基板
14 ウエハーカセット
15 ホルダー
16 るつぼ
17 退避用空るつぼ
18 るつぼ
19 るつぼ
20 るつぼ
21 るつぼ
22 るつぼ台
23 るつぼ蓋[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an epitaxial substrate for producing a high-speed, high-power infrared light-emitting device used for optical communication and spatial transmission using infrared rays, and an infrared light-emitting device produced from the epitaxial substrate.
[0002]
[Prior art]
A light emitting element (hereinafter referred to as an LED) using a Ga x Al 1-x As (0 <x <1) (hereinafter referred to as GaAlAs by omitting the mixed crystal ratio x) type light source for infrared to red Is widely used. Infrared LEDs are used for optical communication and spatial transmission, but with the increase in the volume of data to be transmitted and the increase in transmission distance, the demand for high-power, high-speed infrared LEDs is increasing. .
[0003]
As is conventionally known, in a GaAlAs-based LED, a double hetero structure (hereinafter referred to as a DH structure) has a higher output than a single hetero structure, and a higher output can be achieved by removing the substrate. Yes.
[0004]
When producing an epitaxial substrate (hereinafter referred to as a DDH structure) of a type that removes the substrate, if the substrate is removed by epitaxial growth of only a normal DH structure, that is, a p-type cladding layer, an active layer, and an n-type cladding layer, the epitaxial substrate The total thickness of the device becomes thin, and handling in the device fabrication process becomes difficult. At the same time, the height from the bottom surface of the device manufactured from this epitaxial substrate to the pn junction is reduced, and the paste for bonding the device to the conductor is the device. The problem arises that the side surface is crawled and the pn junction is short-circuited. In order to prevent this, it is a standard configuration in the DDH structure that a fourth epitaxial layer is added to the DH structure in order to increase the total thickness after the substrate removal and the distance from the bottom of the device to the junction. The fourth epitaxial layer has a wider band gap than the active layer, and is designed not to absorb the light emitted from the active layer.
[0005]
In addition, when a GaAlAs layer is grown by liquid phase epitaxy, the Al composition decreases in the growth direction, and if a dopant having a large temperature dependence of the distribution coefficient such as Te is used, the carrier concentration at the initial and final stages of growth is increased. For reasons such as being greatly different, it is easier to design the epitaxial layer if the fourth epitaxial layer is composed of two or more layers.
[0006]
This fourth epitaxial layer is advantageously added as an n-type layer on the n-type cladding layer side in consideration of suppressing the total resistance of the element. This is because in the GaAs-AlAs system, the mobility of electrons is 10 times higher than that of holes, and the resistance of n-type is lower if the carrier concentration and the Al composition are the same.
[0007]
When an n-type layer is added to the n-type clad layer side to make the p-type clad layer the LED surface side, as shown in FIG. 1, when an epitaxial growth is started from the n-type layer using an n-type GaAs substrate, As shown in FIG. 2, it can be considered that growth is started from a p-type cladding layer using a p-type GaAs substrate.
[0008]
When growth is started from a p-type cladding layer using a p-type GaAs substrate, the pn junction formation temperature is higher than when growing from an n-type layer using an n-type substrate. For this reason, the dopant of the active layer diffuses into the n-type cladding layer, and the junction position shifts from the metallurgical interface into the n-type cladding layer. Such a phenomenon is remarkable when Zn having a small diffusion energy is used as the dopant of the active layer. In the epitaxial wafer for red LED, the output is improved by using this rather. However, this phenomenon is disadvantageous from the viewpoint of increasing the response speed, and it is desirable that the bonding interface does not deviate from the metallurgical interface. For this reason, it is conceivable to use Mg or Ge, which is less diffusible than Zn, as the dopant of the active layer. Even in this case, if the dopant is heavily doped for higher speed and the junction formation temperature is high, p. When growing on the mold substrate from the p-type cladding layer side, this diffusion phenomenon is not suppressed.
[0009]
From the above points, when producing a structure in which an n-type layer is added to the n-type cladding layer side, it is advantageous to grow from an n-type layer on an n-type substrate.
[0010]
[Problems to be solved by the invention]
As shown in FIG. 1, when a DDH structure in which an n-type layer is added on an n-type GaAs substrate is fabricated, a p-type inversion layer is formed at the interface between the first n-type GaAlAs layer and the second n-type GaAlAs layer. This causes a problem that a thyristor failure occurs. Further, when the active layer thickness is set to be less than 1 μm in order to increase the speed of the device, there is a problem that the light emission output is lowered.
[0011]
The present invention solves these problems, and an epitaxial substrate for producing an infrared LED having a high-speed and high-output DDH structure in which an n-type layer is added on an n-type GaAs substrate and no thyristor defect is generated. An object is to provide a fabricated infrared LED.
[Means for Solving the Problems]
In the structure of FIG. 1, earnestly researching the cause of thyristor generation, the concentration of carbon as an acceptor impurity spiked up in a region within 2 μm from the growth start position of the second n-type GaAlAs layer. It was found that when the spike peak concentration was 1 × 10 17 cm −3 or more, the thyristor generation rate increased.
[0013]
Therefore, in the first invention of the present application, the first n-type GaAlAs layer, the second n-type GaAlAs layer, the n-type GaAlAs cladding layer, and the emission wavelength are adjusted to 850 to 900 nm on the n-type GaAs substrate. In the epitaxial substrate for a semiconductor LED, in which the n-type GaAs substrate is removed after the p-type GaAlAs active layer and the p-type GaAlAs clad layer are sequentially laminated by a liquid phase epitaxial method, the second n-type layer of the second n-type layer An object of the present invention is to provide an epitaxial substrate for a semiconductor LED, wherein the maximum value of the carbon concentration within 2 μm from the interface with the first n-type layer is less than 1 × 10 17 cm −3 .
[0014]
The cause of the decrease in output when the response speed is increased by thinning the active layer was thought to be due to the large proportion of the non-light emission process at the interface between the n-type cladding layer and the active layer. As a result of earnest and research on the cause of the occurrence, when the Al composition ratio of the interface portion with the active layer of the n-type cladding layer is 0.25 or more, the output decreases when the active layer thickness is reduced, That is, it has been found that the ratio of the non-light emitting process increases. It was also found that when the Al composition ratio at the interface portion of the n-type cladding layer with the active layer was less than 0.12, the output decreased regardless of the active layer thickness.
[0015]
Therefore, in the second invention of the present application, the Al composition ratio of the n-type GaAlAs cladding layer at the interface between the n-type GaAlAs cladding layer and the p-type GaAlAs active layer is less than 0.25 and 0.12 or more. It is providing the epitaxial substrate for semiconductor LEDs of the said Claim 1 characterized by these.
[0016]
Moreover, 3rd invention of this application is related with the light emitting element produced using said epitaxial substrate for semiconductor LED.
[0017]
【Example】
Hereinafter, the present invention will be described in detail based on examples.
(Embodiment) Epitaxial growth was performed using the jig shown in FIG. In FIG. 3, an n-type GaAs substrate 13 is set perpendicularly to a wafer cassette 14, and a plurality of wafer cassettes are set in a holder 15. The holder 15 can be moved in the vertical direction by a drive mechanism (not shown). Six crucibles 16 to 21 are set on the crucible base 22. The crucible 17 is an empty crucible for evacuation for preventing the n-type GaAs substrate 13 from being thermally deteriorated during melting of the raw material. The crucible 21 is the first n-type GaAlAs layer, the crucible 20 is the second n-type GaAlAs layer, the crucible 19 is the n-type GaAlAs cladding layer, the crucible 18 is the p-type GaAlAs active layer, and the crucible 16 is the p-type. Melts for growing a GaAlAs cladding layer are respectively charged. The amount of raw materials charged into each crucible is shown in Table 1.
[0018]
[Table 1]
Figure 0004319291
The crucible (16, 18-21) containing the melt has a crucible lid 23 floating on the melt surface.
[0019]
The crucibles 16 to 21 and the crucible lid 23 are made of glassy carbon, and jigs other than these use ordinary graphite materials.
[0020]
Actual growth was performed as follows. The jig of FIG. 3 was set in a quartz reaction tube (not shown) and heated to 920 ° C. in a hydrogen stream to dissolve the raw material. During this time, the holder 15 was held in an empty crucible 17. Subsequently, the ambient temperature was lowered to 900 ° C., the holder 15 was raised, and the crucible base 22 was pushed to the left in FIG. 3 to set the crucible 21 under the holder 15. Next, the holder 15 was lowered and the wafer was immersed in the crucible 21. Subsequently, the temperature of the atmosphere was lowered to 855 ° C. at a rate of 0.5 ° C./min to grow the first n-type GaAlAs layer of FIG. Next, the wafer 15 was separated from the melt by raising the holder 15 while maintaining the atmospheric temperature at 855 ° C. Next, the crucible base 22 was pulled in the right direction of FIG. 3 to set the crucible 20 under the holder 15, and then the holder 15 was lowered and immersed in the melt in the crucible 20. Next, the second n-type GaAlAs layer of FIG. 1 is grown by lowering the ambient temperature from 855 ° C. to 850 ° C. by 0.2 ° C./min and from 850 ° C. to 800 ° C. by 0.5 ° C./min. I let you. Next, the holder 15 is immersed in the crucible 19 in the same manner as described above while maintaining the atmospheric temperature at 800 ° C. Next, the n-type GaAlAs cladding layer of FIG. 1 was grown by lowering the ambient temperature from 800 ° C. to 795 ° C. at 0.2 ° C./min and from 795 ° C. to 725 ° C. at 0.5 ° C./min. . Subsequently, after holding the temperature at 725 ° C. for 15 minutes, the holder 15 is raised and the crucible base is moved and immersed in the crucible 18. Subsequently, the temperature is lowered to 723 ° C. at 0.5 ° C./min, and the holder is raised and separated from the melt. The crucible base was moved, the holder was immersed in the crucible 16, and the temperature was lowered from 723 ° C. to 670 ° C. at a rate of 0.5 ° C./min to grow a p-type GaAlAs cladding layer.
[0021]
Table 2 shows the layer thickness, Al composition, and carrier concentration of the epitaxial layer grown as described above.
[0022]
[Table 2]
Figure 0004319291
After completion of the epitaxial growth, the epitaxial substrate was taken out, the surface of the p-type GaAlAs cladding layer in FIG. 1 was protected with an acid-resistant sheet, and the n-type GaAs substrate was selectively removed with an ammonia-hydrogen peroxide-based etchant. Thereafter, electrodes were formed on both surfaces of the epitaxial substrate, and separated by dicing, thereby producing 350 μm square LEDs with the p-type GaAlAs cladding layer on the surface side.
[0023]
(Comparative Example 1) The melt was adjusted under the same conditions as in the example, and epitaxial growth was carried out. At this time, the temperature decrease rate from 855 ° C. to 850 ° C. when the second n-type GaAlAs layer is grown is 0.10, 0.15, 0.25, 0.30, 0.35, 0.40, Eight levels were set at 0.45 and 0.5 ° C./min.
[0024]
(Comparative Example 2) In order to change the Al composition of the n-type GaAlAs cladding layer, an LED was fabricated by epitaxial growth in the same manner as in the Examples, except that the amount of crucible 19 in Table 1 was changed to several levels. Further, in order to change the active layer thickness to 1 μm, the Al composition was also changed for the example in which the holding time of 15 minutes at 725 ° C. in the above example was shortened to 10 minutes.
[0025]
FIG. 4 shows the result of SIMS analysis of the carbon concentration in the vicinity of the interface between the second n-type GaAlAs layer and the first n-type GaAlAs layer. It can be seen that a spike of carbon concentration as shown in the figure occurs in the second n-type GaAlAs epitaxial layer growth start portion.
[0026]
As a result of various studies, it has been clarified that the peak height of this spike depends on the growth rate of the growth start portion of the second n-type layer.
[0027]
A thyristor test was performed on the LEDs fabricated under the conditions of the example and the comparative example 1.
In the thyristor inspection, LEDs were produced from epitaxially grown wafers, and thyristor chips per 100,000 LEDs were counted.
[0028]
FIG. 5 shows the relationship between the peak concentration of the carbon concentration spike in the vicinity of the interface between the second n-type layer of the wafer grown in Example and Comparative Example 1 and the first n-type layer and the thyristor generation rate. From this result, in order to suppress the thyristor, the peak concentration of this carbon concentration spike should be less than 1 × 10 17 cm −3 , and in order to realize this, the second n-type GaAlAs layer is grown. It was found that the rate of temperature decrease from 855 ° C. to 850 ° C. during the heating should be 0.2 ° C./min or less.
[0029]
FIG. 6 shows the results of fabricating LEDs using the epitaxial substrates grown under the conditions of the example and comparative example 2 and comparing their characteristics. From this result, when the Al composition ratio on the n clad layer side of the interface between the n-type clad layer and the active layer is larger than 0.25, the absolute value of the LED output is smaller than when the Al composition ratio is 0.25, and the active layer It can be seen that the output decreases rather when the thickness is made thinner. It can also be seen that when the Al composition ratio is less than 0.12, the output is increased by reducing the thickness of the active layer, but the absolute value is decreased.
[0030]
Accordingly, it has been clarified that the optimum value of the Al composition at the interface is 0.12 or more and less than 0.25 in order to achieve the target level of output shown in FIG.
[0031]
At any Al composition level, the LED response speed is faster when the active layer is 0.4 μm than when the active layer is 1.0 μm, and the target value can be achieved when the active layer thickness is 0.4 μm. It was.
[0032]
【The invention's effect】
As described above, according to the present invention, an epitaxial substrate for producing an infrared LED having a DDH structure in which an n-type layer is added on an n-type GaAs substrate and which does not cause a thyristor defect at a high speed and high output, and the epitaxial substrate. Infrared LEDs made from can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic view of an epitaxial structure according to the present invention.
FIG. 2 is an example in which an epitaxial structure according to the present invention is grown from a p-type GaAs substrate.
FIG. 3 is a schematic view of a jig used for epitaxial growth.
FIG. 4 is a result of SIMS analysis of a carbon concentration profile in an interface region between a first n-type layer and a second n-type layer.
FIG. 5 shows the relationship between the carbon peak concentration appearing at the interface between the second n-type GaAlAs layer and the first n-type GaAlAs layer and the thyristor generation rate.
FIG. 6 shows the relationship between the Al composition and the output at the interface of the p-type GaAlAs active layer of the n-type GaAlAs cladding layer, with the active layer thickness as a parameter.
[Explanation of symbols]
1 n-type GaAs substrate 2 first n-type GaAlAs layer 3 second n-type GaAlAs layer 4 n-type GaAlAs cladding layer 5 p-type GaAlAs active layer 6 p-type GaAlAs cladding layer 7 p-type GaAs substrate 8 p-type GaAlAs cladding layer 9 p-type GaAlAs active layer 10 n-type GaAlAs cladding layer 11 second n-type GaAlAs layer 12 first n-type GaAlAs layer 13 n-type GaAs substrate 14 wafer cassette 15 holder 16 crucible 17 retracting crucible 18 crucible 19 crucible 20 Crucible 21 crucible 22 crucible base 23 crucible lid

Claims (4)

n型GaAs基板上に、第1のn型Gax1Al1-x1As層(0<x1<1)、第2のn型Gax2Al1-x2As層(0<x2<1)、n型Gax3Al1-x3Asクラッド層(0<x3<1)、発光波長が850〜900nmになるように調整したp型Gax4Al1-x4As活性層(0<x4<1)、及びp型Gax5Al1-x5Asクラッド層(0<x5<1)を液相エピタキシャル法により積層した後に、前記n型GaAs基板を除去することからなる半導体発光素子用エピタキシャル基板において、第1のn型Ga x1 Al 1-x1 As層(0<x1<1)、第2のn型Ga x2 Al 1-x2 As層(0<x2<1)、n型Ga x3 Al 1-x3 Asクラッド層(0<x3<1)のそれぞれのドーパントがTeであり、前記第2のn型Gax2Al1-x2As層の前記第1のn型Gax1Al1-x1As層との界面から2μm以内の領域における炭素濃度の極大値が1×1017cm-3未満であることを特徴とする半導体発光素子用エピタキシャル基板。On the n-type GaAs substrate, a first n-type Ga x1 Al 1-x1 As layer (0 <x1 <1), a second n-type Ga x2 Al 1-x2 As layer (0 <x2 <1), n Type Ga x3 Al 1-x3 As cladding layer (0 <x3 <1), p-type Ga x4 Al 1-x4 As active layer (0 <x4 <1) adjusted so that the emission wavelength is 850 to 900 nm, and In the epitaxial substrate for a semiconductor light emitting device, in which a p-type Ga x5 Al 1-x5 As cladding layer (0 <x5 <1) is laminated by a liquid phase epitaxial method, and then the n-type GaAs substrate is removed . n-type Ga x1 Al 1-x1 As layer (0 <x1 <1), second n-type Ga x2 Al 1-x2 As layer (0 <x2 <1), n-type Ga x3 Al 1-x3 As cladding layer (0 <x3 <1) of a respective dopant Te, before the second n-type Ga x2 Al 1-x2 As layer Epitaxial substrate for semiconductor light emitting device characterized by the maximum value of the carbon concentration in a region within 2μm from the interface between the first n-type Ga x1 Al 1-x1 As layer is less than 1 × 10 17 cm -3. n型Gax3Al1-x3Asクラッド層とp型Gax4Al1-x4As活性層との界面におけるn型Gax3Al1-x3Asクラッド層のAl組成比(1−x3)が、0.12以上で0.25以下であることを特徴とする請求項1に記載の半導体発光素子用エピタキシャル基板。The Al composition ratio (1-x3) of the n-type Ga x3 Al 1-x3 As cladding layer at the interface between the n - type Ga x3 Al 1-x3 As cladding layer and the p-type Ga x4 Al 1-x4 As active layer is 0 The epitaxial substrate for a semiconductor light emitting device according to claim 1, wherein the epitaxial substrate is .12 or more and 0.25 or less. n型GaAs基板上に、第1のn型Gax1Al1-x1As層(0<x1<1)、第2のn型Gax2Al1-x2As層(0<x2<1)、n型Gax3Al1-x3Asクラッド層(0<x3<1)、発光波長が850〜900nmになるように調整したp型Gax4Al1-x4As活性層(0<x4<1)、及びp型Gax5Al1-x5Asクラッド層(0<x5<1)を液相エピタキシャル法により積層し、その後に前記n型GaAs基板を除去することからなる半導体発光素子用エピタキシャル基板の製造方法において、第1のn型Gax1Al1-x1As層(0<x1<1)、第2のn型Gax2Al1-x2As層(0<x2<1)、n型Gax3Al1-x3Asクラッド層(0<x3<1)のそれぞれのドーパントをTeとし、前記第2のn型Gax2Al1-x2As層(0<x2<1)を成長させる際の855℃から850℃までの降温速度を0.2℃/分以下とし、前記第2のn型Gax2Al1-x2As層の前記第1のn型Gax1Al1-x1As層との界面から2μm以内の領域における炭素濃度の極大値が1×1017cm-3未満であることを特徴とする半導体発光素子用エピタキシャル基板の製造方法。On the n-type GaAs substrate, a first n-type Ga x1 Al 1-x1 As layer (0 <x1 <1), a second n-type Ga x2 Al 1-x2 As layer (0 <x2 <1), n Type Ga x3 Al 1-x3 As cladding layer (0 <x3 <1), p-type Ga x4 Al 1-x4 As active layer (0 <x4 <1) adjusted so that the emission wavelength is 850 to 900 nm, and In a method for manufacturing an epitaxial substrate for a semiconductor light emitting device, a p-type Ga x5 Al 1-x5 As cladding layer (0 <x5 <1) is laminated by a liquid phase epitaxial method, and then the n-type GaAs substrate is removed. , First n-type Ga x1 Al 1-x1 As layer (0 <x1 <1), second n-type Ga x2 Al 1-x2 As layer (0 <x2 <1), n-type Ga x3 Al 1- x3 as cladding layer each dopant (0 <x3 <1) and Te, the second n-type Ga x2 Al 1-x2 s layer (0 <x2 <1) the cooling rate of up to 850 ° C. from 855 ° C. at the time of growing a 0.2 ° C. / min or less, said second n-type Ga x2 Al 1-x2 As layer first Manufacturing of an epitaxial substrate for a semiconductor light emitting device, wherein the maximum value of carbon concentration in a region within 2 μm from the interface with 1 n-type Ga x1 Al 1-x1 As layer is less than 1 × 10 17 cm −3 Method. 請求項1又は2に記載の半導体発光素子用エピタキシャル基板を用いて作製した発光素子。The light emitting element produced using the epitaxial substrate for semiconductor light emitting elements of Claim 1 or 2.
JP17248299A 1999-06-18 1999-06-18 Epitaxial substrate for semiconductor light emitting device and light emitting device Expired - Fee Related JP4319291B2 (en)

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