JP4314694B2 - Data transfer method and data reproducing apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention provides a demodulator that converts channel bit data obtained by decoding a reproduction RF signal read from a recording medium on which information is recorded using, for example, an RLL (Run Length Limited) code based on at least one comparison level. The present invention relates to a data transfer method for transferring data. The present invention also relates to a data reproducing apparatus that transfers channel bit data to a demodulator by the data transfer method and demodulates data in the demodulator.
[0002]
[Prior art]
In order to enable high-density recording, address data is preformatted with a pit row, and an address information area in which this address data is recorded and a user area in which data is recorded or recorded alternately There is a large-capacity optical disk formed by meandering grooves in the user area.
[0003]
Even in this large-capacity optical disk, data modulation is performed so as to be suitable for recording as in the case of general optical disks and magneto-optical disks. A block code is known as one of such modulations. This block code is to block a data string into units of m × i bits (hereinafter referred to as data words) and convert the data words into code words of n × i bits according to an appropriate code rule. When i = 1, it becomes a fixed length code, and when i can be selected in plural, that is, when i is equal to or greater than imax = r where i is 2 or more, it becomes a variable length code. This block-coded code is represented as a variable length code (d, k; m, n; r). Here, i is called the restraint length. r is the maximum constraint length. Further, d and k are the minimum continuous number of “0” and the maximum continuous number of “0” that fall between consecutive “1” s in the code sequence.
[0004]
In the above-mentioned large-capacity optical disk, the data word of the address is recorded as a code word (channel bit) by RLL (2, 7) modulation of the parameter (2, 7; 1, 2; 4) and recorded in the user area. Are channel bits by 1,7PP modulation of parameters (1,7; 2,3; 2). Therefore, the data decoding unit of the device for reproducing data from the large-capacity optical disk generates channel bits of the RLL (2,7) modulated address and channel bits of the 1,7PP modulated data, and demodulates them. The data word is demodulated.
[0005]
By the way, in the apparatus for reproducing data from the large-capacity optical disk, since the channel clock is assumed to be high speed, data transfer from the read channel processor for generating the address / data channel bits to the demodulator is performed by a plurality of channels. Need to be parallel data.
[0006]
[Problems to be solved by the invention]
By the way, the demodulator employs a system in which address channel bits and 3 channel bits are 2 data bits (for (2, 7) modulation), and a data channel bit and 2 channel bits are 1 data bit (( 1,7PP) modulation is employed, and therefore, when sharing the data bus, either the 3-channel parallel or the 2-channel parallel is not preferable for the demodulator side.
[0007]
Also, assuming that the data bus is 3 channel parallel and the channel bits transferred between the address part and data part are switched between 3 channel parallel and 2 channel parallel, and the respective synchronous clocks (divided by 3 clock and divided by 2 clock) are also switched. However, since the divided clock is generated based on the divided clock of 2, the divided clock of 3 becomes off-duty. For example, when the reference clock is 130 MHz, the pulse width of the divided clock of 3 is 2 minutes. As with the peripheral clock, it is as short as 7.7 ns.
[0008]
The present invention has been made in view of the above circumstances, and when transferring the address channel bits and the data channel bits on a shared data bus, in a bit unit convenient for demodulating both in the demodulation unit. An object of the present invention is to provide a data transfer method that enables data transfer.
[0009]
It is another object of the present invention to provide a data reproducing apparatus that reproduces data from a large-capacity optical disk by applying the data transfer method.
[0010]
[Means for Solving the Problems]
In order to solve the above problems, a data transfer method according to the present invention is a data transfer for transferring address information having a different modulation method obtained from a read signal of a disk-shaped recording medium and decoded data of the recorded data to the demodulator. The method is characterized in that the address information and the decoded data of the recording data are transferred by the least common multiple clock and the least common multiple parallel transfer.
[0011]
In order to solve the above problems, a data reproducing apparatus according to the present invention includes a head unit that reads a signal from a disk-shaped recording medium, a reproduction processing unit that performs a reproduction process on the signal from the head unit, From the output of the reproduction processing means, the decoding processing means for decoding the address information and the recording data having different modulation schemes, and transferring these decoded data by the least common multiple clock and the least common multiple parallel transfer, and the above decoding processing means And demodulating means for demodulating the recorded data from the transferred decoded data.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In this embodiment, an optical disc recording / reproducing is performed for recording / reproducing data on / from an optical disc having an address information area formed by embossed pits and a recording / reproducing area in which wobbling grooves are formed in a spiral shape. Device. On this optical disc, the data word of the address is recorded as a code word (channel bit) by RLL (2, 7) modulation of parameters (2, 7; 1, 2; 4), and the data word to be recorded in the user area is a parameter. The channel bits are based on 1,7PP modulation of (1,7; 2,3; 2). Therefore, the device reproducing data from the optical disc decodes the channel bits of the RLL (2,7) modulated address and the channel bits of the 1,7PP modulated data and transfers them to the demodulator. Demodulate the data word.
[0013]
The configuration of the optical disk recording / reproducing apparatus is shown in FIG. An optical head (OP head) 11 that properly irradiates a signal recording surface on the optical disc 10 with a laser beam for reading and writing signals, and RF processing and wobble detection described later on a reproduction signal from the OP head 11 A read processor 12 that performs processing and servo detection processing, a read channel processor 13 that extracts channel bit data of address data and recording data from the output of the read processor 12, and a read channel processor 13 based on the data transfer method of the present invention. A demodulating unit for demodulating address data and recording data by demodulating the channel bits transferred in this way, or a digital signal processing unit (DSP) 14 including a modulating unit for recording, and further a servo processing unit, Demodulated data from this DSP 14 or recording data Or subjected to constant data processing, or and a data manager unit 15 for decoding the address data.
[0014]
The optical disk recording / reproducing apparatus also includes a write processor 16 that performs processing write processing on recording data in accordance with a user instruction, and, for example, a laser in the OP head 11 according to a laser drive pulse from the write processor 16. An LD driver 17 that drives the diode by auto power control (APC) and a spindle circuit 18 that controls a spindle motor 19 that rotates the optical disk 10 are provided.
[0015]
The optical disc recording / reproducing apparatus also includes a CPU 20 that controls the above-described units while developing a predetermined application program stored in the ROM 22 or an application downloaded from the host computer via the I / F 23 in the RAM 21. The I / F 23 also functions as an interface for causing the optical disc recording / reproducing apparatus to process a recording / reproducing command from an AV system (not shown) or an image recording bit stream for recording.
[0016]
The OP head 11 includes an optical system including a laser diode LD, a reproduction IV amplifier, a biaxial actuator, and the like.
[0017]
The read processor 12 includes an RF processing unit 12a, a wobble processing unit 12b, and a servo signal detection 12c, details of which will be described later.
[0018]
Next, basic operations at the time of recording and reproduction by the optical disk recording / reproducing apparatus will be described.
First, at the time of recording, a recording command and an MPEG2 image recording stream are sent to an optical disc recording / reproducing apparatus from an AV system (not shown) via the I / F 23, for example. The command is received by the CPU 20. The CPU 20 obtains address information from the data manager unit 15, causes the servo unit of the DSP 14 to seek the OP head 11, and moves the OP head 11 to a desired address position. The recording stream is error correction encoded by the ECC unit of the data manager unit 15. The error correction encoded bit stream is modulated into recording data by the modulation unit of the DSP 14. The write processor 16 performs recording compensation on the recording data and drives the LD of the OP head 11 with the LD driver 17 at the timing from the address DECTG of the data manager unit 15 to record the channel bits on the optical disk 10.
[0019]
Next, at the time of reproduction, a reproduction command is sent from the AV system to the CPU 20. The CPU 20 obtains address information from the address DEC section of the data manager section 15, causes the servo section to seek the OP head 11, and moves the OP head 11 to a desired address position. A reproduction signal is obtained from the OP head 11, and reproduction data is obtained by a PLL or the like in the RF processor 12a of the read processor 12. The reproduction data is decoded into channel bits by the read channel processor 13 and then demodulated by a demodulation circuit inside the DSP 14. The demodulated bit stream is subjected to error correction decoding in the ECC unit in the data manager unit 15 and then sent to the AV system via the I / F 23 as an image reproduction bit stream.
[0020]
At the time of recording and reproduction, the wobble processing unit 12b in the read processor 12 detects a wobble signal from the read signal from the OP head 11, generates a synchronization signal from the wobble signal, and generates the synchronization signal. The data is sent to the address DEC section in the data manager section 15.
[0021]
Further, at the time of recording and reproduction, the RF processing unit 12a in the read processor 12 performs waveform equalization processing, PLL (phase lock loop) processing, AGC (auto gain) on the reproduction signal from the OP head 11. Control) processing and ADC (analog-digital conversion) processing.
[0022]
[Means for solving problems]
In order to solve the above problems, a data transfer method according to the present invention is a data transfer for transferring address information having a different modulation method obtained from a read signal of a disk-shaped recording medium and decoded data of the recorded data to the demodulator. In the method, the address data and the decoded data of the recording data are each a clock that is a least common multiple of the divided frequency values of the two decoded data clocks, and each of the two decoded data is different from each other. Transfer by parallel transfer of the number of channels that is the least common multiple of the number of channels.
[0023]
In order to solve the above problems, a data reproducing apparatus according to the present invention includes a head unit that reads a signal from a disk-shaped recording medium, a reproduction processing unit that performs a reproduction process on the signal from the head unit, Address information and recording data having different modulation schemes are decoded from the output of the reproduction processing means, and these decoded data are clocks that have a division value of the least common multiple with respect to different division values of the clocks of the respective decoded data, and the above Decoding processing means for transferring the decoded data by parallel transfer of the least common multiple of the number of channels different from each other, and demodulating means for demodulating the decoded data transferred from the decoding processing means into recording data.
[0024]
The bit detection process for internal calculation is as follows. First, the digital data A / D converted by the RF processing unit 12a of the read processor 12 is subjected to level comparison processing using the center level as a comparison level, and a determination of “1” or “0” is made with the center level as a boundary. Do. Accordingly, when the level (amplitude value) of the digital data is equal to or higher than the comparator level, the channel bit data of the logic level “1” is obtained. When the level of the digital data is lower than the comparator level (amplitude value). Outputs channel bit data of logic level “0”. Further, in this bit detection process, when the level (amplitude value) of the digital data is equal to the comparator level, the channel bit data of logical level “0” or the level of the sum of the amplitude values before and after that and the comparator level or You may make it output the channel bit data of logic level "1". In the data correction process, the channel bit data obtained by the bit detection process is corrected based on a correction bit position designation signal that designates the correction bit position detection. For example, in the (1,7) modulation process, when the bit detection result is continuous for 3 bits and the sample level with the same sign and the middle is within thrs ± α, the middle bit is inverted and corrected to 1T. 1T is detected from the bit string after 1T correction, and the sample levels before and after are compared and corrected to 2T. When the sample level is the same, the same edge as the edge corrected immediately before is corrected. Then, the corrected channel bit data is output by the data correction process. Here, the read channel processor 13 outputs 3-channel bit data in the address portion and 2-channel bit data in the data portion.
[0025]
The DSP 14 includes a demodulator that performs demodulation processing as described above. Hereinafter, the code of the demodulation unit is 14, and the connection relationship between the read processor 12 and the read channel processor 13 is shown in FIG. By the way, in an apparatus for reproducing data from a large-capacity optical disk, it is assumed that the channel clock is high speed. Therefore, data transfer from the read channel processor 13 that generates the address / data channel bits to the demodulator 14 is performed. It is necessary to make parallel data of multiple channels.
[0026]
Therefore, in this embodiment, the minimum amount of both decoded data is set so that the transfer of data from the read channel processor 13 to the demodulator 14 is a bit unit convenient for both the address and data for the demodulator 14. The common channel is 6-channel parallel, and the clock is a divided by 6 clock.
[0027]
That is, as shown in FIG. 3, the data bus is made parallel to 3 channels, and channel bits transferred between the address part and the data part are switched between 3 channel parallel and 2 channel parallel, and the respective synchronous clocks (divided by 3 clock and divided by 2). Rather than switching the clock), if the synchronous clock is divided by 6, the pulse width becomes as long as 23.1 ns, so even if the reference clock is as fast as 130 MHz, a sufficiently safe transfer rate can be secured. . If the data is also 6-channel parallel, it is convenient if the demodulator 14 is to process in 6-channel parallel.
[0028]
The internal operation of the read channel processor 13 will be described with reference to FIGS. The three-frequency-divided clock wck based on the 3-channel bit data Ad of the address decoded in the read channel processor 13 and the synchronous clock obtained in the PLL unit of the wobble processing unit 12c is supplied to the 6-channel parallel conversion unit 31. . Similarly, the 2-channel clock data rck based on the 2-channel bit data D of data and the synchronous clock obtained by the PLL unit of the RF processing unit 12 a is supplied to the 6-channel parallel conversion unit 32. In the 6-channel parallel conversion units 31 and 32, the 3-channel bit data Ad of the address and its clock wck, and the 2-channel bit data of the data D and its clock rck are both the least common multiple of 6 channels as described above. The parallel data and clock are divided by 6 and supplied to the data changeover switch 34 and the clock changeover switch 35 of the changeover unit 33. The switching unit 33 is switched by the data gate pulse GD in conjunction with the changeover switches 34 and 35. When the data gate pulse GD is H, the data channel 6-channel parallel data and the divided 6 clock are used, and the data gate pulse GD is used. When L, the 6-channel parallel data in the address part and the 6-divided clock are supplied to the demodulator 14.
[0029]
The timing at which the parallel conversion unit 32 outputs the 2-channel parallel data and the 2-divided clock rck2 as the 6-channel parallel data and the 6-divided clock rck6 is shown in FIG. Further, as an example of the operation of the parallel conversion unit 31 , when 2-channel parallel data and a 2-divided clock wck2 are input, the timing of outputting the 6-channel parallel data and the 6-divided clock wck6 as shown in FIG. Shown as (B). The data gate pulse (output signal switching timing signal) G _D switching unit 33 switches the changeover switches 34 and 35 signal output and the clock output 6 channels parallel outputs to the demodulator 14 in accordance with (rck6 / wck6) An example of the timing is shown in FIG.
[0030]
As described above, in the optical disc recording / reproducing apparatus of the above embodiment, the channel bit data is transferred from the read channel processor 13 to the demodulator 14 based on the data transfer method of the present invention, so the address portion and the data portion are shared. When the data bus is used for data transfer, it is possible to transfer data in bit units, which is convenient for demodulating both by the demodulator.
[0031]
Further, when the channel clock is very fast so as to exceed 100 MHz, it is possible to easily make a 6-divided clock with a duty of 50% from the 2-divided clock used for the internal processing of the read channel processor.
[0032]
Even when the channel clock is very fast so as to exceed 100 MHz, a sufficiently safe transfer rate can be secured with the divided-by-6 clock.
[0033]
The present invention can be applied to a combination of, for example, EFM modulation and 1,7PP modulation in addition to the above-described embodiment. If the 8-channel parallel is the least common multiple of the EFM method with 8 data bits as 14 data bits and the 1,7PP method with 2 data bits as 1 data bit, and the synchronous clock is divided by 8, either It is possible to transfer data in bit units convenient for demodulating the signal.
[0034]
【The invention's effect】
According to the present invention, when data channel bits of an address and data channel bits are transferred via a shared data bus, it is possible to transfer data in bit units convenient for demodulating both by the demodulator. it can.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of an optical disc recording / reproducing apparatus according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a connection relationship among a read processor, a read channel processor, and a demodulation unit.
FIG. 3 is a diagram for explaining a clock of a conventional data transfer method and a clock in the data transfer method of the present invention.
FIG. 4 is a diagram showing a main part for explaining the operation of the read channel processor;
FIG. 5 is a timing chart for explaining the operation of the read channel processor;
[Explanation of symbols]
11 OP head, 12 read processor, 13 read channel processor, 14 demodulator (DSP), 15 data manager

Claims (7)

In the data transfer method for transferring the address information obtained from the read signal of the disk-shaped recording medium and the decoded data of the recording data with different modulation methods to the demodulation unit,
The decoded data of the address information and the recording data is a clock that is a divided value of the least common multiple with respect to different divided values of the clocks of the two decoded data, and each of the different numbers of channels of the two decoded data. data transfer method to forward the parallel transfer number of channels of the least common multiple. When the address information and the recording data have different modulation schemes and the shortest inversion intervals of the channel bits are different, the division value of the least common multiple with respect to the different division values of the clocks of the two decoded data become clock above two different data transfer method of a parallel transfer line intends claim 1, wherein the number of channels of the least common multiple of the number of the channels of the decoded data. And address information area, the address information and the data transfer method according to claim 1, wherein to forward the decoded data of the recording data to the demodulation unit of the disk-shaped recording medium and a recording and reproduction area formed by alternately arranged. Head means for reading a signal from a disk-shaped recording medium;
Reproduction processing means for performing reproduction processing on the signal from the head means;
Address information and recording data having different modulation schemes are decoded from the output of the reproduction processing means, and the decoded data is a clock that becomes a divided value of the least common multiple with respect to different divided values of clocks of the decoded data, and Decoding processing means for transferring by parallel transfer of the least common multiple of the number of different channels of each of the decoded data,
Data reproduction apparatus Ru and a demodulating means for demodulating the recording data decoding data transferred from said decode processing means. When the address information and the recording data have different modulation schemes and the shortest inversion intervals of the channel bits are different, the decoding processing means minimizes the divided frequency values of the decoded data clocks that are different from each other. dividing value to become clock data recovery device row intends claim 4, wherein different parallel transfer of the number of channels of the least common multiple of the number of the channels from each other for each decoded data common multiple. The head means, the address information area, a data reproducing apparatus according to claim 4, to read out a signal from the disc-shaped recording medium and a recording and reproducing area formed by alternately arranged. It said reproducing processing means, with respect to the signal which the head unit is reproduced, RF processing, the wobble processing and servo processing data reproducing apparatus according to claim 4, wherein to facilities the.

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