JP4312422B2 - High frequency power detector - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-frequency power detection device. In particular, the present invention relates to a high-frequency power detection device that receives a plurality of types of signal waves.
[0002]
[Prior art]
FIG. 1 shows an example of the configuration of a detection circuit that detects the signal level of a high-frequency signal in a conventional radio signal amplifier. The detection circuit includes an input unit 10, a distributor 20, an output unit 30, and a power detection unit 40.
[0003]
The distributor 20 receives a high frequency signal from the outside via the input unit 10 and distributes the received high frequency signal. Then, the distributor 20 sends the distributed high-frequency signal to the output unit 30 that outputs the high frequency to the outside and the power detection unit 40.
[0004]
The power detection unit 40 includes a detection unit 50 and a control unit 60. The detection unit 50 extracts a detection voltage that follows the high-frequency signal received from the distributor 20 and sends the detection voltage to the control unit 60.
[0005]
The control unit 60 samples the detection voltage received from the detection unit 50 at regular intervals. The control unit 60 averages the detected detection voltages, and calculates an absolute value level using a conversion table included in the control unit 60. The control unit 60 outputs the calculated absolute value level to the outside.
[0006]
Then, the radio signal amplifier obtains the gain of the amplifier based on the difference between the absolute value levels of the detection circuits provided before and after the amplifier.
[0007]
FIG. 2 shows a circuit configuration as an example of the detection unit 50. This circuit configuration example includes a signal input unit 502, a coupling capacitor 504, a diode 506, resistors 510 and 516, a buffer 512, a signal output unit 514, and a capacitor 518.
[0008]
The signal input unit 502 receives a high frequency signal from the distributor 20. The coupling capacitor 504 removes the direct current component of the high frequency signal received by the signal input unit 502 and sends it to the diode 506. The diode 506 receives the high-frequency signal from which the direct current component has been removed, performs rectification, and sends the rectified signal wave to the resistor 510. The resistor 510 receives and averages the rectified signal wave. The resistor 516 connects the resistor 510 and the buffer 512 to ground. The capacitor 518 connects the resistor 516 and the buffer 512 to ground.
[0009]
FIG. 3 shows a circuit configuration which is another example of the detection unit 50. This circuit configuration example is substantially the same as the circuit configuration shown in FIG. 2, but includes a logarithmic detector 520 instead of the diode 506.
[0010]
FIG. 4 shows still another example of the detection unit 50. The detection unit 50 in this example has a configuration in which a capacitor 534, a logarithmic detector 536, a resistor 538, and a buffer 540 are sequentially connected downstream of the signal input unit 532. Thereby, the detection part 50 can output the detection voltage which follows a burst wave with a fast response speed.
[0011]
FIG. 5A shows the relationship between the input amplitude of the high-frequency signal input to the diode and the detection voltage output when the diode receives the high-frequency signal. The relationship between the input amplitude and the detection voltage when a high-frequency signal is input to the diode has many nonlinear portions as shown in FIG. FIG. 5B shows the relationship between the input amplitude of the high-frequency signal input to the logarithmic detector and the detection voltage output when the logarithmic detector receives the high-frequency signal. As shown in FIG. 5B, the relationship between the input amplitude and the detection voltage when a high frequency signal is input to the logarithmic detector has a wide linear range. Therefore, the detector 50 using a logarithmic detector realizes a wider dynamic range than the detector 50 using a diode.
[0012]
[Problems to be solved by the invention]
Since the detection unit 50 shown in FIG. 2 is formed by a diode, a resistor, and a capacitor, it can be manufactured at low cost. However, the detector 50 shown in FIG. 2 has a problem that the response speed is slow.
[0013]
FIG. 6A shows an example of an input wave input to the detection unit 50 shown in FIG. 6B shows the waveform of the output wave at 508 in FIG. 2, and FIG. 6C shows the waveform of the output wave at 514 in FIG. When the burst wave shown in FIG. 6A is input, since the response speed of the detection unit 50 is slower than the ON time of the burst wave, as shown in FIGS. 6B and 6C, There was a case where no waveform appeared for the burst wave shown in FIG. Therefore, the control unit 60 sometimes cannot obtain the peak voltage of the continuous burst wave from the signal output from the signal output unit 514.
[0014]
FIG. 7A shows an example of an input wave input to the detection unit 50 shown in FIG. 7B shows the waveform of the output wave at 508 in FIG. 3, and FIG. 7C shows the waveform of the output wave at 514 in FIG. The detection unit 50 shown in FIG. 3 has the following problems. For example, when a burst wave as shown in FIG. 7A is input, the signal output unit 514 outputs a signal as shown in FIG. Therefore, the control unit 60 sometimes cannot obtain the peak voltage of the continuous burst wave from the signal output from the signal output unit 514.
[0015]
The detector 50 shown in FIG. 4 has the following problems. When a burst wave as shown in FIG. 8A is input, the detection unit 50 outputs a detection voltage shown in FIG. FIG. 8C illustrates a diagram in which the control unit 60 samples the detection voltage illustrated in FIG. In the figure, (1) to (22) indicate timings at which the control unit 60 samples the detection voltage at intervals of the period T. When the period T during which the control unit 60 performs sampling is significantly shorter than the burst wave period τ, the control unit 60 can accurately calculate the burst wave period τ from the detected voltage.
[0016]
However, as shown in FIG. 8C, when the sampling period T is shortened with respect to the burst wave period τ, the control unit 60 has to increase the number of reference clocks for determining the sampling period T. . However, when the number of reference clocks is increased, there is a problem that the cost of the control unit 60 increases or noise is generated due to the high number of clocks.
[0017]
FIG. 8D shows a case where the sampling period T is the same as or longer than the burst wave period τ. As shown in (1), (2), and (4) in the figure, the control unit 60 cannot acquire the peak voltage of the burst wave when the burst wave peak and the sampling timing do not match. Therefore, the control unit 60 may not be able to acquire the peak voltage.
[0018]
Then, this invention aims at providing the high frequency electric power detection apparatus which can solve said subject. This object is achieved by a combination of features described in the independent claims. The dependent claims define further advantageous specific examples of the present invention.
[0019]
[Means for Solving the Problems]
That is, according to the high frequency power detection apparatus of the first embodiment of the present invention, a detection voltage output unit for outputting a detection wave voltage by detecting a high-frequency signal, samples the detection voltage which is該検wave every predetermined period A high-frequency power detection device including a control unit that calculates a peak voltage of a high-frequency signal, and further connected to a detection voltage output unit, a diode for rectifying the detection voltage, and a delay of the detection voltage connected in parallel to the diode A delay unit having a variable resistor that adjusts the amount; and a resistance control unit that controls a delay amount of the detection voltage by controlling a resistance value of the variable resistor. The resistance control unit has an input of the detection voltage. The amount of delay in the detection voltage is controlled by the resistance value of the variable resistor so that the increase in the voltage value in the portion is larger than the decrease in the voltage value in the portion where no detection voltage is input. Voltage measured for the case where the increase amount becomes equal to or less than a predetermined value.
[0020]
The delay unit further includes a capacitor that charges the detection voltage, and at least one resistor that determines a time constant for charging the capacitor and a time constant for discharging the capacitor so as to satisfy the delay amount. The detected voltage is reduced to the same voltage as the peak voltage of the input burst wave by discharging the charge charged with the time constant charged to the capacitor with a delay based on the time constant discharged at the part where no detection voltage is input. You may make it raise in steps . In addition, when the sampling period is not short with respect to the period of the high frequency signal and the period of the detection voltage cannot be detected, the control unit transmits non-calculation information indicating that the period of the detection voltage cannot be calculated to the resistance control unit. The resistance control unit reduces the delay amount of the detection voltage by changing the resistance value of the resistor that adjusts the delay amount of the detection voltage based on the calculation impossibility information, and the control unit calculates the period of the detection voltage. It may be.
[0021]
The above summary of the invention does not enumerate all necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the claimed invention, and all combinations of features described in the embodiments are solutions of the invention. It is not always essential to the means.
[0023]
FIG. 9 shows a configuration of the detection unit 80 and the resistance control unit 90 according to the present embodiment. Detection unit 80 includes a signal input unit 802, a coupling capacitor 804, a logarithmic detector 806, a diode 812, resistors 814, 816, 818, a capacitor 820, a buffer 822, and a signal output unit 824. .
[0024]
The diode 812 and the resistor 814 are connected in parallel. The resistor 816 is connected in series downstream of the diode 812 and the resistor 814. The resistor 818 and the capacitor 820 are grounded downstream of the resistor 814 in this order. With the above circuit configuration, the diode 812, the resistors 814, 816, and 818 and the capacitor 820 form a delay unit 810.
[0025]
The signal input unit 802 receives a high frequency signal from the distributor 20. The coupling capacitor 804 removes the direct current component of the high frequency signal received by the signal input unit 802. The coupling capacitor 804 sends the high frequency signal from which the direct current component has been removed to the logarithmic detector 806.
[0026]
The logarithmic detector 806 demodulates the high frequency signal received from the coupling capacitor 804 and outputs a detection voltage that follows the high frequency signal. The logarithmic detector 806 sends the output detection voltage to the delay unit 810.
[0027]
The delay unit 810 delays the detection voltage received from the logarithmic detector 806. Specifically, the delay unit 810 charges the capacitor 820 with the detection voltage at a peak of the detection voltage, that is, at a portion where there is an input. At this time, the charging constant of the capacitor 820 is C ₈₂₀ × ((R ₈₁₂ + R ₈₁₆ ) / R ₈₁₈ ). Here, C ₈₂₀ indicates the capacitance of the capacitor 820, and R ₈₁₂ , R _816, and R ₈₁₈ indicate the resistance values of the diode 812, the resistor 816, and the resistor 818, respectively. Further, in the valley of the detection voltage, that is, in the portion where there is no input, the capacitor 820 discharges the electric charge stored in the peak of the detection voltage based on the time constant of the resistor 818 and the capacitor 820. Thereby, the delay unit 810 delays the detection voltage. Note that the discharge constant of the capacitor 820 is C ₈₂₀ × R ₈₁₈ .
[0028]
The delay unit 810 sends the delayed detection voltage to the resistance control unit 90 via the buffer 822 and the signal output unit 824.
[0029]
The resistance control unit 90 receives the detection voltage from the detection unit 80. The resistance control unit 90 changes the resistance value of the resistor 814 based on the received waveform of the detection voltage.
[0030]
FIG. 10A shows a burst wave that is an example of a high-frequency signal. FIG. 10B shows the waveform of the detection voltage output from the diode when the high-frequency signal shown in FIG. 10A is input to a single diode instead of the delay unit 810. FIG. 10C shows the waveform of the detection voltage output from the logarithmic detector 806 by the detector 80 to which the high frequency signal shown in FIG. 10A is input, and FIG. 10D shows the waveform of FIG. A waveform of a detection voltage output from the output terminal 824 by the detection unit 80 to which the high frequency signal shown in a) is input is shown.
[0031]
A circuit having a single diode instead of the delay unit 810 has a slow response. Therefore, when a high frequency signal is input to this circuit, the signal output from the diode may not be able to output a peak voltage as shown in FIG. Further, the waveform output from the logarithmic detector 806 has a fast response and follows the burst wave as shown in FIG. Therefore, when the sampling period is longer than the period of the output waveform, it is difficult for the control unit 60 to measure the peak voltage from the waveform of FIG.
On the other hand, the detection unit 80 delays the detection voltage by the delay unit 810 delaying the detection voltage output from the logarithmic detector 806. That is, the drop in the detection voltage output from the detection unit 80 becomes moderate with respect to the burst wave input to the detection unit 80 as shown in FIG. The detection voltage output from the detection unit 80 increases stepwise to the peak voltage as shown in (1) to (5) of FIG. Therefore, the control unit 60 can estimate the peak voltage when the amount of increase in the detection voltage becomes a certain value or less.
[0032]
FIG. 11A shows a burst wave that is an example of a high-frequency signal. Moreover, FIG.11 (b) shows an example of the waveform of the detection voltage which the detection part 80 input the high frequency signal shown to Fig.11 (a) outputs. In the detection voltage output by the detection unit 80, the voltage value rise at the peak of the burst wave is larger than the voltage value drop at the valley of the burst wave. Therefore, the detection voltage rises in steps at the peak of the burst wave and saturates after a certain time. As a result, the waveform of the detection voltage approaches a continuous wave having substantially the same voltage as the peak voltage, as shown in FIG. Therefore, the control unit 60 can measure the peak voltage regardless of the sampling period.
Further, in the case of the waveform shown in FIG. 11B, that is, when the period τ of the burst wave input to the detection unit 80 is short, the difference between the maximum value and the minimum value of the detection voltage output by the detection unit 80 becomes small. . Therefore, when the period τ is short, the control unit 60 may not be able to calculate the period of the detection voltage. In this case, the control unit 60 sends non-calculation information indicating that the period of the detection voltage cannot be calculated to the resistance control unit 90. Here, the resistance control unit 90 receives the calculation impossibility information, and changes the resistance value of the resistor 814 based on the calculation impossibility information. As a result, the detection unit 80 reduces the delay amount of the detection voltage by the resistance control unit 90 reducing the resistance value of the resistor 814. That is, the response speed of the detection voltage output from the detection unit 80 is fast, and the difference between the maximum value and the minimum value of the detection voltage is large. Therefore, the control unit 60 can calculate the period of the detection voltage.
[0033]
As described above, the detection unit 80 outputs a waveform that allows the control unit 60 to sample the peak voltage of the detection voltage even when the sampling period T of the control unit 60 is longer than the burst wave period τ. can do. Further, since it is not necessary to increase the sampling period, an increase in cost can be suppressed.
[0034]
As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. Various modifications or improvements can be added to the above embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.
[0035]
【The invention's effect】
As is apparent from the above description, according to the present invention, it is possible to provide a high-frequency power detection device that can detect the peak voltage of a burst wave without shortening the sampling period.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an example of a configuration of a detection circuit.
FIG. 2 is a diagram showing a circuit configuration that is an example of a detection unit 50;
FIG. 3 is a diagram illustrating a circuit configuration that is an example of a detection unit 50;
4 is a diagram illustrating a circuit configuration as an example of a detection unit 50. FIG.
FIG. 5 is a diagram illustrating a relationship between an input amplitude of a high-frequency signal input to a diode or a logarithmic detector and a detection voltage output when the diode or the logarithmic detector receives a high-frequency signal.
6 is a diagram illustrating a waveform of a burst wave and a waveform of a detection voltage output from the detection unit 50. FIG.
7 is a diagram illustrating a waveform of a burst wave and a waveform of a detection voltage output from the detection unit 50. FIG.
8 is a diagram illustrating a waveform of a burst wave and a waveform of a detection voltage output from the detection unit 50. FIG.
FIG. 9 is a diagram showing a configuration of a detection unit 80 and a resistance control unit 90 according to the present embodiment.
10 is a diagram illustrating a waveform of a burst wave and a waveform of a detection voltage output from the detection unit 80. FIG.
11 is a diagram illustrating a waveform of a burst wave and a waveform of a detection voltage output from the detection unit 80. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Input part 20 Divider 30 Output part 40 Power detection part 50,80 Detection part 60 Control part 90 Control part 802 Signal input part 804,820 Capacitor 806 Logarithmic detector 810 Delay part 812 Diode 814,816,818 Resistance 822 Buffer 824 Signal output section

Claims (3)

A detection voltage output unit which detects a high frequency signal to output a detection wave voltage,
A control unit that samples the detected detection voltage at regular intervals to calculate a peak voltage of the high-frequency signal;
A high frequency power detection device comprising:
A delay unit that is connected to the detection voltage output unit and includes a diode that rectifies the detection voltage and a variable resistor that is connected in parallel to the diode and adjusts a delay amount of the detection voltage ;
A resistance control unit that controls a delay amount of the detection voltage by controlling a resistance value of the variable resistor;
With
The resistance control unit is
The delay amount of the detection voltage is controlled by the resistance value of the variable resistor so that the increase in the voltage value in the portion where the detection voltage is input is larger than the decrease in the voltage value in the portion where the detection voltage is not input. And
The controller is
A high-frequency power detection apparatus , wherein a voltage is measured when an increase amount of the detection voltage becomes a predetermined value or less . The delay unit further includes:
A capacitor for charging the detection voltage;
At least one resistor for determining a time constant for charging the capacitor and a time constant for discharging so as to satisfy the delay amount;
Have
The detection voltage is discharged by delaying the charge charged with the time constant for charging the capacitor in a portion where the detection voltage is input based on the discharge time constant in the portion where the detection voltage is not input. The high-frequency power detection device according to claim 1, wherein the voltage is increased stepwise to the same voltage as the peak voltage of the input burst wave . The controller is
When the period of the detection voltage cannot be detected because the sampling period is not short with respect to the period of the high frequency signal, non-calculation information indicating that the period of the detection voltage cannot be calculated is transmitted to the resistance control unit,
The resistance control unit
The resistance value of the resistor that adjusts the delay amount of the detection voltage is changed based on the non-calculated information to reduce the delay amount of the detection voltage, and the control unit calculates the period of the detection voltage.
The high frequency electric power detection apparatus according to claim 1 or 2.

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