JP4303090B2 - Multi-value data conversion processing method and multi-value data conversion processing device - Google Patents

Description

  The present invention converts binary data into multi-value data when it is recorded on an information recording medium in a multi-value data recording / reproducing apparatus such as an optical disk apparatus that records or reproduces multi-value data on an information recording medium such as an optical disk. The present invention relates to a multi-value data conversion processing method and a multi-value data conversion processing apparatus.

Conventionally, this is a data processing method in which n × m−1 (integer where n ≧ 2, m ≧ 2) bit data is arranged in a matrix of n rows and m columns and converted into multi-value data in which one symbol consists of n bits. Then, (n−1) bit data of n × m−1 (n ≧ 2, m ≧ 2) bit data are arranged in one row and included in one symbol, m symbols are generated, and m Symbols are arranged in m columns, and {(n−1) × m} bit data is arranged in a higher order in an n × m matrix, and the remaining (m−1) of the n × m−1 bit data is arranged. ) By converting bit data to m-bit data and arranging them in one row and arranging them in the lower row in the matrix of n rows and m columns, m columns of symbols in which n-bit data are arranged in one row in the matrix of n rows and m columns Arranged so that each symbol has an even value. Is set to an odd number, the multi-level data conversion method for converting the n × m-1 bit data into multi-value data arranged in a matrix of n rows and m columns (e.g., see Patent Document 1) there is.
JP 2003-168980 A

However, in the conventional multi-value data change processing method, since one symbol is n-bit multi-value data, the multi-value number of multi-value data is 4, 8, 16, 32,. . . It is limited to the power of 2. Therefore, there is a problem that it cannot be applied to the conversion processing to multi-value data of multi-value numbers other than powers of 2, such as ternary, quinary, quinary, quintic, quinary, and quinary.
For example, in the case of an optical disc, depending on the S / N ratio of a reproduction signal, an optimum recording capacity can be obtained when the multi-valued number of multi-valued data is other than a power of 2, due to the relationship between the data error rate and the recording capacity during reproduction Therefore, for example, binary data cannot be converted into multi-value data of a multi-value number other than a power of 2 and recorded.
The present invention has been made in view of the above points, and an object of the present invention is to enable binary data and multi-value data other than a power of 2 to be converted into each other.

The present invention for achieving the above object, provides the following multi-value data conversion method and the multi-level data conversion processing device.
(1 ) A multi-value data pattern according to a preset rule among mn multi-value data patterns consisting of ^m (integers where m ≧ 2) n (integers where n ≧ 3) values. 2 ^k (maximum integer with n ^m > 2 ^{k + 1} ) in which the arrangement of the even value and the odd value of the multi-value data is restricted is associated with the k-bit binary data 2 A multi-value data conversion processing method for performing conversion processing from the binary data to the multi-value data or from the multi-value data to the binary data based on a value multi-value data correspondence table.

(2) In the multi-value data conversion method of the above (1), the 2 multi-value data pattern ^k street, the error rate is low multi-value data at the time of reproduction than the multivalued data pattern high error rate during reproduction A multi-value data conversion processing method comprising multi-value data patterns having a large number of patterns.

( 3 ) In the multi-value data conversion processing method of ( 1 ), the preset rule is composed of two types of rules that restrict the arrangement of the even value and the odd value of the multi-value data in the multi-value data pattern. The binary multi-value data correspondence table is the multi-value data in the multi-value data pattern according to the two kinds of rules, among the n ^m multi-value data patterns composed of the m n-value multi-value data. 2 ^k (binary largest integers with n ^m > 2 ^{k + 1} ) in which the arrangement of even and odd values is restricted, and k-bit binary data corresponding to two types of binary many It consists of a value data correspondence table, and the conversion processing from the binary data to the multi-value data or from the multi-value data to the binary data corresponds to the two types of binary multi-value data for every m multi-value data. Select one of the tables and select A multi-value data conversion processing method for performing the conversion processing on a binary multi-value data correspondence table.
( 4 ) In the multi-value data conversion processing method of ( 3 ) above, multi-value data conversion processing for determining the selection of either one of the two types of binary multi-value data correspondence table based on a calculation result based on a predetermined relational expression. Method.

(5 ) Input means for inputting binary data of k (an integer where m ≧ 2; an integer where n ≧ 3; k is a maximum integer where n ^m > 2 ^k ); and input by the input means and the binary data of k bits among the multivalue data patterns n ^m Street consisting multivalued data of the m n values, even values of the multivalued data in the multivalue data pattern rule preset and odd values and 2 multi-value data conversion means for converting the multi-value data pattern of 2 ^k as that limits the arrangement of an output means for outputting multi-valued data of the multi-level data pattern that has been converted by the binary multi-value data conversion means A multi-value data conversion processing device.

( 6 ) m (n is an integer satisfying m ≧ 2, n is an integer satisfying n ≧ 3, k is the largest integer ^satisfying n ^m > 2 ^{k + 1} ), and m multi-values of n values corresponding to binary data among multi-valued data pattern n ^m street comprising data, the reproduction signal of the multi-level data patterns 2 ^k street with limited placement of even and odd values of multi-value data in the multi-level data pattern rule preset , A determination candidate output means for determining one multivalued data with a predetermined threshold and outputting a first determination candidate and a second determination candidate for m multivalued data, and the determination candidate A judgment candidate combination output means for combining the first judgment candidates and the second judgment candidates for the m pieces of multi-value data output by the output means to output judgment candidates for the m pieces of multi-value data, and the judgment candidates Outputs the reference signal value for the judgment candidate output by the combination output means Reference signal value output means, and a sum value obtained by calculating a square value or a sum of absolute values of errors between the reference signal value output for each determination candidate by the reference signal value output means and the reproduction signal and output means, corresponding to and above a total of one multilevel data pattern of the 2 ^k as based on the total value output means determines candidates output by output sum value and the determination candidate associations output means by Multi-value data pattern output means for outputting a multi-value data pattern consisting of m multi-value data having the smallest value, and k-bit 2 corresponding to the multi-value data pattern outputted by the multi-value data pattern output means A multi-value data conversion processing device comprising binary data output means for outputting value data.

  The multi-value data conversion processing method and multi-value data conversion processing device according to the present invention can mutually convert binary data and multi-value data of a multi-value number other than a power of 2.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference technology of the present invention and the best mode for carrying out the present invention will be specifically described below with reference to the drawings and tables.
Table 1 is an example of a binary multi-value data correspondence table used when multi-value data and binary data are mutually converted in the multi-value data conversion processing method of the reference technique of the present invention.
Here, in order to make the explanation easy to understand, as an example, 3 ³ = 27 multi-value data patterns composed of three (m = 3) 3 (n = 3) -value multi-value data (ternary data). A binary multi-value data correspondence table in which 2 ⁴ = 16 (k = 4) multi-value data patterns are associated with 4-bit binary data will be described.
There are 27 patterns (0, 0, 0) to (2, 2, 2) of multi-value data patterns composed of three ternary data of (0, 1, 2). If a value data pattern is used, it can correspond to all of 4-bit binary data.

The 27 multi-value data patterns are (0, 0, 0) (0, 0, 1) (0, 0, 2) (0, 1, 0) (0, 1, 1) (0, 1, 2) (0, 2, 0) (0, 2, 1) (0, 2, 2) (1, 0, 0) (1, 0, 1) (1, 0, 2) (1, 1, 0 ) (1, 1, 1) (1, 1, 2) (1, 2, 0) (1, 2, 1) (1, 2, 2) (2, 0, 0) (2, 0, 1) (2, 0, 2) (2, 1, 0) (2, 1, 1) (2, 1, 2) (2, 2, 0) (2, 2, 1) (2, 2, 2) is there.
The 4-bit binary data is 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111.
In this case, 16 multi-value data patterns may be selected at random from the 27 multi-value data patterns, but 16 multi-value data patterns may be selected as follows.

Considering the error rate at the time of reproduction for each value of (0, 1, 2) of multi-value data, there is a high probability that 1 will be mistaken for both 0 and 2. On the other hand, 0 and 2 have a high probability of being mistaken for 1, respectively, and it is considered that the probability of mistakenly being 0 for 2 and 2 for 0 is lower.
Therefore, it is considered that 1 of the multi-value data has a higher error rate during reproduction than 0 and 2.
Therefore, a multi-value data pattern including a large number of 2 and 0 having a low error rate during reproduction is selected preferentially. That is, a multi-value data pattern consisting only of multi-value data with a low error rate during playback or a multi-value data pattern with a large number of multi-value data with a low error rate during playback than multi-value data with a high error rate during playback Select.
Further, a multi-value data pattern having a large number of multi-value data patterns having a low error rate during reproduction is selected from a multi-value data pattern having a high error rate during reproduction.

Table 2 is a list for explaining a method of selecting 16 multi-value data patterns from the 27 multi-value data patterns.
First, there are eight multi-value data patterns consisting of only 2 and 0 with a low error rate during reproduction, and the multi-value data pattern (0, 0, 0) (0, 0, 2) (0, 2 , 0) (0, 2, 2) (2, 0, 0) (2, 0, 2) (2, 2, 0) (2, 2, 2).
Furthermore, as the number of multi-value data having a low error rate at the time of reproduction is larger than the multi-value data having a high error rate at the time of reproduction, there are 12 patterns including only one and the remaining two being 0 or 2. The multi-value data pattern is selected. Among them, the number of multi-value data patterns each including 2 and 0 is six, the number of multi-value data patterns including two zeros is three, and the number of multi-value data patterns including two twos is There are three. The multi-value data pattern (0, 0, 1) (0, 1, 0) (0, 1, 2) (0, 2, 1) (1, 0, 0) (1, 0, 2) (1, 2,0) (1,2,2) (2,0,1) (2,1,0) (2,1,2) (2,2,1).

Then, 16 multi-value data patterns are selected from the 20 multi-value data patterns in total. First, since the multi-value data pattern of (0, 0, 0) and (2, 2, 2) gives the multi-value signal a direct current component, for example, it is disadvantageous for servo control of the optical disk, etc. The multi-value data patterns (0, 0, 0) and (2, 2, 2) are excluded.
Also, for the multivalued data patterns of (2, 0, 2) and (2, 1, 2), the central 0 or 1 is prone to error because the signal difference becomes small due to the intersymbol interference of the two preceding and following. The multi-value data patterns (2, 0, 2) and (2, 1, 2) are also excluded.
In this way, finally, from the multi-value data pattern including only two and 0, five from the multi-value data pattern including only two and zero, and from the multi-value data pattern including two and zero, respectively. A total of 16 multi-value data patterns are selected from 2 multi-value data patterns including 2 and 2.

That is, (0, 0, 1) (0, 0, 2) (0, 1, 0) (0, 1, 2) (0, 2, 0) (0, 2, 1) (0, 2, 2 ) (1, 0, 0) (1, 0, 2) (1, 2, 0) (1, 2, 2) (2, 0, 0) (2, 0, 1) (2, 1, 0) Sixteen multi-value data patterns (2, 2, 0) (2, 2, 1) are selected.
In this way, by selecting a multi-value data pattern including many multi-value data “2” and “0” having a low error rate during reproduction, the error rate during data reproduction can be reduced.
That is, the error rate at the time of multi-value data reproduction can be further reduced by including 16 multi-value data patterns including a large amount of multi-value data having a low error rate at the time of reproduction in the multi-value data recording / reproduction. Can do.

Furthermore, by removing multi-value data patterns with a high error rate such as “202” and “212” and using many multi-value data patterns with a low error rate at the time of reproduction, an error during data reproduction can be obtained. The rate can be reduced.
That is, the 16 multi-value data patterns include many multi-value data patterns having a low error rate during reproduction in multi-value data recording and reproduction, thereby further reducing the error rate during multi-value data reproduction. be able to.

  As shown in Table 1, in the binary multi-value data conversion table, the above-described 27 multi-value data patterns (0, 0, 0) to (2, 2, 2) are 0 to 26 at the left end of the table. The 16-bit binary values are arranged on the right side of the 16 multi-value data patterns selected from the multi-value data patterns of the respective rows. Arrange the data in correspondence. The numbers between the multi-value data pattern column and the binary data column in the table are obtained by sequentially assigning serial numbers from the top to the rows corresponding to the multi-value data pattern column and the binary data, respectively. Lines that do not correspond to are marked as unused.

The conversion process from binary data to multi-value data based on this binary multi-value data conversion table is performed, for example, when binary data is converted into multi-value data and recorded on a recording medium such as an optical disk (for example, When the binary data is input from the host computer), the binary multi-value data conversion table is referred to, and the multi-value data (ternary data) of the row corresponding to the input binary data is output as the conversion result. The multi-value data is recorded on a recording medium.
Also, the conversion process from multi-value data to binary data based on this binary multi-value data conversion table is performed, for example, when reproducing multi-value data recorded on a recording medium by the above-described recording process. When data (ternary data) is input, the binary multi-value data conversion table is referred to, and binary data in a row corresponding to the input multi-value data is converted to the outside (for example, a host computer). Output.

In the above-described reference technique , the case where the multi-value data is ternary has been described. However, the present invention can be similarly implemented even when other multivalue data such as 5-value, 6-value, 7-value, and 9-value are not powers of 2.
In this way, by performing conversion processing from binary data to multi-value data or from multi-value data to binary data based on the binary multi-value data conversion table, the multi-value number of the multi-value data is converted to ternary. , 5-value, 6-value, 7-value, 9-value, etc., even if they are not powers of 2, binary data and multi-value data can be converted into each other.

Next, a description will be given multivalued data conversion processing method for implementation form of the present invention.
Tables 3 and 4 are lists showing examples of restrictions on the arrangement of the even value and the odd value of the multi-value data in the multi-value data pattern, respectively.
Tables 5 and 6 are tables showing an example of the binary multi-value data conversion table created by arrangement restrictions based on the lists of Tables 3 and 4, respectively.
Table 7 is a table showing an example of determination candidates for each multi-value data when three multi-value data are reproduced.
Tables 8 and 9 are lists used for explaining determination candidate determination processing in conversion processing based on the binary multi-value data conversion tables shown in Table 5 and Table 6, respectively.

Of the 3 ³ = 27 multi-value data patterns consisting of 3 (m = 3) 3 (n = 3) multi-value data (ternary data), A binary multi-value data correspondence table in which 2 ³ (k = 3) different multi-value data patterns in which the arrangement of even values and odd values of multi-value data is limited and 3-bit binary data is associated will be described. .
In this case, for example, 3-bit binary data is recorded on the recording medium with three ternary data, and the effect of increasing the recording capacity due to multi-value data recording cannot be obtained, but the explanation is easy to understand. This is because, for the purpose, a small number of multi-values and a small number of multi-value data are grouped together, and if the number of multi-values and the number of multi-value data increases, the effect of increasing the recording capacity can be obtained.

There are 8 ways to limit the arrangement (arrangement) of even values and odd values of 3 multi-value data, but select 4 different even odd arrangements (even odd patterns), each with 2 different patterns. If so, two types of arrangement restriction methods can be created. They are distinguished by a parameter P (= 0 or 1). Here, four types of arrangement restrictions indicated by P = 0 and P = 1 in Table 3 and Table 4, respectively, are used.
As shown in Table 3, in the restriction of arrangement of P = 0, among all the multi-value data patterns composed of three multi-value data, (even, even, even) (odd, even, odd) (even) , Odd number, odd number) (odd number, odd number, even number).
Further, as shown in Table 4, with the restriction of the arrangement of P = 1, (even number, odd number, even number) (odd number, odd number, odd number) is selected from all the multi-value data patterns composed of three multi-value data. This is a rule for selecting the corresponding four types of (even, even, odd) (odd, even, even).

Next, a method for determining the correspondence between three multi-value data and binary data according to the arrangement restrictions shown in Tables 3 and 4 will be described.
First, in the case of an even-numbered odd number arrangement with P = 0, among the multivalued data patterns of all three ternary data, the four-valued data patterns shown in P = 0 are 14 as shown in Table 5. There are streets.
The multi-value data pattern is (0,0,0) (0,0,2) (0,2,0) (0,2,2) (2,0,0) (2,0,2) ( 2,2,0) (2,2,2) (1,0,1) (1,2,1) (0,1,1) (2,1,1) (1,1,0) (1 , 1, 2).
From the 14 multi-value data patterns, 8 multi-value data patterns are selected which only correspond to all patterns of 3-bit binary data.

First, in the arrangement restriction of P = 0, the arrangement of the even value and the odd value of the multi-value data in the multi-value data pattern is (even, odd, even) (odd, odd, odd) (even, even, odd) Since there are four types (odd number, even number, even number), if two corresponding multi-value data patterns are selected, the multi-value data pattern of the multi-value data is randomized without bias and becomes a multi-value data signal. Since the special frequency component is not emphasized, it becomes easy to adapt to the frequency characteristics of the information recording / reproducing system and the transmission path.
Therefore, No. 1 shown in Table 5 is used. 8 to 13 multi-value data patterns (1, 0, 1) (1, 2, 1) (0, 1, 1) (2, 1, 1) (1, 1, 0) (1, 1, 2) 6 are selected. And the remaining No. 0 to 7 multi-value data pattern (0,0,0) (0,0,2) (0,2,0) (0,2,2) (2,0,0) (2,0,2) Two types of multi-value data patterns are selected from (2, 2, 0) (2, 2, 2).

First, (0, 0, 0) and (2, 2, 2) multi-value data patterns are excluded for the same reason as in the description based on Table 1. Furthermore, since “2” has a large intersymbol interference, the error rate at the time of reproduction decreases when it is isolated as much as possible. Therefore, “2” is (0, 0, 2) and (2 , 0, 0) is selected.
In this way, eight different multi-value data patterns (0, 0, 2) (2, 0, 0) (1, 0, 1) (1, 2, 1) (0, 1, 1) (2, 1, 1) (1, 1, 0) (1, 1, 2) are selected and associated with 3-bit binary data 000, 001, 010, 011, 100, 101, 110, 111, respectively. Therefore, 000 for (0,0,2), 001 for (2,0,0), 010 for (1,0,1), 011 for (1,2,1), (0,1 , 1) corresponds to 100, (2, 1, 1) corresponds to 101, (1, 1, 0) corresponds to 110, and (1, 1, 2) corresponds to 111.

  As shown in Table 5, the binary multi-value data conversion table shows the above-described 14 multi-value data patterns (0, 0, 0) to (1, 1, 2) at 0 to 13 at the left end of the table. The number (No.) of each row is assigned to each row, and the even-numbered and odd-numbered columns indicate the placement of even and odd values of each multivalued data in the multivalued data pattern. The eight types of 3-bit binary data are arranged in correspondence with the right side of the row of the eight types of multi-value data patterns selected from the patterns. The numbers between the multi-value data pattern column and the binary data column in the table are obtained by sequentially assigning serial numbers from the top to the rows corresponding to the multi-value data pattern column and the binary data, respectively. Lines that do not correspond to are marked as unused.

Next, in the case of an even-numbered odd number arrangement with P = 1, among the multivalued data patterns of the three ternary data, the multivalued data pattern having the four arrangements indicated by P = 0 is as shown in Table 6. There are 13 ways.
The multi-value data pattern is (0, 1, 0) (0, 1, 2) (2, 1, 0) (2, 1, 2) (1, 1, 1) (0, 0, 1) ( 0,2,1) (2,0,1) (2,2,1) (1,0,0) (1,0,2) (1,2,0) (1,2,2) .
In this case, all three are odd numbers. Since there is only one of four (1, 1, 1), this is selected, and the remaining three even-numbered odd-numbered arrangements (even, odd, even) (even, even, odd) (odd, even, even) (0, 1, 0) (0, 1, 2) (2, 1, 0) (2, 1, 2) (0, 0, 1) (0, 2, 1) (2, 0, 1) Two out of twelve multi-value data patterns of (2, 2, 1) (1, 0, 0) (1, 0, 2) (1, 2, 0) (1, 2, 2), or Three types of multi-value data patterns are selected.

First, (2, 1, 2) multi-value data patterns are excluded for the same reason as in Table 1. Further, since “2” has a large intersymbol interference, a multi-value data pattern (0, 2, 1) (2, 0, 1) (1, 0) having a large variation such as “02” or “20” is arranged. , 2) (1, 2, 0) are excluded because the error rate during reproduction increases. As a result, the remaining (0, 1, 0) (0, 1, 2) (2, 1, 0) (0, 0, 1) (2, 2, 1) (1, 0, 0) (1, 2 , 2).
As a result, the eight multi-value data patterns (0, 1, 0) (0, 1, 2) (2, 1, 0) (1, 1, 1) (0, 0, 1) shown in Table 6 are used. (2, 2, 1) (1, 0, 0) (1, 2, 2) is selected and associated with 3-bit binary data 000, 001, 010, 011, 100, 101, 110, 111, respectively. . Therefore, 000 for (0,1,0), 001 for (0,1,2), 010 for (2,1,0), 011 for (1,1,1), (0,0 , 1) to 100, (2, 2, 1) to 101, (1, 0, 0) to 110, and (1, 2, 2) to 111.

  As shown in Table 6, in the binary multi-value data conversion table, the above-mentioned 13 kinds of multi-value data patterns (0, 1, 0) to (1, 2, 2) are 0 to 12 at the left end of the table. The number (No.) of each row is assigned to each row, and the even-numbered and odd-numbered columns indicate the placement of even and odd values of each multivalued data in the multivalued data pattern. The eight types of 3-bit binary data are arranged in correspondence with the right side of the row of the eight types of multi-value data patterns selected from the patterns. The numbers between the multi-value data pattern column and the binary data column in the table are obtained by sequentially assigning serial numbers from the top to the rows corresponding to the multi-value data pattern column and the binary data, respectively. Lines that do not correspond to are marked as unused.

Next, if data conversion is performed based on the binary multi-value data conversion table in which the multi-value data pattern in which the arrangement of the even value and the odd value is restricted and the binary data are associated as described above, multi-value data reproduction is performed. Next, it will be described that the error rate can be reduced.
For example, when three pieces of multi-value data (x1, x2, x3) are reproduced, as shown in Table 7, x1 is “0” or “1”, and x2 is “1”. Or “2”, x3 is also “1” or “2”, and if there is no restriction on even-numbered odd arrangement, the combination of the three multi-value data determination candidates is (0, 1, 1) (0, 1, 2) (0, 2, 1) (0, 2, 2) (1, 1, 1) (1, 1, 2) (1, 2, 1) (1, 2, 2) is there.

  However, among the above eight combinations from the binary multi-value data conversion table in which even-numbered and odd-numbered arrangements shown in Table 5 and Table 6 are restricted, the existing determination candidates are either P = 0 or P = 1. There are three ways. In the case of P = 0, as shown in Table 8, there are three types (1,2,1) (0,1,1) (1,1,2). When P = 1, as shown in Table 9, there are three types (0, 1, 2) (1, 1, 1) (1, 2, 2). Therefore, since the number of judgment candidates can be reduced, the error rate during reproduction can be reduced inevitably.

Next, as a method for outputting one determination candidate from a plurality of determination candidates as a determination result, a known technique may be used (for example, described in paragraphs “0047” to “0051” of JP-A-2003-168980). Technology).
In the known technique, four multi-value data are grouped into one, and in this embodiment, three multi-value data are grouped into one, but the basic processing is the same.
Next, an outline of a method for outputting one determination candidate from a plurality of determination candidates as a determination result will be described.

First, the square or the absolute value of the error between the reference signal value corresponding to the multi-value data of each judgment candidate and the signal value of the multi-value data in the actual reproduction signal is calculated. Further, for each determination candidate, the square or absolute value of the error is added, and the determination candidate with the minimum added value is output as the determination result.
In this way, a determination candidate whose actual reproduction signal value is closest to the reference signal of the determination candidate is output as a determination result.
Furthermore, in this embodiment, data patterns with a large error rate such as “02” and “20” are excluded, and conversely, by using many patterns with a low error rate, an error during data reproduction can be obtained. The rate can be further reduced.

The conversion process from binary data to multi-value data based on this binary multi-value data conversion table is performed, for example, when binary data is converted into multi-value data and recorded on a recording medium such as an optical disk (for example, When the binary data is input from the host computer), the binary multi-value data conversion table is referred to, and the multi-value data (ternary data) of the row corresponding to the input binary data is output as the conversion result. The multi-value data is recorded on a recording medium.
Also, the conversion process from multi-value data to binary data based on this binary multi-value data conversion table is performed, for example, when reproducing multi-value data recorded on a recording medium by the above-described recording process. When data (ternary data) is input, the binary multi-value data conversion table is referred to, and binary data in a row corresponding to the input multi-value data is converted to the outside (for example, a host computer). Output.

Next, when converting from binary data to multi-value data or from multi-value data to binary data, the binary multi-value data conversion table in the case of P = 0 shown in Table 5 and P = Only one of the binary multi-value data conversion tables in the case of 1 may be used, but both may be used.
In the following description, one group of three multi-value data is referred to as one set.
For example, the binary multi-value data conversion table in the case of P = 0 shown in Table 5 and the binary multi-value data conversion table in the case of P = 1 shown in Table 6 are changed to a set unit for selecting “ As a numerical series consisting of “0” and “1”,
P = 0, 1, 0, 1, 0, 1,. . . . .
P = 0, 0, 1, 1, 0, 0,. . . . .
Etc. may be defined to switch the binary multi-value data conversion table for each set.
Further, as P, a random number that defines an initial value and a generation method may be used.

  In this way, all types of even-numbered and odd-numbered arrangements are used by using two types of restrictions on the even-numbered and odd-numbered arrangements of multi-valued data and using one of the two kinds of restrictions for every m pieces of multi-valued data Therefore, the data pattern of the multi-value data is randomized without bias, and the randomness of the multi-value data can be further improved, and a special frequency component is not emphasized in the multi-value data signal. It can be easily adapted to the frequency characteristics of the information recording / reproducing system and the transmission path.

Further, as a method of selecting the above two types of binary multi-value data conversion tables, a binary multi-value used in the next set is used by using multi-value data in one set instead of using a fixed numerical series. A value data conversion table may be determined.
For example, three multi-value data in one set are x1, x2, and x3, P is an initial value, P (1) of the first set is “0”, and the i-th (i ≧ 2 P of a set of (integer) is defined by logical operation results such as Equations 1 to 3.

(Equation 1)
P (i) = P (i−1) eor (i−1) th set of x3 LSBs (eor: exclusive OR operator)
(Equation 2)
P (i) = not (i−1) -th set of x1 MSBs (not: logical negation operator)
(Equation 3)
P (i) = (i−1) th set of x2 LSBs

Here, the least significant bit (LSB) indicates the least significant bit when multi-value data is expressed in binary.
For example, multivalued data 2 is “10” in binary, and its LSB is “0”.
The most significant bit (MSB) indicates the most significant bit when multi-value data is expressed in binary.
For example, multivalued data 2 is “10” in binary, and its MSB is “1”.
By doing so, a correlation can be generated between a plurality of sets.
As a result, in multi-value data determination processing at the time of data reproduction, rather than determining multi-value data in the set from multi-value data in one set, multiple values are input by inputting a plurality of sets. Data can be determined collectively.

Next, as a method for collectively determining multi-value data over a plurality of sets, a known technique may be used (for example, a technique described in paragraphs “0057” to “0068” of JP-A-2003-168980). .
In the known technique, four multi-value data are grouped into one, and in this embodiment, three multi-value data are grouped into one, but the basic processing is the same.
Next, an outline of a method for collectively determining multi-value data over a plurality of sets will be described.
Here, as an example, a method for collectively determining multi-value data over two sets will be described.

First, in each set, the square of the error between the reference signal value corresponding to the multi-value data of each determination candidate and the signal value of the multi-value data in the actual reproduction signal, or the absolute value is calculated.
Furthermore, the square or absolute value of the error is added for each determination candidate in each set.
Next, an error addition value is further added for each set of multi-value data determination candidates over two sets based on the correlation between sets. The determination candidates over two sets with the minimum added value are output as determination results.
In this way, the determination candidate whose output signal value is closest to the reference signal of the determination candidates over two sets is output as a determination result.
As a result, multi-value determination over a plurality of sets can be performed, and the comparison between the actual reproduction signal value and the reference signal of the determination candidate is determined from more multi-value data, so that errors can be further reduced.
In this way, by using the predetermined relational expression including the current m multi-value data to determine the limit to be used in the next m multi-value data, the correlation between the previous and next m multi-value data is correlated. Thus, the error rate at the time of reproducing multi-value data can be further reduced.

Next, a description will be given of the multi-level data conversion processing equipment in the reference technique of the present invention.
Figure 1 is a block diagram showing the configuration of a multilevel system is multi-valued data conversion processing equipment in the reference technique of the present invention.
This multi-value conversion device is a device that converts binary data into multi-value data by a conversion processing method based on the binary multi-value data conversion table shown in Table 1.
This multi-value quantization apparatus has a shift register 1 that holds continuous 4 (k = 4) bit binary data and inputs it to the binary / multi-value conversion table 2, and the 4 bits input by the shift register 1. The binary / multi-value conversion table 3 for converting the binary data into 16 multi-value data patterns out of 27 multi-value data patterns composed of three ternary multi-value data, and the binary multi-value data The shift register 3 holds and outputs multi-value data of a multi-value data pattern composed of three multi-value data converted by the value data conversion table 3.

The binary / multilevel conversion table 3 includes a 4-bit input and a 6-bit output, and the input is 4-bit binary data. In addition, since the multi-value data is ternary, one multi-value data requires 2 bits. Therefore, three multi-value data are output in 6 bits.
The binary / multi-value conversion table 3 can be realized by a semiconductor memory composed of a 4-bit address and 6-bit data or a combinational logic circuit.
Next, the operation of this multilevel device will be described.
First, binary serial data is input to the shift register 1 and output to the binary / multilevel conversion table 2 as parallel data every 4 bits. The output 4-bit data is input to the binary / multi-value conversion table 2, and the binary / multi-value conversion table 2 converts the 4-bit binary data into multi-value data consisting of 2 bits by the conversion process described above. Output. The three output multi-value data are input to the shift register 3 and output as serial data.

As a result, it is possible to realize an apparatus that generates a multi-value data series having a multi-value number other than a power of 2.
In this way, by converting k-bit binary data into m n-value multi-value data, binary / multi-value data conversion applicable to multi-value data having a multi-value number other than a power of 2 is performed. It can be carried out.

It will now be described implementation form of multi-level data conversion processing device of the present invention.
Figure 2 is a block diagram showing the configuration of a multilevel system is the implementation form of multi-level data conversion processing device of the present invention.
This multi-value conversion device is a device that converts binary data by the conversion processing method into multi-value data based on the binary multi-value data conversion table shown in Table 2.

  This multi-value quantization apparatus holds a continuous 3-bit binary data and inputs it to a binary / multi-value conversion table 12 and a 4-bit binary data inputted by the shift register 11. Out of 27 multi-value data patterns composed of three ternary multi-value data, the arrangement of the even value and odd value of the multi-value data in the multi-value data pattern is restricted by two kinds of preset rules. Multi-value data of a multi-value data pattern consisting of a binary / multi-value conversion table 12 to be converted into eight multi-value data patterns and three multi-value data converted by the binary / multi-value conversion table 12 Two types of rules for conversion processing in the shift register 13 that holds and outputs and the binary / multilevel conversion table 12 (for conversion processing due to the above-mentioned arrangement restriction of P = 0 and restriction on the arrangement of P = 1) That comprised the conversion process) P = 0 or 1 for switching from the arithmetic circuit 14 for output to the binary-multivalue conversion table 12 determined based on any of the operations described above having 1 to 3.

The binary / multi-value conversion table 12 is composed of a 4-bit input and a 6-bit output. The input is 3-bit binary data and 1-bit P (= 0 or 1). In addition, since the multi-value data is ternary, one multi-value data requires 2 bits. Therefore, three multi-value data are output in 6 bits.
The binary / multilevel conversion table 12 can be realized by a semiconductor memory composed of a 4-bit address and 6-bit data, or a combinational logic circuit.

Next, the operation of this multilevel device will be described.
First, binary serial data is input to the shift register 11 and output to the binary / multilevel conversion table 12 as parallel data every 3 bits. At the same time, the arithmetic circuit 14 outputs the value of P of the set. The initial value is 0. Here, in order to output P obtained by the calculation based on the above equation 1, x3 LSB of the shift register 13 is input and P is output. The above 4-bit data is input to the binary / multi-value conversion table 12, and the binary / multi-value conversion table 12 outputs three multi-value data composed of 2 bits by the above-described conversion processing. The three output multi-value data are input to the shift register 13 and output as serial data.

As a result, it is possible to realize an apparatus that generates a multi-value data series that is a multi-value number other than a power of 2 and that has a correlation between sets and can reduce an error rate during multi-value data reproduction.
In this way, by converting the k-bit binary data into m n-value multi-value data in which the even and odd arrangements of the multi-value data are limited, the error rate during multi-value data reproduction is reduced. In addition, binary / multi-value data conversion applicable to multi-value data having a multi-value number other than a power of 2 can be performed.

Next, a description will be given of the multi-level data conversion processing equipment in the reference technique of the present invention.
Figure 3 is a block diagram showing the configuration of a multilevel decision unit is a multi-value data conversion processing equipment in the reference technique of the present invention.
This multi-value determination device is a device that converts multi-value data into binary data by a conversion processing method based on the binary multi-value data conversion table shown in Table 1.
The threshold value judgment circuit 21 performs AD (analog / digital) converted reproduction signal data (k (an integer where m ≧ 2; an integer where n ≧ 3; k is a maximum integer where n ^m > 2 ^k )) is made to correspond to binary data bits, and inputs the reproduction signal of the multi-level data patterns 2 ^k street) of the data pattern of n ^m Street consisting multivalued data of the m n values, the predetermined threshold One multi-value data is determined by value, and a first determination candidate and a second determination candidate of m multi-value data are output.

Each of the shift registers 22 and 23 holds a first candidate and a second candidate of multi-value data (m multi-value data) in one set output from the threshold determination circuit 21.
The candidate combination output circuit 24 combines the first determination candidate and the second determination candidate of the m multi-value data output from the shift registers 22 and 23, respectively, to m m-value data in one set. Outputs the judgment candidates.
The reference signal generation circuit 25 outputs a reference signal value for the determination candidate output by the candidate combination output circuit 24.
The error calculation circuit 26 calculates and outputs a square value of errors or a total value of absolute values between the reference signal value output for each determination candidate by the reference signal generation circuit 25 and the reproduction signal data.

The multi-value / binary conversion table 27 is obtained by converting the conversion processing based on the binary multi-value data correspondence table shown in Table 1 into hardware. Data and 1-bit unused flag are output. The non-use flag indicates that the multi-value data pattern input to the determination circuit 28 is non-use, and the 4-bit binary data output from the multi-value / binary conversion table 27 is invalid.
The multi-value / binary conversion table 27 can be realized by a semiconductor memory composed of a 6-bit address and 5-bit data, or a combinational logic circuit.

  The determination circuit 28 inputs each determination candidate output from the candidate combination output circuit 24 and the total value of errors for each determination candidate from the error calculation circuit 26. Further, the input determination candidate is output to the multi-value / binary conversion table 27, and the determination candidate input from the candidate combination output circuit 24 based on the non-use flag output from the multi-value / binary conversion table 27. It is determined whether or not is not used. Then, a determination candidate that is a non-use determination candidate and has the smallest total error value is output as a determination result to the multi-value / binary conversion table 27 again. As a result, the binary data after determination is output from the multi-value / binary conversion table 27.

That is, the determination circuit 28, and the fall in one of the multi-value data pattern of 2 ^k as based on the determination candidate output by sum and the candidate of the combination output circuit 24 output by the error calculation circuit 26 A multi-value data pattern composed of m multi-value data having the minimum total value is output. Then, the multi-value / binary conversion table 27 outputs k-bit binary data corresponding to the multi-value data pattern output from the discrimination circuit 28.
In this way, it is possible to realize a multi-value data processing apparatus that performs multi-value data determination processing that can be applied to multi-value data having a multi-value number other than a power of 2.

Next, still another embodiment of the multi-value data conversion processing apparatus of the present invention will be described.
FIG. 4 is a block diagram showing a configuration of a multi-value determining device which is still another embodiment of the multi-value data conversion processing device of the present invention.
This multi-value determination device is a device that converts multi-value data into binary data by a conversion processing method based on the binary multi-value data conversion table shown in Table 2.
Here, as an example, an example is shown in which multi-value data over two sets is collectively determined using the correlation between sets of multi-value data.
The threshold value judgment circuit 31 performs AD (analog / digital) converted reproduction signal data (k (an integer where m ≧ 2; an integer where n ≧ 3; k is a maximum integer where n ^m > 2 ^{k + 1} )) Among mn multi-value data patterns consisting of ^m n-value multi-value data corresponding to binary data of bits, even values of the multi-value data in the multi-value data pattern according to a preset rule enter the reproduced signal) of the multi-level data patterns 2 ^k street that limits the placement of odd value, the first determination of m of the multi-level data to determine the one multi-valued data at a predetermined threshold value The candidate and the second determination candidate are output.

The shift registers 32, 33, 34, and 35 hold first and second candidates of two sets of multi-value data (m multi-value data) output from the threshold value determination circuit 31, respectively. . The arithmetic circuit 36 has two types of rules for the conversion process in the multi-value / binary conversion table 40 (the conversion process based on the arrangement restriction of P = 0 and the conversion process based on the restriction of the arrangement P = 1). P = 0 or 1 for switching to the rule used in the set is obtained based on any one of the above formulas 1 to 3 and output. Here, in order to output P by the calculation of Equation 1, the LSB of x3 is input and P is output.
The candidate combination output circuit 37 includes a first candidate and a second candidate of the i-th set from the shift registers 32 and 33, a first candidate and a second candidate of the i + 1-th set from the shift registers 34 and 35, and The value of P is input from the arithmetic circuit 36, and the determination candidates of m multi-value data in one set obtained by combining the first determination candidates and the second determination candidates for two sets are output.

The reference signal generation circuit 38 outputs a reference signal value for the determination candidate output by the candidate combination output circuit 37.
The error calculation circuit 39 calculates and outputs a square value of errors or a total value of absolute values between the reference signal value output for each determination candidate by the reference signal generation circuit 38 and the reproduction signal data.
The multi-value / binary conversion table 40 is obtained by converting the conversion processing based on the binary multi-value data correspondence table shown in Table 2 into hardware. Data and 1-bit unused flag are output. The non-use flag indicates that the multi-value data pattern input to the determination circuit 41 is not used, and the 3-bit binary data output from the multi-value / binary conversion table 40 is invalid.
The multi-value / binary conversion table 40 can be realized by a semiconductor memory composed of a 6-bit address and 4-bit data, or a combinational logic circuit.

The determination circuit 41 inputs each determination candidate output from the candidate combination output circuit 37 and the total error value for each determination candidate from the error calculation circuit 39. Further, the input determination candidate is output to the multi-value / binary conversion table 40, and the determination candidate input from the candidate combination output circuit 37 based on the non-use flag output from the multi-value / binary conversion table 40. It is determined whether or not is not used. Then, a determination candidate that is a non-use determination candidate and has the smallest total error value is output as a determination result to the multi-value / binary conversion table 40 again. As a result, the binary data after determination is output from the multi-value / binary conversion table 40.
In this way, it is possible to realize a multi-value data processing apparatus that can be applied to multi-value data having a multi-value number other than a power of 2, and that performs multi-value data determination processing that can reduce an error rate during multi-value data reproduction.

Figure 5 is a block diagram showing an optical disk equipment employing the multi-value device and the multi-level determination device.
The optical disc 51 is a recording medium such as a CD-R disc, a CD-RW disc, a DVD-R disc, a DVD-RW disc, a DVD + R disc, a DVD + RW disc, or a DVD-RAM disc for recording multi-value data (information). A spiral or concentric track is formed and marks are recorded along the track. The track is slightly meandering with a certain period.
The motor 52 rotates the optical disc 51 at a predetermined rotation speed when the multi-value data is recorded on the optical disc 51 or the multi-value data recorded is reproduced.

The optical head 53 irradiates the recording surface of the optical disc 51 with a laser beam spot to form a mark to record multi-value data, and scans the mark of the multi-value data recorded on the recording surface with the laser beam spot for electrical recording. Detect and output the signal.
The operational amplifier circuit 54 arithmetically amplifies the electrical signal output from the optical head 53 and determines whether the reproduction signal data corresponding to the mark on the optical disk 51 and the laser light spot are in focus on the recording surface of the optical disk 51. Are output, a tracking error signal indicating whether or not the laser beam spot is scanning along the track, a signal corresponding to the meandering of the track, and the like.
The servo circuit 55 focuses the laser light spot on the recording surface of the optical disk 51 by using a focus error signal, tracking error signal, and signal corresponding to the meandering of the track, scans the track correctly, and makes the optical disk 51 have a constant linear velocity or angular velocity. Rotate constantly.

The laser drive circuit 56 outputs a signal for recording a mark on the optical disc 51 with a laser beam in accordance with the signal output from the modulation circuit 57.
The modulation circuit 57 outputs a signal indicating a mark and space (multi-value data = 0: nothing is recorded) having a size corresponding to the multi-value data input from the synchronization signal adding circuit 58.
The synchronizing signal adding circuit 58 adds a synchronizing signal for indicating a predetermined amount of data delimiter to the multi-value data input from the multi-value converting circuit 59.
The multi-value conversion circuit 59 is a multi-value conversion device that converts the binary data input from the error correction data addition circuit 60 into multi-value data, and uses the multi-value conversion device shown in FIG. 1 or FIG.
The error correction data adding circuit 60 adds data for error correction to the input binary data.

The AD conversion circuit 61 converts the reproduction signal from the operational amplification circuit 54 into a digital signal.
A phase locked loop (PLL) circuit and a synchronization detection circuit 62 detect a synchronization signal in the reproduction signal output from the operational amplifier circuit 54 and output a clock signal synchronized with the multilevel data.
The waveform equalization circuit 63 performs waveform equalization processing on the reproduction signal output from the AD conversion circuit 61.
The multi-value determination circuit 64 determines multi-value data based on the reproduction signal output from the waveform equalization circuit 63, converts the determined multi-value data into corresponding binary data, and outputs it. The multi-value determination device shown in FIG. 3 or FIG. 4 is used.
The error correction circuit 65 performs error correction on the binary data input from the multi-level determination circuit 64 using error correction data and outputs the result.

Although not shown, this optical disc apparatus also includes a known mechanism for searching for data on the optical disc 51 by moving the optical head 53 in the radial direction of the optical disc 51.
In addition, an interface circuit for use as an information storage device for a computer and a microprocessor for controlling the entire operation of the optical disk device are well known, and are not shown.
When a DVD + RW disc is used as the optical disc 51, a laser diode (LD) having a laser beam wavelength of 650 nm is used for the optical head 53. Also, a blue laser capable of higher density recording and a phase change optical disk corresponding to the laser wavelength may be used.

Next, the operation of this optical disk apparatus will be described.
First, an operation when binary data is converted into multi-value data and recorded on the optical disc 51 will be described.
In this optical disc apparatus, the binary data input to the error correction data adding circuit 60 is divided into a predetermined amount of blocks, and error correction data is added. Thereafter, the multi-value conversion circuit 59 converts the data into multi-value data in units of sets. Further, a synchronization signal is added every predetermined number of sets by the synchronization signal adding circuit 58. Further, a signal indicating a mark and a space (multi-value data = 0: nothing is recorded) corresponding to each value of the multi-value data to which the synchronization signal is added by the modulation circuit 57 is output, and the laser drive circuit 56 Based on the signal, a signal for driving a laser beam for recording a mark on the optical disc 51 is generated. Then, the optical head 53 irradiates the optical disk 51 with laser light based on the signal, and records multi-value data marks.

Next, an operation when reading a reproduction signal of multi-value data from the optical disc 51, determining multi-value data from the reproduction signal, and outputting binary data corresponding to the determined multi-value data will be described. .
This optical disk apparatus irradiates an optical disk 51 with laser light having a constant intensity by an optical head 53, and photoelectrically converts the reflected light to obtain an electrical signal. The obtained signal is input to the operational amplifier circuit 54. The operational amplifier circuit 54 outputs a focus error signal and a tracking error signal to the servo circuit 55, and the servo circuit 55 stably rotates the optical disc 51 by these signals. Then, tracking of the optical head 53 and focus control are performed, and a reproduction signal of multi-value data is detected by the optical head 53.

  The operational amplifier 54 operates and amplifies the reproduction signal detected by the optical head 53 to output multilevel data reproduction signal data. The PLL circuit and the synchronization detection circuit 62 detect the synchronization signal to detect the multilevel data (symbol). ) And a digital data is obtained by the AD conversion circuit 61. Thereafter, waveform equalization is performed by the waveform equalization circuit 63, multivalue data is determined by the multivalue determination circuit 64, converted into binary data corresponding to the determined multivalue data, and output. Further, the error correction circuit 65 detects and corrects an error and outputs corrected binary data.

  The multi-value data conversion processing method and multi-value data conversion processing apparatus according to the present invention can be applied to personal computers such as desktop personal computers and notebook personal computers.

Is a block diagram showing the configuration of a multilevel system is multi-valued data conversion processing equipment in the reference technique of the present invention. It is a block diagram showing the configuration of a multilevel system is the implementation form of multi-level data conversion processing device of the present invention. It is a block diagram showing the configuration of a multilevel decision unit is a multi-value data conversion processing equipment in the reference technique of the present invention. It is a block diagram which shows the structure of the multi-value determination apparatus which is further another embodiment of the multi-value data conversion processing apparatus of this invention. It is a block diagram showing an optical disk equipment to which the multi-level determination device of FIG. 1 or multilevel device and FIG. 3 or 4 of Figure 2.

Explanation of symbols

1, 3, 11, 13, 22, 23, 32, 33, 34, 35: Shift register 2, 12: Binary / multi-value conversion table 14, 36: Arithmetic circuit 21, 31: Threshold judgment circuit 24, 37: Candidate combination output circuit 25, 38: Reference signal generation circuit 26, 39: Error calculation circuit 27, 40: Multi-value / binary conversion table 28, 41: Discrimination circuit 51: Optical disk 52: Motor 53: Optical head 54 : Operational amplifier circuit 55: Servo circuit 56: Laser drive circuit 57: Modulation circuit 58: Synchronization signal addition circuit 59: Multi-level circuit 60: Error correction data addition circuit 61: A / D conversion circuit 62: PLL circuit and synchronization Detection circuit 63: Waveform equalization circuit 64: Multi-value determination circuit 65: Error correction circuit

Claims (6)

m of the multi-level data pattern of n ^m Street consisting multivalued data (m ≧ 2 is an integer) number of n (n ≧ 3 is an integer) values, multiple-in multi-level data pattern rule preset Binary multivalue corresponding to 2 ^k (maximum integer ^satisfying n ^m > 2 ^{k + 1} ) and k-bit binary data corresponding to arrangement of even value and odd value of value data A multi-value data conversion processing method comprising: performing conversion processing from the binary data to the multi-value data or from the multi-value data to the binary data based on a data correspondence table. In multi-value data conversion method according to claim 1, wherein, multi-value data pattern of the 2 ^k as the number of multi-value data pattern error rate during reproduction is lower than the multi-value data pattern error rate is high at the time of reproduction A multi-value data conversion processing method comprising a multi-value data pattern having a large number of data. 2. The multi-value data conversion processing method according to claim 1 , wherein the preset rule includes two kinds of rules for restricting the arrangement of the even value and the odd value of the multi-value data in the multi-value data pattern. multivalue data correspondence table, the out of m pieces of multivalued data pattern n ^m Street consisting multivalued data of n values, the two kinds of even values of multi-valued data for each in multi-value data pattern rule ^2k (maximum integer with n ^m > 2 ^{k + 1} ) in which the arrangement of odd values is limited and two types of binary multi-value data corresponding to k-bit binary data A conversion process from the binary data to the multi-value data or from the multi-value data to the binary data, any of the two types of binary multi-value data correspondence tables for every m multi-value data. Select one of the two values Multi-level data conversion processing method in the value data correspondence table and performing the conversion process. 4. The multi-value data conversion processing method according to claim 3 , wherein the selection of either one of the two types of binary multi-value data correspondence table is determined by a calculation result based on a predetermined relational expression. Conversion processing method. Input means for inputting binary data of k (an integer where m ≧ 2 and an integer where n ≧ 3, k is the largest integer where n ^m > 2 ^k ), and k bits input by the input means The arrangement of the even value and the odd value of the multi-value data in the multi-value data pattern in the multi-value data pattern among the n ^m multi-value data patterns made up of ^m n-value multi-value data. It includes a binary multi-value data conversion means for converting the multi-value data pattern limited by the 2 ^k street, and output means for outputting multi-valued data of the multi-level data patterns converted by said binary multi-value data conversion unit A multi-value data conversion processing device characterized by that. It consists of m n-valued multi-value data corresponding to binary data of k (an integer where m ≧ 2 and an integer where n ≧ 3, k is the largest integer where n ^m > 2 ^{k + 1} ) among multi-valued data pattern n ^m as inputs a reproduction signal of the multi-level data patterns 2 ^k street with limited placement of even and odd values of multi-value data in the multi-level data pattern rule preset Determination candidate output means for determining one multi-value data with a predetermined threshold and outputting a first determination candidate and a second determination candidate of m multi-value data, and the determination candidate output means A judgment candidate combination output means for combining the first judgment candidates and the second judgment candidates for the outputted m pieces of multi-valued data and outputting m judgment candidates for the multi-value data; and the judgment candidate combination output means Reference signal that outputs the reference signal value for the judgment candidate output by An output means; and a total value output means for obtaining and outputting a square value or a sum of absolute values of errors between the reference signal value output for each determination candidate by the reference signal value output means and the reproduction signal; in applicable to and the total value to one of the multi-value data pattern of the 2 ^k as based on the determination candidates outputted by the determination candidate associations output means the sum output by the sum output means minimum Multi-value data pattern output means for outputting a multi-value data pattern composed of a certain number m of multi-value data, and k-bit binary data corresponding to the multi-value data pattern outputted by the multi-value data pattern output means are outputted. A multi-value data conversion processing apparatus comprising:

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