JP4299687B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP4299687B2
JP4299687B2 JP2004027208A JP2004027208A JP4299687B2 JP 4299687 B2 JP4299687 B2 JP 4299687B2 JP 2004027208 A JP2004027208 A JP 2004027208A JP 2004027208 A JP2004027208 A JP 2004027208A JP 4299687 B2 JP4299687 B2 JP 4299687B2
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envelope
semiconductor element
semiconductor device
conductive electrode
optical member
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JP2005223017A (en
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幸之 野世
栄造 藤井
豊 原田
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

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  • Solid State Image Pick-Up Elements (AREA)

Description

本発明は、撮像機能および受光機能を有する半導体素子が搭載されたパッケージとフィルターおよびレンズ等の光学部材等とを備える半導体装置に関する。   The present invention relates to a semiconductor device including a package on which a semiconductor element having an imaging function and a light receiving function is mounted and an optical member such as a filter and a lens.

図11は従来の半導体装置90の構成を示す斜視図であり、図12は図11に示す面JJに沿った断面図である。半導体装置90は、中空直方体形状をした外囲器91を備えている。外囲器91は、主剤のエポキシ樹脂、硬化剤のフェノール樹脂、アミン系の硬化促進剤、離型ワックス、カーボンブラック、密着剤、シリカ微粒を混合した充填剤等を所定比で混合した樹脂によって形成されている。半導体装置90は、樹脂製SOP(Small Outline Package)を構成している。   11 is a perspective view showing a configuration of a conventional semiconductor device 90, and FIG. 12 is a cross-sectional view taken along a plane JJ shown in FIG. The semiconductor device 90 includes an envelope 91 having a hollow rectangular parallelepiped shape. The envelope 91 is made of a resin in which a main component epoxy resin, a curing agent phenol resin, an amine curing accelerator, a release wax, carbon black, an adhesive, a filler mixed with silica fine particles, etc. are mixed at a predetermined ratio. Is formed. The semiconductor device 90 constitutes a resin-made SOP (Small Outline Package).

外囲器91の内部には、撮像機能を有する半導体素子98が、熱硬化型樹脂からなる固着部材92によって取り付けられている。半導体素子98の上面には、電極端子80が設けられている。外囲器91の側壁には、複数の外部端子97が外壁から内側へ延在するように設けられている。各外部端子97の外囲器91の内側には、内部端子96が設けられている。内部端子96と電極端子80とは、ボンディングワイヤーによって接続されている。外囲器91に形成された開口を覆うように防塵および防湿のための透明なガラス板98が設けられている。ガラス板98は、封止物94によって外囲器91の上面に固定されている。
特開平11−54543号公報(第5頁、図7)
Inside the envelope 91, a semiconductor element 98 having an imaging function is attached by a fixing member 92 made of a thermosetting resin. An electrode terminal 80 is provided on the upper surface of the semiconductor element 98. A plurality of external terminals 97 are provided on the side wall of the envelope 91 so as to extend inward from the outer wall. An internal terminal 96 is provided inside the envelope 91 of each external terminal 97. The internal terminal 96 and the electrode terminal 80 are connected by a bonding wire. A transparent glass plate 98 for dustproof and moistureproof is provided so as to cover the opening formed in the envelope 91. The glass plate 98 is fixed to the upper surface of the envelope 91 by a sealing material 94.
JP-A-11-54543 (5th page, FIG. 7)

しかしながら、図11および図12を参照して前述した従来の構成では、パッケージの実装形態がDIP(Dual In−line Package)、QFP(Quad Flat Package)といった大型パッケージが現在の主流であるのに対し、装置の動向は軽薄短小に向かっており、市場でそれらに適用される構成部品も当然小型化指向のものが要望されるにもかかわらず、現状は必ずしも市場の要望に沿った形で電子部品の小型薄型化が進んでいないのが実態である。   However, in the conventional configuration described above with reference to FIGS. 11 and 12, large packages such as DIP (Dual In-Line Package) and QFP (Quad Flat Package) are currently mainstream. However, the trend of equipment is toward light, thin and short, and despite the fact that components applied to them in the market are naturally required to be miniaturized, electronic components are always in line with market demands. The actual situation is that the miniaturization and thinning have not progressed.

前述した従来のパッケージは、外囲器91の中に外部端子97を埋設した構造であったため、外囲器91の内部に外部端子97を形成するために複雑な封止工程が必要である。このような封止工程では、外囲器91と外部端子97との間の位置精度を確保することが困難であり、外部端子97を形成した後も外部端子97の表面に樹脂膜が付いて歩留まりが低下する、といった問題があった。   Since the conventional package described above has a structure in which the external terminal 97 is embedded in the envelope 91, a complicated sealing process is required to form the external terminal 97 inside the envelope 91. In such a sealing process, it is difficult to ensure the positional accuracy between the envelope 91 and the external terminal 97, and a resin film is attached to the surface of the external terminal 97 even after the external terminal 97 is formed. There was a problem that the yield decreased.

また、半導体素子98に設けられた電極端子80と外部端子97とをボンディングワイヤーによって電気的に接続するように構成されているため、これに関連する工程が複雑になり、歩留まりの点で問題があった。   In addition, since the electrode terminal 80 provided in the semiconductor element 98 and the external terminal 97 are configured to be electrically connected by a bonding wire, a process related to this is complicated, and there is a problem in terms of yield. there were.

本発明の目的は、簡略な工程によって高い歩留まりで製造することができる半導体装置を提供することにある。   An object of the present invention is to provide a semiconductor device that can be manufactured with a high yield by a simple process.

本発明に係る半導体装置は、光学部材と、前記光学部材に対向するように形成された主面を有する半導体素子と、前記光学部材の前記半導体素子に対向する面の周縁に形成された複数の導電性電極膜と、前記複数の導電性電極膜のそれぞれと対向するように前記半導体素子の前記主面の周縁にそれぞれ形成された複数の電極端子と、前記導電性電極膜に接合するように前記複数の電極端子のそれぞれの上に形成された複数の金属突起と、前記半導体素子を囲むように前記複数の導電性電極膜の上に設けられた外囲器と、前記半導体素子と前記外囲器と前記光学部材とを固定するために前記半導体素子と前記外囲器との間に塗布された封止物と、前記複数の導電性電極膜のそれぞれに対して前記外囲器の外側において接合された複数の外部端子とを具備することを特徴とする。   A semiconductor device according to the present invention includes an optical member, a semiconductor element having a main surface formed to face the optical member, and a plurality of edges formed on the periphery of the surface of the optical member facing the semiconductor element. A conductive electrode film, a plurality of electrode terminals respectively formed on a peripheral edge of the main surface of the semiconductor element so as to face each of the plurality of conductive electrode films, and joined to the conductive electrode film A plurality of metal protrusions formed on each of the plurality of electrode terminals; an envelope provided on the plurality of conductive electrode films so as to surround the semiconductor element; the semiconductor element; A sealing material applied between the semiconductor element and the envelope to fix the envelope and the optical member, and an outer side of the envelope with respect to each of the plurality of conductive electrode films Multiple external terminals joined at Characterized by including the.

本発明によれば、簡略な工程によって高い歩留まりで製造することができる半導体装置を提供することができる。   According to the present invention, it is possible to provide a semiconductor device that can be manufactured with a high yield by a simple process.

本実施の形態に係る半導体装置においては、光学部材の半導体素子に対向する面の周縁に形成された複数の導電性電極膜と、複数の導電性電極膜のそれぞれと対向するように半導体素子の主面の周縁にそれぞれ形成された複数の電極端子と、導電性電極膜に接合するように複数の電極端子のそれぞれの上に形成された複数の金属突起と、前記半導体素子を囲むように前記複数の導電性電極膜の上に設けられた外囲器と、半導体素子と外囲器と光学部材とを固定するために半導体素子と外囲器との間に塗布された封止物と、複数の導電性電極膜のそれぞれに対して外囲器の外側において接合された複数の外部端子とが設けられている。このため、半導体素子と電気的に接続される外部端子を外囲器の外側に設けることができるので、外部端子を外囲器の中に埋設させる必要が無い。その結果、外囲器の中に外部端子を形成するための複雑な封止工程が不要であり、簡略な工程によって半導体装置を製造することができる。   In the semiconductor device according to the present embodiment, the plurality of conductive electrode films formed on the periphery of the surface facing the semiconductor element of the optical member, and the semiconductor element so as to face each of the plurality of conductive electrode films. A plurality of electrode terminals respectively formed on the peripheral edge of the main surface; a plurality of metal protrusions formed on each of the plurality of electrode terminals so as to be joined to the conductive electrode film; An envelope provided on the plurality of conductive electrode films; a sealing material applied between the semiconductor element and the envelope to fix the semiconductor element, the envelope, and the optical member; A plurality of external terminals joined to each of the plurality of conductive electrode films outside the envelope are provided. For this reason, since the external terminal electrically connected with the semiconductor element can be provided outside the envelope, it is not necessary to embed the external terminal in the envelope. As a result, a complicated sealing process for forming an external terminal in the envelope is unnecessary, and a semiconductor device can be manufactured by a simple process.

この実施の形態では、前記外囲器は、外側に形成された外側面を有しており、前記外囲器の前記外側面には、前記複数の外部端子をそれぞれ固定するための複数の溝が形成されていることが好ましい。   In this embodiment, the envelope has an outer surface formed on the outside, and a plurality of grooves for fixing the plurality of external terminals to the outer surface of the envelope. Is preferably formed.

前記半導体素子へ向かう湿気を遮断するために前記外囲器を覆うように設けられた湿気遮断部材をさらに具備していることが好ましい。   It is preferable that the apparatus further includes a moisture blocking member provided so as to cover the envelope in order to block moisture toward the semiconductor element.

前記外囲器には、前記湿気遮断部材を嵌め込むための段部が形成されていることが好ましい。   It is preferable that a step portion for fitting the moisture blocking member is formed in the envelope.

本実施の形態に係る半導体装置においては、光学部材に対向するように形成された主面を有する半導体素子と、光学部材の前記半導体素子に対向する面の周縁に形成された複数の導電性電極膜と、複数の導電性電極膜のそれぞれと対向するように半導体素子の前記主面の周縁にそれぞれ形成された複数の電極端子と、導電性電極膜に接合するように複数の電極端子のそれぞれの上に形成された複数の金属突起と、半導体素子と光学部材とを固定するために半導体素子と複数の導電性電極膜との間に塗布された封止物と、複数の導電性電極膜のそれぞれと半導体素子の外側において接合された複数の外部端子とが設けられている。このため、半導体素子と電気的に接続される外部端子を外囲器の外側に設けることができるので、外部端子を外囲器の中に埋設させる必要が無い。その結果、外囲器の中に外部端子を形成するための複雑な封止工程が不要であり、簡略な工程によって半導体装置を製造することができる。   In the semiconductor device according to the present embodiment, a semiconductor element having a main surface formed so as to face the optical member, and a plurality of conductive electrodes formed on the periphery of the surface of the optical member facing the semiconductor element A plurality of electrode terminals formed on the periphery of the main surface of the semiconductor element so as to face each of the film, a plurality of conductive electrode films, and a plurality of electrode terminals bonded to the conductive electrode film A plurality of metal protrusions formed on the substrate, a sealing material applied between the semiconductor element and the plurality of conductive electrode films to fix the semiconductor element and the optical member, and a plurality of conductive electrode films And a plurality of external terminals joined on the outside of the semiconductor element. For this reason, since the external terminal electrically connected with the semiconductor element can be provided outside the envelope, it is not necessary to embed the external terminal in the envelope. As a result, a complicated sealing process for forming the external terminal in the envelope is unnecessary, and the semiconductor device can be manufactured by a simple process.

この実施の形態では、半導体素子と光学部材と封止物とによって囲まれる空間には、ヘリウムガスが大気圧以下の圧力において封入されていることが好ましい。   In this embodiment, it is preferable that helium gas is sealed in a space surrounded by the semiconductor element, the optical member, and the sealing material at a pressure equal to or lower than atmospheric pressure.

以下、図面を参照して本発明の実施の形態を説明する。   Embodiments of the present invention will be described below with reference to the drawings.

(実施の形態1)
図1は実施の形態1に係る半導体装置25の構成を示す斜視図であり、図2は図1に示す面AAに沿った断面図である。半導体装置25は、略直方体形状をした光学部材3を備えている。光学部材3は、ガラス、フィルターまたはレンズ等によって構成されている。
(Embodiment 1)
FIG. 1 is a perspective view showing the configuration of the semiconductor device 25 according to the first embodiment, and FIG. 2 is a cross-sectional view taken along the plane AA shown in FIG. The semiconductor device 25 includes an optical member 3 having a substantially rectangular parallelepiped shape. The optical member 3 is composed of glass, a filter, a lens, or the like.

半導体装置25には、光学部材3に対向するように形成された主面9を有する半導体素子8が設けられている。光学部材3の半導体素子8の主面9に対向する面の周縁、およびその反対側の面の周縁には、複数の導電性電極膜4が形成されている。導電性電極膜4を形成するためには、例えばAu/Ti/Al/In(2.0μm/0.1μm/0.2μm/0.1μm)の積層膜を堆積しエッチングして所望の形状に仕上げる。また別の方法として材料構成が異なる積層膜やマスク蒸着を採用してもよい。   The semiconductor device 25 is provided with a semiconductor element 8 having a main surface 9 formed to face the optical member 3. A plurality of conductive electrode films 4 are formed on the periphery of the surface of the optical member 3 facing the main surface 9 of the semiconductor element 8 and the periphery of the opposite surface. In order to form the conductive electrode film 4, for example, a stacked film of Au / Ti / Al / In (2.0 μm / 0.1 μm / 0.2 μm / 0.1 μm) is deposited and etched into a desired shape. Finish. Moreover, you may employ | adopt the laminated film and mask vapor deposition from which material composition differs as another method.

半導体素子8の主面9の周縁には、複数の電極端子10が、複数の導電性電極膜4のそれぞれと対向するように形成されている。導電性電極膜4に接合するように複数の電極端子10のそれぞれの上に複数の金属突起11が形成されている。   A plurality of electrode terminals 10 are formed on the periphery of the main surface 9 of the semiconductor element 8 so as to face each of the plurality of conductive electrode films 4. A plurality of metal protrusions 11 are formed on each of the plurality of electrode terminals 10 so as to be joined to the conductive electrode film 4.

複数の導電性電極膜4の上に半導体素子8を囲むように外囲器19が設けられている。半導体素子8と外囲器19と光学部材3とを固定するために半導体素子8と外囲器19との間に封止物24が塗布されている。半導体装置25は、複数の導電性電極膜4のそれぞれに対して外囲器19の外側において接合された複数の外部端子7を備えている。   An envelope 19 is provided on the plurality of conductive electrode films 4 so as to surround the semiconductor element 8. In order to fix the semiconductor element 8, the envelope 19, and the optical member 3, a sealing material 24 is applied between the semiconductor element 8 and the envelope 19. The semiconductor device 25 includes a plurality of external terminals 7 joined to the respective conductive electrode films 4 on the outside of the envelope 19.

半導体素子8は、導電性電極膜4の先端近傍に金属突起11の表面を精度良く合わせてフリップチップボンドを行い、光学部材3の下面に接合する。また、接合は異方性導電膜(ACF)を使用しても問題は無い。光学部材3に半導体素子8を接合した後、半導体素子8の側面に到達するように半導体素子8の周辺に液状樹脂等のアンダーフィルを塗布する。   The semiconductor element 8 is bonded to the lower surface of the optical member 3 by performing flip chip bonding by aligning the surface of the metal projection 11 with high accuracy near the tip of the conductive electrode film 4. In addition, there is no problem even if an anisotropic conductive film (ACF) is used for bonding. After joining the semiconductor element 8 to the optical member 3, an underfill such as a liquid resin is applied around the semiconductor element 8 so as to reach the side surface of the semiconductor element 8.

その上から貫通する開口部2を有する外囲器19を所定位置に貼り合わせて、半導体素子8が外囲器19の開口2における所定位置になるように位置合わせを行う。   An envelope 19 having an opening 2 penetrating from above is bonded to a predetermined position, and alignment is performed so that the semiconductor element 8 is at a predetermined position in the opening 2 of the envelope 19.

この液状樹脂を加熱や紫外線照射により硬化する。最後に光学部材3の上面と下面に形成した複数の導電性電極膜4における外部端子7の取り付け部に予め外装メッキを施した外部端子7を取り付けた後、ハンダや導電性樹脂を施して加熱することで固着する。   This liquid resin is cured by heating or ultraviolet irradiation. Finally, after attaching the external terminal 7 which has been subjected to exterior plating in advance to the attachment portion of the external terminal 7 in the plurality of conductive electrode films 4 formed on the upper surface and the lower surface of the optical member 3, heating is performed by applying solder or conductive resin. To fix.

このようにして構成された半導体装置25は、外部端子7が外囲器19に埋設されない構成であり、またボンディングワイヤーを有しない構造である。このため、複雑な工程をともなわずに簡単な組立工程によって半導体装置を製造することができる。   The semiconductor device 25 configured in this manner is configured such that the external terminal 7 is not embedded in the envelope 19 and does not have a bonding wire. For this reason, a semiconductor device can be manufactured by a simple assembly process without a complicated process.

これにより、工程を簡略化し、歩留まりを良くすると同時に信頼性の向上を図ることができる。また、端子間接続に使用していたボンディングワイヤーのインダクタンス成分が減少するため周波数的な電気的特性の向上も図ることができる。   Thereby, the process can be simplified, the yield can be improved, and at the same time, the reliability can be improved. Further, since the inductance component of the bonding wire used for the connection between terminals is reduced, the electrical characteristics in terms of frequency can be improved.

また、外囲器の底が無く、半導体素子を外囲器の内側面で支える構造であるため薄型化が可能である。   Further, since the structure has no bottom of the envelope and the semiconductor element is supported by the inner side surface of the envelope, the thickness can be reduced.

パッケージの材料に熱硬化型樹脂を使用した例を説明したが、本発明はこれに限定されない。   Although the example which used the thermosetting resin for the material of a package was demonstrated, this invention is not limited to this.

なお、本実施の形態としてパッケージの外形にクワッド型を用いた例を説明したが、デュアルインライン型を用いても良い。また、アンダーフィル材として液状樹脂を用いた例を説明したが、半硬化型のシート状樹脂であっても構わない。   In addition, although the example which used the quad type | mold for the external shape of a package was demonstrated as this Embodiment, you may use a dual in-line type | mold. Moreover, although the example which used liquid resin as an underfill material was demonstrated, you may be a semi-hardened type sheet-like resin.

以上のように実施の形態1によれば、光学部材3の半導体素子8に対向する面の周縁に形成された複数の導電性電極膜4と、複数の導電性電極膜4のそれぞれと対向するように半導体素子8の主面9の周縁にそれぞれ形成された複数の電極端子10と、導電性電極膜4に接合するように複数の電極端子10のそれぞれの上に形成された複数の金属突起11と、半導体素子8を囲むように複数の導電性電極膜4の上に設けられた外囲器19と、半導体素子8と外囲器19と光学部材3とを固定するために半導体素子8と外囲器19との間に塗布された封止物24と、複数の導電性電極膜4のそれぞれと外囲器19の外側において接合された複数の外部端子7とが設けられている。このため、半導体素子8と電気的に接続される外部端子7を外囲器19の外側に設けることができるので、外部端子7を外囲器19の中に埋設させる必要が無い。その結果、外囲器19の中に外部端子7を形成するための複雑な封止工程が不要であり、簡略な工程によって半導体装置を製造することができる。   As described above, according to the first embodiment, the plurality of conductive electrode films 4 formed on the periphery of the surface of the optical member 3 facing the semiconductor element 8 and the plurality of conductive electrode films 4 are opposed to each other. Thus, a plurality of electrode terminals 10 formed on the periphery of the main surface 9 of the semiconductor element 8 and a plurality of metal protrusions formed on each of the plurality of electrode terminals 10 so as to be joined to the conductive electrode film 4 11, an envelope 19 provided on the plurality of conductive electrode films 4 so as to surround the semiconductor element 8, and the semiconductor element 8 to fix the semiconductor element 8, the envelope 19, and the optical member 3. A sealing material 24 applied between the outer periphery 19 and the envelope 19, a plurality of conductive electrode films 4, and a plurality of external terminals 7 joined to the outside of the envelope 19. For this reason, since the external terminal 7 electrically connected to the semiconductor element 8 can be provided outside the envelope 19, it is not necessary to embed the external terminal 7 in the envelope 19. As a result, a complicated sealing process for forming the external terminal 7 in the envelope 19 is unnecessary, and a semiconductor device can be manufactured by a simple process.

(実施の形態2)
図3は実施の形態2に係る半導体装置25Aの構成を示す斜視図であり、図4は図3に示す面BBに沿った断面図である。図1および図2を参照して前述した実施の形態1に係る半導体装置25の構成要素と同一の構成要素には同一の参照符号を付している。従って、これらの構成要素の詳細な説明は省略する。
(Embodiment 2)
FIG. 3 is a perspective view showing the configuration of the semiconductor device 25A according to the second embodiment, and FIG. 4 is a cross-sectional view along the plane BB shown in FIG. The same components as those of the semiconductor device 25 according to the first embodiment described above with reference to FIGS. 1 and 2 are denoted by the same reference numerals. Therefore, detailed description of these components is omitted.

前述した実施の形態1に係る半導体装置25と異なる点は、外囲器19の外側面に、複数の外部端子7をそれぞれ固定するための複数の縦溝14が形成されている点である。縦溝14の溝幅および溝深さは、外部端子7を収納し得る幅と深さになっている。外部端子7には、外装メッキが予め施されている。   The difference from the semiconductor device 25 according to the first embodiment described above is that a plurality of vertical grooves 14 for fixing the plurality of external terminals 7 are formed on the outer surface of the envelope 19. The groove width and groove depth of the vertical groove 14 are such that the external terminal 7 can be accommodated. The external terminals 7 are preliminarily plated.

このようにして得られた半導体装置25Aは、外部端子7の腹の部分が外囲器19に形成された縦溝14によって固定されるため、実施の形態1において前述した効果に加えて、外部端子7の変形を防止することができ、また外部端子7の位置精度の向上を図ることができるという効果を得ることができる。その結果、小型で変形しにくい外部端子7を有した安価な半導体装置を実現することができる。   In the semiconductor device 25A obtained in this way, the belly portion of the external terminal 7 is fixed by the vertical groove 14 formed in the envelope 19, so that in addition to the effects described in the first embodiment, the external device 7A The deformation of the terminal 7 can be prevented, and the effect that the positional accuracy of the external terminal 7 can be improved can be obtained. As a result, an inexpensive semiconductor device having the external terminal 7 which is small and hardly deformed can be realized.

(実施の形態3)
図5は実施の形態3に係る半導体装置25Bの構成を示す斜視図であり、図6は図5に示す面CCに沿った断面図である。図1および図2を参照して前述した実施の形態1に係る半導体装置25の構成要素と同一の構成要素には同一の参照符号を付している。従って、これらの構成要素の詳細な説明は省略する。
(Embodiment 3)
FIG. 5 is a perspective view showing the configuration of the semiconductor device 25B according to the third embodiment, and FIG. 6 is a cross-sectional view along the plane CC shown in FIG. The same components as those of the semiconductor device 25 according to the first embodiment described above with reference to FIGS. 1 and 2 are denoted by the same reference numerals. Therefore, detailed description of these components is omitted.

前述した実施の形態1に係る半導体装置25と異なる点は、外囲器19の下面の開口部2側に設けた段部に湿気遮蔽部材13を備えている点である。湿気遮蔽部材13は、半導体素子8へ向かう湿気を遮断するために外囲器19を覆うように設けられている。このように外囲器19の底面に湿気遮蔽部材13を貼り合わせることにより、底面側からの湿気の侵入を防止し、半導体素子8の劣化を防止することができる。   The difference from the semiconductor device 25 according to the first embodiment described above is that the moisture shielding member 13 is provided in the step provided on the opening 2 side of the lower surface of the envelope 19. The moisture shielding member 13 is provided so as to cover the envelope 19 in order to block moisture directed to the semiconductor element 8. By sticking the moisture shielding member 13 to the bottom surface of the envelope 19 in this way, it is possible to prevent moisture from entering from the bottom surface side and to prevent the semiconductor element 8 from deteriorating.

(実施の形態4)
図7は実施の形態4に係る半導体装置25Cの構成を示す斜視図であり、図8は図7に示す面DDに沿った断面図である。図1および図2を参照して前述した実施の形態1に係る半導体装置25の構成要素と同一の構成要素には同一の参照符号を付している。従って、これらの構成要素の詳細な説明は省略する。
(Embodiment 4)
FIG. 7 is a perspective view showing a configuration of a semiconductor device 25C according to the fourth embodiment, and FIG. 8 is a cross-sectional view taken along a plane DD shown in FIG. The same components as those of the semiconductor device 25 according to the first embodiment described above with reference to FIGS. 1 and 2 are denoted by the same reference numerals. Therefore, detailed description of these components is omitted.

前述した実施の形態1に係る半導体装置25と異なる点は、外囲器19の外側面に、複数の外部端子7をそれぞれ固定するための複数の縦溝14が形成されている点と、外囲器19の下面の開口部2側に設けた段部に湿気遮蔽部材13を備えている点である。   The difference from the semiconductor device 25 according to the first embodiment described above is that a plurality of vertical grooves 14 for fixing the plurality of external terminals 7 are formed on the outer surface of the envelope 19, respectively, The moisture shielding member 13 is provided at a step provided on the opening 2 side of the lower surface of the envelope 19.

このように、複数の外部端子7をそれぞれ固定するための複数の縦溝14を形成すると、外部端子7の腹の部分が外囲器19に形成された縦溝14によって固定されるため、外部端子7の変形を防止することができ、また外部端子7の位置精度の向上を図ることができる。そして、外囲器19の底面に湿気遮蔽部材13を貼り合わせると、底面側からの湿気の侵入を防止し、半導体素子8の劣化を防止することができる。   As described above, when the plurality of vertical grooves 14 for fixing the plurality of external terminals 7 are formed, the belly portion of the external terminal 7 is fixed by the vertical grooves 14 formed in the envelope 19. The deformation of the terminal 7 can be prevented, and the positional accuracy of the external terminal 7 can be improved. Then, when the moisture shielding member 13 is bonded to the bottom surface of the envelope 19, moisture can be prevented from entering from the bottom surface side, and deterioration of the semiconductor element 8 can be prevented.

(実施の形態5)
図9は実施の形態5に係る半導体装置25Dの構成を示す斜視図であり、図10は図9に示す面EEに沿った断面図である。
(Embodiment 5)
FIG. 9 is a perspective view showing a configuration of a semiconductor device 25D according to the fifth embodiment, and FIG. 10 is a cross-sectional view taken along a plane EE shown in FIG.

図1および図2を参照して前述した実施の形態1に係る半導体装置25の構成要素と同一の構成要素には同一の参照符号を付している。従って、これらの構成要素の詳細な説明は省略する。   The same components as those of the semiconductor device 25 according to the first embodiment described above with reference to FIGS. 1 and 2 are denoted by the same reference numerals. Therefore, detailed description of these components is omitted.

前述した実施の形態1に係る半導体装置25と異なる点は、外囲器19が設けられておらず、封止物24が、半導体素子8と光学部材3とを固定するために半導体素子8と複数の導電性電極膜4との間に塗布されている点である。   The difference from the semiconductor device 25 according to the first embodiment described above is that the envelope 19 is not provided, and the sealing member 24 is different from the semiconductor element 8 in order to fix the semiconductor element 8 and the optical member 3. It is a point applied between the plurality of conductive electrode films 4.

実施の形態5の説明は熱硬化型樹脂を用いた場合を例にして行っていく。   The description of the fifth embodiment will be made with an example in which a thermosetting resin is used.

まず図9において、最上部にフィルターやレンズ等の光学部材3を配置する。光学部材3の周辺に複数の外部端子7を取り付けるべく、上面と下面に複数の導電性電極膜4を形成する。   First, in FIG. 9, the optical member 3 such as a filter or a lens is arranged at the top. In order to attach a plurality of external terminals 7 around the optical member 3, a plurality of conductive electrode films 4 are formed on the upper and lower surfaces.

光学部材3の下面側のそれぞれの導電性電極膜4は、外部端子7と接続され、半導体素子8が主面9の周辺に備える電極端子10上の金属突起11のなかで接合の対象とする金属突起11の位置と整合させる場所まで内部に向かって延在する内部端子として形成する。   Each conductive electrode film 4 on the lower surface side of the optical member 3 is connected to the external terminal 7, and the semiconductor element 8 is to be joined in the metal protrusion 11 on the electrode terminal 10 provided around the main surface 9. It is formed as an internal terminal that extends inward to a location that is aligned with the position of the metal protrusion 11.

導電性電極膜4の形成は、例えばAu/Ti/Al/In(2.0μm/0.1μm/0.2μm/0.1μm)の積層膜を堆積しエッチングして所望の形状に仕上げる。また別の方法として材料構成とは異なる積層膜やマスク蒸着を採用してもよい。半導体素子8は導電性電極膜4の先端近傍に金属突起11の表面を精度良く合わせてフリップチップボンドを行い、光学部材3の下面に接合する。   The conductive electrode film 4 is formed, for example, by depositing and etching a laminated film of Au / Ti / Al / In (2.0 μm / 0.1 μm / 0.2 μm / 0.1 μm) to a desired shape. Moreover, you may employ | adopt the laminated film and mask vapor deposition different from material composition as another method. The semiconductor element 8 is bonded to the lower surface of the optical member 3 by performing flip chip bonding by aligning the surface of the metal protrusion 11 in the vicinity of the tip of the conductive electrode film 4 with high accuracy.

また、接合は異方性導電膜(ACF)を使用しても問題は無い。光学部材3に半導体素子8を接合した後、半導体素子8の側面に到達するように半導体素子8の周辺に液状樹脂等のアンダーフィルを塗布する。半導体素子8が所定位置になるように位置合わせを行う。   In addition, there is no problem even if an anisotropic conductive film (ACF) is used for bonding. After joining the semiconductor element 8 to the optical member 3, an underfill such as a liquid resin is applied around the semiconductor element 8 so as to reach the side surface of the semiconductor element 8. Positioning is performed so that the semiconductor element 8 is at a predetermined position.

この樹脂を加熱や紫外線照射により硬化する。最後に光学部材3の上面と下面に形成した複数の導電性電極膜4の外部端子7取り付け部に予め外装メッキを施した外部端子7を取り付けた後ハンダや導電性樹脂を施して加熱することで固着する。   This resin is cured by heating or ultraviolet irradiation. Finally, after attaching the external terminal 7 that has been previously plated to the external terminal 7 of the plurality of conductive electrode films 4 formed on the upper surface and the lower surface of the optical member 3, solder and conductive resin are applied and heated. Secure with.

このようにして得られた半導体装置25Dは外囲器19を持たず、紫外線硬化樹脂等の封止物24で固定されるため、さらに薄型の半導体装置25を実現することができる。   The semiconductor device 25D thus obtained does not have the envelope 19 and is fixed with a sealing material 24 such as an ultraviolet curable resin, so that a thinner semiconductor device 25 can be realized.

上記実施の形態1から実施の形態4は、光学部材3の上面と下面に外部端子7取り付け部を備えるものであったが、さらなる小型化の実現のために光学部材3の上面の外部端子7取り付け部を除去し、導電性電極膜4は下面のみに形成するものであって構わない。   In the first to fourth embodiments described above, the external terminal 7 mounting portions are provided on the upper surface and the lower surface of the optical member 3, but the external terminal 7 on the upper surface of the optical member 3 is provided for further miniaturization. The attachment portion may be removed, and the conductive electrode film 4 may be formed only on the lower surface.

更に、撮像機能型半導体装置において半導体素子8の主面9部の温度上昇は性能に著しい劣化を誘発するものであり、この課題を解決するために半導体装置25の光学部材3における下面と半導体素子8の主面9との間の空間に熱伝導率の高いヘリウムガスを大気圧以下で封入することで放熱性の優れた高性能半導体装置の実現が図れる。   Further, in the imaging function type semiconductor device, the temperature rise of the main surface 9 portion of the semiconductor element 8 induces significant deterioration in performance. To solve this problem, the lower surface and the semiconductor element in the optical member 3 of the semiconductor device 25 A high-performance semiconductor device with excellent heat dissipation can be realized by sealing helium gas having a high thermal conductivity in a space between the main surface 9 and the main surface 9 at 8 at atmospheric pressure or lower.

以上のように、実施の形態1〜5に係る 半導体装置によれば、リードが外囲器に埋設されず、ボンディングワイヤーを有しない構造であるため、複雑な工程をともなわずに簡単な組立で半導体装置を構成することができる。これにより、工程を簡略化し、歩留まりを良くすると同時に信頼性の向上を図ることができる。また、端子間接続に使用していたボンディングワイヤーのインダクタンス成分が減少するため周波数的な電気的特性の向上も図ることができる。   As described above, according to the semiconductor device according to the first to fifth embodiments, since the lead is not embedded in the envelope and does not have a bonding wire, it can be easily assembled without complicated processes. A semiconductor device can be configured. Thereby, the process can be simplified, the yield can be improved, and at the same time, the reliability can be improved. Further, since the inductance component of the bonding wire used for the connection between terminals is reduced, the electrical characteristics in terms of frequency can be improved.

本発明は、撮像機能および受光機能を有する半導体素子が搭載されたパッケージとフィルターおよびレンズ等の光学部材等とを備える半導体装置に適用することができる。   The present invention can be applied to a semiconductor device including a package on which a semiconductor element having an imaging function and a light receiving function is mounted and an optical member such as a filter and a lens.

実施の形態1に係る半導体装置の構成を示す斜視図1 is a perspective view illustrating a configuration of a semiconductor device according to a first embodiment. 図1に示す面AAに沿った断面図Sectional view along the plane AA shown in FIG. 実施の形態2に係る半導体装置の構成を示す斜視図The perspective view which shows the structure of the semiconductor device which concerns on Embodiment 2. FIG. 図3に示す面BBに沿った断面図Sectional drawing along the surface BB shown in FIG. 実施の形態3に係る半導体装置の構成を示す斜視図The perspective view which shows the structure of the semiconductor device which concerns on Embodiment 3. FIG. 図5に示す面CCに沿った断面図Sectional view along the plane CC shown in FIG. 実施の形態4に係る半導体装置の構成を示す斜視図The perspective view which shows the structure of the semiconductor device which concerns on Embodiment 4. FIG. 図7に示す面DDに沿った断面図Sectional view along the plane DD shown in FIG. 実施の形態5に係る半導体装置の構成を示す斜視図The perspective view which shows the structure of the semiconductor device which concerns on Embodiment 5. FIG. 図9に示す面EEに沿った断面図Sectional view along the plane EE shown in FIG. 従来の半導体装置の構成を示す斜視図A perspective view showing a configuration of a conventional semiconductor device 図11に示す面JJに沿った断面図Sectional view along the plane JJ shown in FIG.

符号の説明Explanation of symbols

3 光学部材
4 導電性電極膜
7 外部端子
8 半導体素子
10 電極端子
11 金属突起
19 外囲器
24 封止物
25 半導体装置
3 Optical member 4 Conductive electrode film 7 External terminal 8 Semiconductor element 10 Electrode terminal 11 Metal protrusion 19 Enclosure 24 Sealed object 25 Semiconductor device

Claims (4)

光学部材と、
前記光学部材に対向するように形成された主面を有する半導体素子と、
前記光学部材の前記半導体素子に対向する面の周縁に形成された複数の導電性電極膜と、
前記複数の導電性電極膜のそれぞれと対向するように前記半導体素子の前記主面の周縁にそれぞれ形成された複数の電極端子と、
前記導電性電極膜に接合するように前記複数の電極端子のそれぞれの上に形成された複数の金属突起と、
前記半導体素子を囲むように前記複数の導電性電極膜の上に設けられた外囲器と、
前記半導体素子と前記外囲器と前記光学部材とを固定するために前記半導体素子と前記外囲器との間に塗布された封止物と、
前記複数の導電性電極膜のそれぞれに対して前記外囲器の外側において接合された複数の外部端子とを具備することを特徴とする半導体装置。
An optical member;
A semiconductor element having a main surface formed to face the optical member;
A plurality of conductive electrode films formed on the periphery of the surface of the optical member facing the semiconductor element;
A plurality of electrode terminals respectively formed on the periphery of the main surface of the semiconductor element so as to face each of the plurality of conductive electrode films;
A plurality of metal protrusions formed on each of the plurality of electrode terminals so as to be bonded to the conductive electrode film;
An envelope provided on the plurality of conductive electrode films so as to surround the semiconductor element;
A sealing material applied between the semiconductor element and the envelope to fix the semiconductor element, the envelope and the optical member;
A semiconductor device comprising: a plurality of external terminals joined to each of the plurality of conductive electrode films on the outside of the envelope.
前記外囲器は、外側に形成された外側面を有しており、
前記外囲器の前記外側面には、前記複数の外部端子をそれぞれ固定するための複数の溝が形成されている、請求項1記載の半導体装置。
The envelope has an outer surface formed on the outside;
The semiconductor device according to claim 1, wherein a plurality of grooves for fixing the plurality of external terminals are formed in the outer surface of the envelope.
前記半導体素子へ向かう湿気を遮断するために前記外囲器を覆うように設けられた湿気遮断部材をさらに具備している、請求項1記載の半導体装置。   The semiconductor device according to claim 1, further comprising a moisture blocking member provided so as to cover the envelope in order to block moisture directed to the semiconductor element. 前記外囲器には、前記湿気遮断部材を嵌め込むための段部が形成されている、請求項記載の半導体装置。 The semiconductor device according to claim 3 , wherein a step portion for fitting the moisture blocking member is formed in the envelope.
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