JP4292355B2 - GMSK modulation circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a GMSK modulation circuit used in digital communication.
[0002]
[Prior art]
Among digital modulation type FSK (Frequency Shift Keying) modulation methods, there is an MSK (Minimum Shift Keying) modulation method with a modulation index of 0.5. And what modulates transmission data of NRZ (Non Return Zero) by the MSK system after passing through the Gaussian filter is called a GMSK (Gaussian Filter MSK) modulation system, and is widely used in GSM (pan-European digital car telephone system) and the like. Yes.
[0003]
This GMSK modulation method suppresses the occurrence of side lobes by making the phase change rate at the bit change point of transmission data slower than in other cases compared to the MSK modulation method.
[0004]
[Problems to be solved by the invention]
However, this GMSK modulation method differs from QAM, PSK, and other modulation methods using a roll-off filter, and since it passes through a Gaussian filter, the eye opening becomes narrow during demodulation, the error rate deteriorates, and the demodulation characteristics deteriorate.
[0005]
FIG. 6 is a block diagram of a conventional GMSK modulation circuit. The NRZ transmission data input to the input terminal 51 is filtered by the Gaussian filter 52 and then the phase information is integrated by the integrating circuit 53. After that, the cos circuit 54 and the sin circuit 55 convert the signal to a cos waveform and a sin waveform signal of the in-phase component (I component) and the quadrature component (Q component). The component is multiplied by the carrier wave f1 from the carrier wave oscillator 60 by the multiplier 58, and the quadrature component is multiplied by the carrier wave f1 'whose phase is shifted by 90 degrees by the phase shifter 61 by the multiplier 59, both of which are added. By being added at 62, the signal is orthogonally modulated and transmitted from the antenna 63. Note that the one obtained by removing the Gaussian filter 52 is an MSK modulation circuit.
[0006]
When this GMSK modulation is viewed in terms of phase transition, as shown in FIG. 7, the phase transition characteristic of MSK indicated by a broken line always shifts by 90 degrees in one symbol period (T period), whereas it is indicated by a solid line. In GMSK, when the same code continues, the transition is 90 degrees, but when the sign changes, the transition amount is less than 90 degrees.
[0007]
Next, when the MSK-modulated baseband waveform and the GMSK-modulated baseband waveform are viewed in FIG. 8, the input data signals of NRZ are “1”, “1”, “0”, “0”, “0”, “ When “0”, “0”, “0”, the baseband waveform obtained from the cos circuit 54 reliably returns to 0, +1, −1, etc., when the sign changes during MSK modulation. In GMSK modulation, the amplitude does not return to zero. In some cases, it does not return to +1, -1.
[0008]
As described above, the GMSK modulation method has a problem in that the amount of phase transition is insufficient when the code changes, so that the eye opening becomes narrow during demodulation and the error rate deteriorates.
[0009]
An object of the present invention is to provide a GMSK modulation circuit that prevents the above-described problem from occurring by causing the phase per symbol to accurately shift by 90 degrees even when the codes differ in consecutive symbols. is there.
[0010]
[Means for Solving the Problems]
In a GMSK modulation circuit that inputs an input data signal to Gaussian filter means and MSK modulates an output signal of the Gaussian filter means, the frequency transition amount in the MSK modulation is input to the first invention for solving the above problem. When the consecutive codes of the data signal are the same, a predetermined value is set, and when they are different, a value larger than the predetermined value is set so that the phase is shifted by 90 degrees in one symbol period regardless of the difference of the continuous codes.
[0011]
According to a second invention, in the first invention, a voltage controlled oscillator is provided after the Gauss filter means via a gain adjusting means, and the signs of two consecutive symbols of the input data signal are compared. Is configured to control the gain of the gain adjusting means so that the frequency transition amount becomes the predetermined value, and to control the gain of the gain adjusting means so that the frequency transition amount is larger than the predetermined value when different.
[0012]
According to a third aspect of the present invention, there is provided an address generating means for generating an address in accordance with an input data signal, a memory from which predetermined waveform data is read by the address generated by the address generating means, and data read from the memory as D This is a GMSK modulation circuit for converting an analog signal by the / A conversion means, wherein a plurality of waveform data for GMSK modulation whose phase is shifted by 90 degrees in one symbol period is stored in the memory.
[0013]
According to a fourth aspect, in the third aspect, the waveform of the sine curve whose amplitude changes from 0 → 1, 1 → 0, 0 → −1, −1 → 0 in one symbol period is stored in the memory. Waveform that changes from 1 to 0 and finally approaches 0 with a gradual change, A waveform that changes from 0 to 1 and rises from 0 with a gradual change first, Amplitude changes from -1 to 0, and finally changes slowly A waveform that approaches 0 at 0, a waveform whose amplitude changes from 0 to -1 and first falls gradually from 0 with a gradual change is stored, and the current data signal, the data signal before 1 symbol, the data signal before 2 symbols are stored in the address generating means The data signal and the phase integration value two symbols before are input, and a predetermined waveform is read from the memory in accordance with the combination of the input signals to the address generating means.
[0014]
According to a fifth invention, in the third or fourth invention, the memory and the D / A conversion means are provided for the in-phase component and the quadrature component, and the output signal of each D / A conversion means is quadrature modulated. Provided.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
[First Embodiment]
FIG. 1 is a diagram showing a GMSK modulation circuit according to the first embodiment of the present invention. 1 is an input terminal for inputting NRZ data of “1” and “0” to be transmitted, 2 is a 1-symbol delayer that delays the data by one symbol period, 3 is a Gaussian filter, and 4 is a Gaussian filter 3 A gain adjuster for adjusting the gain of the data obtained, 5 is a VCO (voltage controlled oscillator) in which the modulation index for changing the oscillation frequency by a signal (voltage) after gain adjustment is set to 0.5, 6 is an antenna, 7 is one symbol This is an exclusive OR circuit that inputs data on the input side and output side of the delay device 1 and detects whether or not they match.
[0016]
Here, two consecutive data are compared by the exclusive OR circuit 7 and when both codes are the same, the gain of the gain adjuster 4 is set to 1 and the code passing through the Gaussian filter 3 is directly used as the VCO 5. The predetermined frequency transition amount is obtained, but if it is different, the gain of the gain adjuster 4 is increased for a certain period before and after the timing when the preceding and following bits change so that the frequency transition amount of the VCO 5 becomes the same as described above. The phase transition amount is set to exactly 90 degrees in one symbol period. In this case, the baseband signal itself is transmitted from the antenna 6.
[0017]
FIG. 2 is a diagram showing the phase transition characteristics in this case. Even when the sign is different from that in the case of FIG. 7, the phase is surely shifted by 90 degrees in each symbol period, and the change point is smooth. It has become.
[0018]
[Second Embodiment]
FIG. 3 is a configuration diagram of a GMSK modulation circuit according to the second embodiment of the present invention, in which a waveform data memory is used and an orthogonal modulation method is applied.
[0019]
11 is a data input terminal to which transmission data of “1” and “0” of NRZ is input, and 12 and 13 are 1-symbol delay devices. Since the input signal of the latter one-symbol delay unit 13 is the former one-symbol delay unit 12, data that is two symbols before the data input to the input terminal 11 is output from here. Reference numeral 14 denotes a phase calculation unit that integrates and calculates the phase, and here, calculates the phase of data two symbols before.
[0020]
Reference numeral 15 denotes an address generator for designating baseband waveform data, data two symbols before from the one-symbol delay unit 13, data one symbol before from the one-symbol delay circuit 12, and current from the input terminal 11. Data, and phase information two symbols before input from the phase calculation unit 14 are input.
[0021]
The address generator 15 performs an exclusive OR process on the data from the input terminal 11 and the output data of the 1-symbol delay unit 12 to determine whether the current input data is the same as the input data one symbol before. Detecting whether or not the input data one symbol before and the input data two symbols before are the same by performing an exclusive OR process on the output data of the one symbol delay unit 12 and the output data of the one symbol delay unit 13 To do.
[0022]
Reference numeral 16 denotes a ROM storing in-phase component baseband waveform data. Reference numeral 17 denotes a ROM storing quadrature component baseband waveform data. These ROMs 16 and 17 are addressed by signals generated by the address generator 15.
[0023]
Reference numerals 18 and 19 denote D / A converters for converting the waveforms read from the ROMs 16 and 17 into analog signals, reference numerals 20 and 21 denote quadrature modulation multipliers, reference numeral 22 denotes a carrier wave f1 oscillator, and reference numeral 23 denotes a carrier wave f1. A 90-degree phase shifter that shifts by 90 degrees, 24 is an adder, and 25 is an antenna.
[0024]
The ROMs 16 and 17 store eight types of waveform data (1) to (8) for one symbol period shown in FIG. The waveform data (1) to (8) are as follows.
[0025]
Waveform (1): Waveform waveform that changes from 0 to +1 with a sine curve in one symbol period (2) Waveform waveform that changes with a sine curve from +1 to 0 in one symbol period (3): 0 to-in one symbol period Waveform waveform that changes with a sine curve to 1 (4): Waveform waveform that changes with a sine curve from -1 to 0 during one symbol period (5) A waveform that changes from +1 to 0 with one symbol period, initially a sine curve Waveform waveform that falls to 0 at the end with a gradual change rate at ▲ 6 ▼: Waveform waveform that changes from 0 to +1 during one symbol period, waveform that first rises at a gradual change rate and then becomes a sine curve ▲ 7 ▼ : Waveform that changes from -1 to 0 in one symbol period, waveform waveform that first rises on a sine curve and becomes 0 at a slow rate of change at the end (8) Waveform that changes from 0 to -1 in one symbol period ,Initially Ya or falling then Do the rate of change becomes a sine curve waveform [0026]
Now, as shown in FIG. 5, NRZ data is sequentially input from the input terminal 11 in the order of “1” → “1” → “1” → “1” → “0” → “0” → “0” → “0”. The case when inputting is described.
[0027]
First, when data “1” in one symbol period of 2T to 3T is input from the input terminal 11, data “1” of T to 2T one symbol before is input to the address generator 15 from the one symbol delay unit 12, The data “1” of 0 to T two symbols before is input from the 1 symbol delay unit 13 to the phase calculator 14 and the address generator 15. Further, the current data “1” between 2T and 3T is directly input to the address generator 15 from the input terminal 11. An integrated value of a phase between 0 and T is input from the phase calculator 14 to the address generator 15, and it is assumed that the phase integrated value increases to 270 degrees at the time T.
[0028]
When creating a waveform between T and 2T under the above conditions, first, the phase integration value at the time point T increases to 270 degrees, so the amplitude at T is -1. Further, it can be confirmed by the exclusive OR processing of the output data of the 1-symbol delay units 12 and 13 that the data is continuous from “1” to “1” before and after T. It can be confirmed by the exclusive OR processing of the data of the input terminal 11 and the output data of the 1-symbol delay unit 12 that “1” → “1” is continuous. Therefore, the waveform in the period from T to 2T is a waveform of a normal sine curve and has an amplitude (4) starting from −1, and this waveform (4) is read from the ROM 16. At this time, since the Q component has a phase difference of 90 degrees, the waveform (3) is read from the ROM 17.
[0029]
When data “1” of the next one symbol period (3T to 4T) is input from the input terminal 11, data of 3T to 4T, 2T to 3T, and T to 2T are captured. Then, the integrated value at 2T is increased from the phase calculator 14 to output 0 degree data. In 2T and 23, data is continuous from “1” to “1”. Therefore, the waveform (1) is read from the ROM 16 as the next 2T to 3T waveform. At this time, since the Q component has a phase difference of 90 degrees, the waveform (4) is read from the ROM 17.
[0030]
When data “0” in the next one symbol period (4T to 5T) is input from the input terminal 11, data of 4T to 5T, 3T to 4T, and 2T to 3T are captured. The phase calculator 14 increases the integral value at 3T and outputs 90 degree data. At this time, data is continuous from “1” to “1” in 3T, but changes from “1” to “0” in 4T. Therefore, the waveform (5) is selected from the ROM 16 as the next 3T-4T waveform. At this time, since the Q component has a phase difference of 90 degrees, the waveform (1) is read from the ROM 17.
[0031]
When data “0” in the next one symbol period (5T to 6T) is input from the input terminal 11, data of 5T to 6T, 4T to 5T, and 3T to 4T are captured. Then, the integrated value at 4T decreases from the phase calculator 14 and data of 0 degree is output. At this time, since the data changes from “1” to “0” in 4T and does not change from “0” to “0” in 5T, the waveform (6) is selected as the next 4T to 5T. At this time, since the Q component has a phase difference of 90 degrees, the waveform (5) is read from the ROM 17.
[0032]
When data “0” in the next one symbol period (6T to 7T) is input from the input terminal 11, data of 6T to 7T, 5T to 6T, and 4T to 5T are captured. Then, the integrated value at 5T decreases from the phase calculator 14 and data of 270 degrees is output. At this time, the data continues from “0” to “0” at 5T and does not change from “0” to “0” even at 6T, so the waveform (2) is selected as the next 5T to 6T. At this time, since the Q component has a phase difference of 90 degrees, the waveform (6) is read from the ROM 17.
[0033]
The I component baseband signal read from the ROM 16 and the Q component baseband signal read from the ROM 17 as described above are converted into analog signals by the D / A converters 18 and 19, and the multiplier 20. 21 and quadrature modulated by the adder 24 and sent to the antenna 25.
[0034]
【The invention's effect】
As described above, according to the present invention, the phase transition amount in one symbol period can be surely set to 90 degrees not only when data is continuous but also when changing, so that the eye opening on the demodulation side can be reduced. The code error can be improved by widening.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a GMSK modulation circuit according to a first embodiment of the present invention.
FIG. 2 is a characteristic diagram of phase transition by the circuit of FIG.
FIG. 3 is a circuit diagram of a GMSK modulation circuit according to a second embodiment of the present invention.
4 is an explanatory diagram of waveform data stored in the ROM of FIG. 3;
FIG. 5 is a waveform diagram for explaining GMSK modulation.
FIG. 6 is a circuit diagram of a conventional GMSK modulation circuit.
FIG. 7 is a characteristic diagram of phase transition between conventional MSK and GMSK.
FIG. 8 is a waveform diagram for explaining modulation of MSK and GMSK.

Claims (5)

In a GMSK modulation circuit that inputs an input data signal to Gaussian filter means and MSK modulates an output signal of the Gaussian filter means,
The frequency transition amount in the MSK modulation is set to a predetermined value when the continuous codes of the input data signal are the same, and is set to a value larger than the predetermined value when the input data signals are different, and the phase is 90 in one symbol period regardless of the difference of the continuous codes. A GMSK modulation circuit characterized in that a transition is made. In claim 1,
A voltage-controlled oscillator is provided after the Gauss filter means via a gain adjustment means, and the signs of two consecutive symbols of the input data signal are compared. When the sign is the same, the frequency transition amount is set to the predetermined value. A GMSK modulation circuit, wherein the gain of the gain adjusting means is controlled so as to control the gain of the gain adjusting means so that the frequency transition amount is larger than the predetermined value when different. Address generating means for generating an address in response to an input data signal, a memory for reading predetermined waveform data from the address generated by the address generating means, and data read from the memory by analog to D / A conversion means A GMSK modulation circuit for converting into a signal,
A GMSK modulation circuit, wherein a plurality of waveform data for GMSK modulation whose phase is shifted by 90 degrees in one symbol period is stored in the memory. In claim 3,
In the memory, in one symbol period, the waveform of a sine curve in which the amplitude changes from 0 → 1, 1 → 0, 0 → −1, −1 → 0, the amplitude changes from 1 → 0, and finally changes slowly. A waveform that approaches 0, a waveform whose amplitude changes from 0 to 1 and first rises from 0 with a gradual change, a waveform that changes from -1 to 0 and finally approaches 0 with a gradual change, and an amplitude from 0 to -1 Store the waveform that falls from 0 with a gradual change at first,
A current data signal, a data signal before 1 symbol, a data signal before 2 symbols, and a phase integration value before 2 symbols are input to the address generating means,
A GMSK modulation circuit, wherein a predetermined waveform is read from the memory in accordance with a combination of input signals to the address generating means. In claim 3 or 4,
A GMSK modulation circuit characterized in that said memory and said D / A conversion means are provided for in-phase components and quadrature components, and means for orthogonally modulating the output signal of each D / A conversion means is provided.

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