JP4279841B2 - IC tag, receiving apparatus and reading method - Google Patents

Description

  The present invention relates to a semiconductor device, and more particularly to a technique effective when applied to the configuration of an IC chip with a congestion control function used for an IC tag or the like.

  For example, as a technique studied by the present inventor, when an IC tag is identified by exchanging signals between a receiving device and a plurality of IC tags, congestion due to signals from the plurality of IC tags is controlled. As a means, the following technique can be considered (for example, refer to Patent Document 1).

First, in response to a transmission request from the receiving device, the IC tag transmits the identification number held in the IC tag bit by bit. The receiving device returns 1 bit of the received identification number to the IC tag. Then, the IC tag compares the returned 1 bit with the transmitted 1 bit, and if it is equal, the next 1 bit is transmitted, and if it is different, another IC tag is present. Stop. When all the bits are transmitted and the reception device receives a notification that the identification number has been normally received, the IC tag terminates all subsequent responses. By repeating this sequence, it is possible to individually recognize a plurality of IC tags even if they exist.
JP 10-021691 gazette (summary of the first page)

  By the way, as a result of examination by the present inventor on the technology for controlling congestion of the IC tag and the like as described above, the following has been clarified.

  For example, the above method requires a complicated logic circuit to identify a plurality of IC tags. This is because the IC tag does not continuously transmit a plurality of bits of the identification number, and repeats transmission and reception with the receiving device in 1-bit units, requiring a complicated command, a large number of operation stages, and complicated. This is because a complicated flip-flop is required, and transmission / reception switching must be controlled in a complicated manner, the memory address counter needs complicated control, and a data comparison circuit is required.

  The complexity of the logic circuit increases the size of the semiconductor device, which increases the cost of the semiconductor device and hinders the spread of IC tags.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a small-sized semiconductor device with a congestion control function by configuring a congestion control function with simple logic in an IC chip mounted on an IC tag or the like.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  A first means for solving the above-mentioned problem has a memory for storing information other than the first random number and the first random number in a semiconductor device that sends information in a non-contact manner, and the first random number In the semiconductor device that transmits information in the memory with a time difference according to the numerical value of the semiconductor device, the first random number is set in the memory address counter of the semiconductor device for time difference control. It is.

  A second means for solving the above-mentioned problem has a memory for storing information other than the first random number and the first random number in the plurality of semiconductor devices that send information in a non-contact manner, When the semiconductor device operates in synchronization with an external clock and detects that the plurality of semiconductor devices are operating in a receiving device outside the semiconductor device, the semiconductor device operates according to the first random number. A semiconductor device is characterized in that each semiconductor device transmits information in a memory in the semiconductor device with a time difference.

  According to a third means for solving the above problem, the first random number, the second random number, and information other than the first and second random numbers are stored in a plurality of semiconductor devices that send information in a non-contact manner. And when the plurality of semiconductor devices operate in synchronization with an external clock and the receiving device outside the semiconductor device detects that the plurality of semiconductor devices are operating, According to the numerical value of the first random number, each semiconductor device transmits information in the memory in the semiconductor with a time difference, and in the receiving device, a plurality of semiconductor devices have the same first random number. The semiconductor device is characterized in that each semiconductor device transmits information in a memory in the semiconductor with a time difference according to the value of the second random number of the semiconductor device. It is.

  According to a fourth means for solving the above problem, the semiconductor device for transmitting information in a non-contact manner has a memory for storing information other than the first random number and the first random number, and the first random number In the semiconductor device that sends information in the memory with a time difference according to the numerical value of the memory, the memory further stores an error detection code, and when the plurality of semiconductor devices operate in synchronization with an external clock, the plurality of semiconductor devices The error detection code is also transmitted, and the receiving device receives the error detection code as a logical sum, and recognizes that the error detection code does not appear in the singular case. It is a semiconductor device characterized by detecting that is operating.

  According to a fifth means for solving the above problem, the semiconductor device for transmitting information in a contactless manner has a memory for storing information other than the first random number and the first random number, and the first random number In the semiconductor device that transmits information in the memory with a time difference according to the numerical value of the above, the semiconductor device has a counter having the same number of bits as the first random number, sets the first random number in the counter, and receives an external clock The semiconductor device is characterized in that the information in the memory in the semiconductor device is transmitted when the content of the counter reaches a specific code by changing the counter.

  A sixth means for solving the above-mentioned problem has a memory for storing information other than the first random number and the first random number in a semiconductor device that sends information in a non-contact manner, and the first random number In a semiconductor device that sends information in a memory with a time difference according to the numerical value of The semiconductor device is characterized in that when it becomes H level again, it is recognized as the first clock.

  A seventh means for solving the above-mentioned problem has a memory for storing information other than the first random number and the first random number in a semiconductor device that sends information in a non-contact manner, and the first random number In the semiconductor device that sends the information in the memory with a time difference according to the numerical value of, the semiconductor device holds a counter indicating the address of the memory, and the counter sets the numerical value of the first random number. In other words, the semiconductor device is also used as a counting operation.

  According to an eighth means for solving the above problem, the first random number, the second random number, and information other than the first and second random numbers are stored in a plurality of semiconductor devices that send information in a non-contact manner. And when the plurality of semiconductor devices operate in synchronization with an external clock and the receiving device detects that the plurality of semiconductor devices are operating, according to the first random number. When each semiconductor chip sends out information in a memory in the semiconductor device with a time difference, and the receiving device detects that a plurality of semiconductor devices possess the same first random number, the semiconductor device In the semiconductor device in which each semiconductor device transmits information in the memory in the semiconductor with a time difference according to the value of the second random number in the semiconductor device, the semiconductor device includes the memory Holding the counter indicating the address, the counter is to the semiconductor device which is characterized in that also serves as a counting operation by setting the value of the second random number.

  According to a ninth means for solving the above-mentioned problems, the first random number, the second random number, and information other than the first and second random numbers are stored in a plurality of semiconductor devices that send information in a non-contact manner. When the plurality of semiconductor devices operate in synchronization with an external clock and the receiving device detects that the plurality of semiconductor devices are operating, the first random number value is stored. When each of the semiconductor devices transmits information in a memory in the semiconductor device with a time difference, and the receiving device detects that a plurality of semiconductor devices possess the same first random number, the semiconductor In a semiconductor device in which each semiconductor device transmits information in a memory in the semiconductor device with a time difference according to the value of the second random number of the device, the semiconductor device includes the memory A signal for setting the value of the second random number in the semiconductor device which also holds the counter indicating the address of the second address and performs the counting operation by setting the value of the second random number. Is realized by obtaining a timing in which a specific modulation period exists after the last external clock signal changes from H level to L level, and the carrier wave returns to the initial carrier wave amplitude after the certain time. The semiconductor device is characterized.

  According to a tenth means for solving the above problem, the first random number, the second random number, and information other than the first and second random numbers are stored in a plurality of semiconductor devices that send information without contact. And when the plurality of semiconductor devices operate in synchronization with an external clock and the receiving device detects that the plurality of semiconductor devices are operating, according to the first random number. When each semiconductor device sends out information in a memory in the semiconductor device with a time difference, and the receiving device detects that a plurality of semiconductor devices possess the same first random number, the semiconductor device In the semiconductor device in which each semiconductor device transmits information in the memory in the semiconductor device with a time difference according to the value of the second random number, In the semiconductor device that holds the counter indicating the address of the second memory, and the counter is also used for the counting operation by setting the value of the second random number, in the semiconductor device, the counter The semiconductor device is characterized by the presence of a flip-flop indicating that the counter is used as a counter.

  Therefore, according to the semiconductor device, the congestion control function can be realized with a simple circuit configuration. A semiconductor device capable of controlling congestion with a small size, that is, a size of 0.5 mm square or less can be configured.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) A congestion control IC tag can be realized by configuring a simple logic circuit.

  (2) Since no command is required, a complicated decoding circuit is not required for this purpose, and the logic can be simply configured.

  (3) Since there are many repetitions in the operation stage, the number of flip-flops to be controlled can be reduced, and a simple logic can be configured.

  (4) The memory address counter can also be used as memory data transmission control, and the logic can be simply configured.

  (5) By the above (1) to (4), it is possible to configure a semiconductor device capable of controlling congestion with a small size, that is, a size of 0.5 mm square or less.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that in all the drawings for explaining the embodiments, the same members are denoted by the same reference numerals, and the repeated explanation thereof is omitted.

(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of a semiconductor device according to the first embodiment of the present invention.

  First, an example of the configuration of the semiconductor device according to the first embodiment will be described with reference to FIG. The semiconductor device according to the first embodiment is, for example, an IC chip 12 and includes a memory address counter 13, an antenna 14, a rectifier circuit 15, a memory 16, a first flip-flop 18, and the like.

  Information such as the first random number 11 and the identification number 17 is written in the memory 16 in advance.

  The memory address counter 13 is a counter indicating the bit address of the memory 16 and has the same number of bits as the first random number 11.

  Next, the operation of the semiconductor device according to the first embodiment will be described with reference to FIG. First, the antenna 14 receives an electromagnetic wave from the outside, and a DC voltage is generated in the rectifier circuit 15.

  The first flip-flop 18 is set to “H” as an initial state. At this time, the first random number 11 in the memory 16 is set to the memory address counter 13.

  Next, upon receiving a clock from an external receiving device, the memory address counter 13 counts up or down.

  When the content of the memory address counter 13 reaches a specific code (for example, “0”), the first flip-flop 18 is set to “L”, and the information in the memory 16 such as the identification number 17 is The signal is transmitted to an external receiving device via the rectifier circuit 15 and the antenna 14.

  That is, the information in the memory 16 such as the identification number 17 is transmitted from the IC chip 12 with a time difference according to the value of the first random number 11.

  Further, when there are a plurality of IC chips 12 that send information in a non-contact manner, the plurality of IC chips 12 operate simultaneously in synchronization with an external clock. In this case, since the first random number 11 is randomly written in advance in the memory 16 of each IC chip 12, each IC chip 12 is in accordance with the value of the first random number 11. Information in the memory 16 of the IC chip 12 is transmitted with a time difference.

  In addition, the memory address counter 13 indicates the bit address of the memory 16 and also functions as a count operation by setting the numerical value of the first random number 11, so that congestion control can be performed with a simple circuit configuration. It becomes possible.

  Next, the function of the first flip-flop 18 will be briefly described. In order to realize the above operation, a stage for temporarily setting the first random number 11 in the memory 16 to the memory address counter 13 is necessary. This is set when the output of the first flip-flop 18 is "H". When the first random number 11 set in the memory address counter 13 counts up or down by the clock from the receiving device and becomes “0”, the output of the first flip-flop 18 becomes “L”. The information in the memory 16 such as the identification number 17 is transmitted according to the memory address.

(Embodiment 2)
FIG. 2 is a block diagram showing the configuration of the semiconductor device according to the second embodiment of the present invention.

  As shown in FIG. 2, the semiconductor device according to the second embodiment is, for example, an IC chip 12. The semiconductor device according to the first embodiment is further provided with a second flip-flop 21, and information in the memory 16 is provided. As a result, the second random number 22 is added.

  Next, the operation of the semiconductor device according to the second embodiment will be described with reference to FIG. First, in the same manner as in the first embodiment, a DC voltage is generated in the rectifier circuit 15 in response to an external electromagnetic wave, and the first random number 11 in the memory 16 is set in the memory address counter 13, and the memory The address counter 13 counts up or down.

  When the content of the memory address counter 13 reaches a specific code (for example, “0”), the first flip-flop 18 is set to “L”, and the information in the memory 16 such as the identification number 17 is It is transmitted via the rectifier circuit 15 and the antenna 14.

  The plurality of IC chips 12 operate simultaneously in synchronization with a clock from the outside, and in the receiving device outside the IC chip 12, it is detected that the plurality of IC chips 12 exist and operate, and the first After each IC chip 12 transmits information in the memory 16 in the IC chip 12 with a time difference according to the numerical value of the random number 11, the plurality of IC chips 12 in the receiving device further have the same first random number. 11 is detected, the second flip-flop 21 is set to “H”.

  Then, the second random number 22 is set in the memory address counter 13, and count-up or count-down is performed.

  When the content of the memory address counter 13 reaches a specific code (for example, “0”), information in the memory 16 such as the identification number 17 is transmitted via the rectifier circuit 15 and the antenna 14.

  Therefore, after information in the memory 16 such as the identification number 17 is transmitted with a time difference according to the value of the first random number 11, the plurality of IC chips 12 further receive the same first random number 11 in the receiving device. When the possession is detected, each IC chip 12 transmits information in the memory 16 such as the identification number 17 with a time difference according to the value of the second random number 22.

  The memory address counter 13 indicates the bit address of the memory 16 and is also used for counting by setting the numerical value of the second random number 22.

  Next, the function of the second flip-flop 21 will be briefly described. In order to realize the above operation, a stage for temporarily setting the second random number 22 in the memory 16 to the memory address counter 13 is necessary. This is set when the output of the second flip-flop 21 is "H". When the second random number 22 set in the memory address counter 13 counts up or down by the clock from the receiving device and becomes “0”, the output of the second flip-flop 21 becomes “L”. The information in the memory 16 such as the identification number 17 is transmitted according to the memory address.

  The reason for having the first random number 11 and the second random number 22 is due to the discrete probability of congestion control. The first random number 11 and the second random number 22 have a finite bit length because they determine the timing of sending the memory data and are written at random by the user at the time of manufacturing the IC chip 12 in advance.

  Therefore, it is unavoidable in principle that the same random numbers collide with a certain probability. Whether or not there is a collision can be detected by the receiving device because the error detection code is disturbed.

  Therefore, at this time, by transmitting a modulation signal for mode switching from the receiving device side to the IC chip 12, the memory data is transmitted again by the second random number 22 possessed by each IC chip 12. The probability that the first random number 11 and the second random number 22 are exactly the same and collide is generally not 0, but is extremely small.

(Embodiment 3)
The third embodiment of the present invention is, for example, an IC tag on which an IC chip is mounted, and further includes an error detection code as information in the memory 16 of the semiconductor device (IC chip 12) according to the first or second embodiment. Is added.

  FIG. 3 is a signal waveform diagram showing a received signal of the semiconductor device in the third embodiment.

  The operation of the semiconductor device according to the third embodiment will be described with reference to FIG. First, when an external signal is received in the IC chip 12, the carrier modulation signal 31 is changed from "L" level where there is no carrier to "H" level where there is a carrier as shown in FIG. Then, it continues to the “H” level for a certain period of time, then once falls to the “L” level, and when it becomes the “H” level again after a certain period of time, it is recognized as the first clock signal 32.

  Thereafter, a clock signal is continuously supplied from the antenna of the receiving device to the IC tag including the IC chip 12. In response to this clock signal, all IC tags send out the contents of a predetermined memory 16.

  At this time, the receiving device receives a predetermined bit, confirms the error detection code, and if there is an error, either the presence of a plurality of IC tags or a real error has occurred. Continue sending clock signals.

  Each IC tag sets the first random number 11 in its own memory 16 in its own memory address counter 13 and proceeds to count up or count down by a clock signal according to the first random number 11. When the memory address counter 13 becomes “0”, the contents of its own memory 16 are transmitted by a clock signal.

  Further, the receiving device receives the predetermined bit and confirms the error detection code. If there is an error, either there are a plurality of IC tags or a real error has occurred, so the receiving apparatus transmits a mode switching modulation signal 33 after transmitting a predetermined clock to the IC tag.

  As a result, each IC tag sets the second random number 22 in the memory 16 in each IC tag to its own memory address counter 13 and proceeds to count up or count down by the clock signal. When the memory address counter 13 becomes “0”, information in its own memory 16 is sent out by a clock signal.

  As described above, the IC chip 12 that transmits information in a contactless manner has the first random number 11 written in advance and the memory 16 that stores information other than the first random number 11, and the first random number 11 In the IC chip 12 that sends the information in the memory 16 with a time difference according to the numerical value of the error code, an error detection code other than the first random number 11 has an error detection code, and when the plurality of IC chips 12 operate simultaneously with an external clock, The detection code is also sent from the plurality of IC chips 12 at the same time, and the reception device receives the error detection code as a logical sum and recognizes that it is an error detection code that does not appear in the singular case. , It is detected that a plurality of IC chips 12 are operating.

  In addition, information other than the first random number 11 and the second random number 22 and the first random number 11 and the second random number 22 written in advance is stored in the plurality of IC chips 12 that send information without contact. The first random number is detected when the plurality of IC chips 12 operate simultaneously in synchronization with an external clock, and the receiving device detects that the plurality of IC chips 12 exist and operates. In accordance with the numerical value of 11, each IC chip 12 transmits information in the memory 16 in the IC chip 12 with a time difference, and the plurality of IC chips 12 possess the same first random number 11 in the receiving device. Is detected, the information in the memory 16 in the IC chip 12 has a time difference according to the value of the second random number 22 of the IC chip 12. In the IC chip 12 for sending out, a memory address counter 13 indicating the bit address of the memory 16 is held in the IC chip 12, and the memory address counter 13 sets the numerical value of the second random number 22 and performs a counting operation. A signal for setting the numerical value of the second random number 22 is specified after the last external clock signal has changed from the “H” level to the “L” level. Information in the memory 16 in the IC chip 12 is transmitted by obtaining the timing at which the carrier wave returns to the initial carrier wave amplitude after a certain period of time (the carrier modulation signal 31).

  This makes it possible to perform congestion control with simple logic.

(Embodiment 4)
FIG. 4 is an explanatory diagram showing a congestion control method when there are a plurality of IC tags in the fourth embodiment of the present invention.

  With reference to FIG. 4, a congestion control method in the case where there are a plurality of IC tags will be described. In FIG. 4, a first IC tag 41, a second IC tag 42, a third IC tag 43, a fourth IC tag 44, and a fifth IC tag 45 are present.

  The electromagnetic wave 46 is radiated from the receiving device antenna 47 toward these IC tags. The receiving device 48 can control the electromagnetic wave 46.

  The first IC tag 41, the second IC tag 42, the third IC tag 43, the fourth IC tag 44, and the fifth IC tag 45 include the IC chip 12 described in the first to third embodiments. Has been implemented. Each IC chip incorporates the random numbers described in the first to third embodiments.

  Data from each IC tag can be individually read by the receiving device 48. The data read by the receiving device 48 is checked for a random number and a random error detection code for each group in the data to accurately check whether the data has been normally read due to noise or the like. The error check method may be an encryption system whose algorithm is clear in advance, or may be a cyclic redundancy check code.

  In this example, there are five IC tags. However, the number is not necessarily five, and a maximum of 1,000 to 10,000 IC tags may exist.

(Embodiment 5)
5A to 5C are configuration diagrams showing an IC tag on which the semiconductor device (IC chip 12) described in the first to third embodiments is mounted.

  A mounting form of the semiconductor device (IC chip 12) described in the first to third embodiments will be described with reference to FIG. As shown in FIGS. 5A to 5C, the IC tag according to the fifth embodiment includes the IC chip 12, the tag sheet 51, the index 54, the antennas 52, 53, and the like described in the first to third embodiments. 55, 56, 57, etc.

  In FIG. 5A, the first straight antenna 52 and the second straight antenna 53 are connected to the IC chip 12 on the tag sheet 51. The tag sheet 51 has an index 54 attached thereto.

  In FIG. 5B, the first modified antenna 55 and the second modified antenna 56 are connected to the IC chip 12 on the tag sheet 51. The tag sheet 51 has an index 54 attached thereto.

  In FIG. 5C, the third modified antenna 57 and the second modified antenna 56 are connected to the IC chip 12 on the tag sheet 51. The tag sheet 51 has an index 54 attached thereto.

  Although these tag sheet 51, index 54, and IC chip 12 have the same position, three types of IC tags having different antenna shapes are realized.

  The memory 16 of each IC chip 12 has a different identification number based on the techniques described in the first to fourth embodiments.

  These IC tags are affixed to various products and used to identify each product, but there are states in which a plurality of IC tags are close to each other.

  When the antennas are close to each other, parasitic capacitance is generated between the antennas, and the resonant frequency is reduced. This is because the resonance frequency is proportional to the reciprocal of the square root of the product of the antenna capacitance and the antenna inductance, and therefore, when the antenna capacitance increases with the addition of parasitic capacitance, the resonance frequency decreases.

  For this reason, in a tag system that performs congestion control, it is necessary to hop the frequency of the receiving device. Also, if antennas of the same shape overlap, there will be two in the same radio wave area, and the energy of the tag for each one will be reduced, leading to a reduction in communication distance.

  In the fifth embodiment, even if the antennas of FIGS. 5A, 5B, and 5C are overlapped, the antenna patterns do not completely match. Therefore, the generation of parasitic capacitance is suppressed, and an area for acquiring radio waves can be secured, so that the above-described decrease in resonance frequency and decrease in acquired energy can be suppressed.

  That is, it is possible to expect the effect that the hopping or the like is omitted and the communication distance is not greatly reduced.

  The three types of antenna patterns shown here are examples. Probability of perfect matching even if any type of antennas overlap by creating many patterns by changing the shape of the antennas in combination. And congestion control can be performed efficiently.

  The index 54 indicates the direction of the tag sheet 51 and is used for the purpose of matching the direction of the tag sheet when the tag sheet 51 is attached.

  For the semiconductor devices described in the first to third embodiments, the effect of congestion control is further exhibited by adopting the above-described mounting form.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above-described embodiment, the IC chip that transmits information in a non-contact manner has been described. However, the present invention is not limited to this, and the present invention can be applied to other semiconductor devices. The effect of the present invention is more effective.

  Moreover, in the said embodiment, although the application example to an IC tag was demonstrated, it is not limited to this, It can apply also to other products, such as an IC card.

1 is a block diagram showing a configuration of a semiconductor device according to a first embodiment of the present invention. It is a block diagram which shows the structure of the semiconductor device which is Embodiment 2 of this invention. In Embodiment 3 of this invention, it is a signal waveform diagram which shows the received signal of a semiconductor device. In Embodiment 4 of this invention, it is explanatory drawing which shows the method of congestion control in case a some IC tag exists. (A)-(c) is a block diagram which shows the IC tag which mounted the semiconductor device of Embodiment 1-3 of this invention in Embodiment 5 of this invention.

Explanation of symbols

11 First random number 12 IC chip 13 Memory address counter 14 Antenna 15 Rectifier circuit 16 Memory 17 Identification number 18 First flip-flop 21 Second flip-flop 22 Second random number 31 Carrier modulation signal 32 First clock signal 33 Mode Switching modulation signal 41 1st IC tag 42 2nd IC tag 43 3rd IC tag 44 4th IC tag 45 5th IC tag 46 Electromagnetic wave 47 Receiver antenna 48 Receiver 51 Tag sheet 52 First straight Antenna 53 Second straight antenna 54 Index 55 First modified antenna 56 Second modified antenna 57 Third modified antenna

Claims (12)

A plurality of first information, second information, and a memory for storing an error detection signal;
A counter whose count value indicates the bit address of the memory,
One piece of the first information is selected and set as the initial value of the counter, and the count value of the counter is incremented or decremented by a clock signal received from the receiving device, and the count value of the counter is specified The second information and the error detection signal are sequentially transmitted to the receiving device in accordance with the bit address indicated by the count value.
The IC tag, wherein when receiving a mode switching signal from the receiving device that has detected an error in the error detection signal, the other first information is selected and set as an initial value of the counter. A plurality of first information, second information, a memory for storing an error detection signal, and a counter;
One piece of the first information is selected and set in the counter, the count value of the counter is counted up or down by a clock signal received from a receiving device, and the count value of the counter is set to a specific value. The second information and the error detection signal are sequentially transmitted to the receiving device in accordance with the memory address indicated by the count value.
The IC tag, wherein when receiving a mode switching signal from the receiving device that has detected an error in the error detection signal, the other first information is selected and set as an initial value of the counter. The IC tag according to claim 1 or 2,
Have flip-flops,
The IC tag, said select one of said first information on the value of the flip-flop, IC tag and sets as the initial value of the counter. The IC tag according to any one of claims 1 to 3 ,
The IC tag according to claim 1, wherein the specific value is zero. The IC tag according to any one of claims 1 to 4 ,
The IC tag, wherein the counter and the first information have the same number of bits. An IC tag according to any one of claims 1 to 5 ,
Furthermore, the IC tag is a wireless tag having an antenna. The IC tag according to any one of claims 1 to 6 ,
The IC tag, wherein the memory is a ROM. The IC tag according to any one of claims 1 to 7 ,
The IC tag is characterized in that the first information is randomly set when the IC tag is manufactured. A receiving device that reads the second information and the error detection signal from an IC tag having a plurality of first information, second information, a memory that stores an error detection signal, and a counter;
An electromagnetic wave with a clock signal superimposed from the antenna is transmitted to the IC tag,
The IC tag selected as one of the first information and set as the initial value of the counter is incremented or decremented by a clock signal transmitted from the receiving device, and the count value of the counter becomes a predetermined value Later, the second information and the error detection signal are sequentially transmitted from the IC tag according to the bit address indicated by the count value,
A receiving apparatus, wherein when there is an error in the received error detection signal, a mode switching signal for causing the IC tag to select another first information and to set as an initial value of the counter is transmitted. A receiving device that reads the second information and the error detection signal from an IC tag having a plurality of first information, second information, and an error detection signal; and a counter;
An electromagnetic wave with a clock signal superimposed from the antenna is transmitted to the IC tag,
The IC tag selected as one of the first information and set as the initial value of the counter is incremented or decremented by a clock signal transmitted from the receiving device, and the count value of the counter becomes a predetermined value In this case, the second information and the error detection signal are sequentially transmitted from the IC tag according to the memory address indicated by the count value,
A receiving apparatus, wherein when there is an error in the received error detection signal, a mode switching signal for causing the IC tag to select another first information and to set as an initial value of the counter is transmitted. The second information and the error detection signal from an IC tag having a plurality of first information, second information, a memory for storing an error detection signal, and a counter whose count value indicates a bit address of the memory to the receiving device A reading method for reading
A clock signal is transmitted from the receiving device to the IC tag,
The IC tag causes the first information to be selected and set as the initial value of the counter, causes the count value of the counter to be counted up or down by the clock signal, and the count value of the counter After reaching the specific value, the second information and the error detection signal are sequentially transmitted to the receiving device according to the bit address indicated by the count value,
When there is an error in the error detection signal received by the receiving device, the mode switching signal is transmitted from the receiving device to the IC tag,
A reading method characterized by causing the IC tag that has received the mode switching signal to select other first information and to set it as an initial value of the counter. A method of reading out the second information and the error detection signal from an IC tag having a plurality of first information, second information, a memory for storing an error detection signal, and a counter to a receiving device,
An electromagnetic wave on which a clock signal is superimposed from the receiving device is transmitted to the IC tag,
The IC tag selects one piece of the first information and sets it as an initial value of the counter, and causes the count value of the counter to be counted up or down by the clock signal, so that the count value of the counter is predetermined. After the value is reached, the second information and the error detection signal are sequentially transmitted to the receiving device according to the memory address indicated by the count value,
When there is an error in the error detection signal received by the receiving device, the mode switching signal is transmitted from the receiving device to the IC tag,
A reading method characterized by causing the IC tag that has received the mode switching signal to select other first information and to set it as an initial value of the counter.

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