JP4247749B2 - Semiconductor device protective cover - Google Patents

Semiconductor device protective cover Download PDF

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JP4247749B2
JP4247749B2 JP2005161227A JP2005161227A JP4247749B2 JP 4247749 B2 JP4247749 B2 JP 4247749B2 JP 2005161227 A JP2005161227 A JP 2005161227A JP 2005161227 A JP2005161227 A JP 2005161227A JP 4247749 B2 JP4247749 B2 JP 4247749B2
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protective cover
semiconductor device
protective
drain terminal
surface member
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JP2006339341A (en
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浩一 崎田
茂樹 中嶋
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Ｔｄｋラムダ株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4018—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by the type of device to be heated or cooled
    • H01L2023/4031—Packaged discrete devices, e.g. to-3 housings, diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H01L2023/405—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4075—Mechanical elements
    • H01L2023/4087—Mounting accessories, interposers, clamping or screwing parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

本発明は、例えばスイッチング電源装置のコンバータ部，インバータ部に使用されるパワー半導体素子などの半導体装置を覆い保護する半導体装置保護カバーに関する。   The present invention relates to a semiconductor device protective cover that covers and protects a semiconductor device such as a power semiconductor element used in a converter unit and an inverter unit of a switching power supply device, for example.

例えばスイッチング電源などで使用される半導体装置では、ホコリやウィスカー（髭状結晶）等により隣接する高圧電極と信号電極との間に短絡障害が発生する虞がある。短絡障害が発生した場合には、半導体装置の破損と同時に、火花放電等が発生する可能性もあり安全上問題となる。   For example, in a semiconductor device used in a switching power supply or the like, there is a possibility that a short-circuit failure may occur between the adjacent high-voltage electrode and the signal electrode due to dust, whiskers, or the like. When a short circuit failure occurs, there is a possibility that spark discharge or the like may occur simultaneously with the breakage of the semiconductor device, which is a safety problem.

半導体装置の電極部へのホコリの侵入を防ぐ手段として、特許文献１のように、電気素子，半導体素子，プリント基板等の電気部品を半導体装置保護カバーに相当する合成樹脂ケースに封入するものがある。半導体装置を合成樹脂ケースで封入することにより、当該ケース内へのホコリの侵入が完全に断たれ、電極部へホコリが付着する虞を完全に払拭することができる。   As a means for preventing dust from entering the electrode portion of the semiconductor device, as in Patent Document 1, an electric component such as an electric element, a semiconductor element, or a printed board is enclosed in a synthetic resin case corresponding to a semiconductor device protective cover. is there. By enclosing the semiconductor device with a synthetic resin case, the intrusion of dust into the case is completely cut off, and the possibility that dust adheres to the electrode portion can be completely eliminated.

また、特許文献２では、熱を発生する電子部品を覆うと共に基板に装着される保護カバー付きの半導体装置が開示されている。当該保護カバーでは、半導体装置の電極部へのホコリの侵入を完全に断つことはできないが、万一短絡障害による火花放電が発生しても、その影響が保護カバー内に止まるため、半導体装置周囲への二次的な弊害を抑制することができる。
特開平１１−１９５７２２号公報 特開２００４−７１６１５号公報 Patent Document 2 discloses a semiconductor device with a protective cover that covers an electronic component that generates heat and is mounted on a substrate. Although the protective cover cannot completely block dust from entering the electrode part of the semiconductor device, even if a spark discharge occurs due to a short-circuit failure, the effect is stopped in the protective cover. Secondary problems can be suppressed.
JP-A-11-195722 JP 2004-71615 A

しかし、上記従来の半導体装置保護カバーでは、半導体装置の電極部が全て保護カバー内に収容されることによりホコリ対策がなされているが、隣接する電極部間に発生したウィスカーによる短絡障害を防止するには至っていなかった。ウィスカーは、はんだメッキ表面から自然発生し成長するものであるため、保護カバー内に半導体装置を封入しても当該短絡障害を効果的に防止することはできない。とりわけ、半導体装置を封入する場合は、当該封入のためのコストが大きく、また保護カバーにより半導体装置が全体として大きくなってしまうため、小型化の障害となるという問題があった。   However, in the above-described conventional semiconductor device protective cover, all electrode portions of the semiconductor device are accommodated in the protective cover to take measures against dust. However, a short circuit failure caused by whiskers generated between adjacent electrode portions is prevented. It was not reached. Since the whisker is naturally generated from the solder plating surface and grows, even if the semiconductor device is enclosed in the protective cover, the short-circuit failure cannot be effectively prevented. In particular, when a semiconductor device is encapsulated, there is a problem that the cost for encapsulating the device is large and the size of the semiconductor device increases as a whole due to the protective cover.

保護カバーにより周囲への二次的な弊害を防ぐことはできても、前述のように短絡障害は半導体装置の破損を招来するため、その発生自体を防ぐことが望まれている。   Even if the protective cover can prevent secondary adverse effects on the surroundings, it is desired to prevent the occurrence of the short circuit fault as described above because the short circuit fault causes damage to the semiconductor device.

そこで本発明は上記問題点に鑑み、半導体装置の電極部間の短絡障害を防止することができる半導体装置保護カバーを提供することを目的とする。   In view of the above problems, an object of the present invention is to provide a semiconductor device protective cover that can prevent a short circuit failure between electrode portions of a semiconductor device.

本発明における請求項１では、一の電極部の端部が他の電極部の端部と離れるよう成形され、これらの電極部をパッケージ本体の底面に並設しており、前記パッケージ本体の背面に放熱ドレイン端子を設けてなる半導体装置を覆う半導体装置保護カバーにおいて、対向する矩形板状の側面部材と、その長手方向をなす一側を部分的に連結する、保護面部材とから構成され、前記側面部材と結合されていない前記保護面部材の上部となる締結部が、前記パッケージ本体から前記放熱ドレイン端子に至る稜線に沿って曲げ加工されており、前記パッケージ本体を前記側面部材と前記保護面部材で包み込むような形になっている、絶縁性を有する保護部と、前記保護面部材に形成された切欠部とを備え、一の電極部の端部のみを前記切欠部から外部へ露出することにより、一の電極部の端部と他の電極部の端部との間が前記保護面部材で隔離された状態となるように構成している。 According to a first aspect of the present invention, the end portion of one electrode portion is shaped so as to be separated from the end portion of the other electrode portion , and these electrode portions are arranged side by side on the bottom surface of the package body. In the semiconductor device protective cover that covers the semiconductor device provided with the heat radiation drain terminal , the opposing rectangular plate-shaped side surface member and a protective surface member that partially connects one side of the longitudinal direction thereof, A fastening portion that is an upper portion of the protective surface member that is not coupled to the side surface member is bent along a ridge line extending from the package body to the heat radiation drain terminal, and the package body is protected from the side surface member and the protection surface. It is in the form encompassing a plane member comprises a protective portion having an insulating property, and a cutout portion formed on the protective surface member, external only end one of the electrode portion from the notch By exposing, and configured to be state between is isolated by the protective surface member between the edges of the other electrode portion of one electrode portion.

このようにすると、半導体装置が保護部で覆われることにより、異物の侵入ひいては電極部への異物の付着を防止することができる。また、切欠部から電極部の端部を露出させることにより、各電極部間の絶縁が確保されるため、短絡障害を防止することができると共に、万一、保護部で覆われた電極部の基部において火花放電が発生しても、その影響が半導体装置保護カバー内に止まるため、半導体装置周囲への弊害を抑制することができる。   In this case, the semiconductor device is covered with the protective portion, so that the intrusion of the foreign matter and the foreign matter can be prevented from adhering to the electrode portion. Moreover, since the insulation between each electrode part is ensured by exposing the edge part of an electrode part from a notch part, while being able to prevent a short circuit failure, by any chance of the electrode part covered with the protection part Even if a spark discharge occurs at the base, the influence is stopped in the semiconductor device protective cover, so that adverse effects on the periphery of the semiconductor device can be suppressed.

本発明の請求項１によると、半導体装置の電極部間の短絡障害を防止すると共に、それによる二次的な弊害を防止することができる。   According to the first aspect of the present invention, it is possible to prevent a short circuit failure between the electrode portions of the semiconductor device and to prevent a secondary problem caused thereby.

以下、添付図面を参照しながら、本発明における半導体装置保護カバーの好ましい実施例を説明する。   Hereinafter, preferred embodiments of a semiconductor device protective cover according to the present invention will be described with reference to the accompanying drawings.

図１は、本発明のおける半導体装置保護カバーとしての保護カバー１を半導体装置としての例えばＭＯＳＦＥＴなどの半導体素子２に装着する様子を示す分解斜視図である。同図では、さらに半導体素子２に放熱器としてのヒートシンク３が取り付けられ、最終的にプリント基板に実装されることとなる。   FIG. 1 is an exploded perspective view showing a state in which a protective cover 1 as a semiconductor device protective cover according to the present invention is attached to a semiconductor element 2 such as a MOSFET as a semiconductor device. In the figure, a heat sink 3 as a radiator is further attached to the semiconductor element 2 and finally mounted on a printed board.

ヒートシンク３は例えばアルミなどの放熱性に優れた金属部材からなり、半導体素子２が取り付けられる矩形板状部材に複数の放熱フィンが並設されている。この矩形板状部材にはビス10が螺着可能なタップ孔11が穿設されている。   The heat sink 3 is made of a metal member excellent in heat dissipation, such as aluminum, and a plurality of heat radiating fins are arranged in parallel on a rectangular plate member to which the semiconductor element 2 is attached. A tap hole 11 into which the screw 10 can be screwed is formed in the rectangular plate member.

半導体素子２は、例えば所謂ＴＯパッケージやシングルインラインパッケージなどといわれる形状であり、直方体状のパッケージ本体４の底面には電極部としてのリード端子が複数並設されている。そのピン配列は、５が信号電極としてのゲート端子、６が高圧電極としてのドレイン端子、７が接地電極としてのソース端子となっている。これらは、通常パッケージ本体４から直線的に突出した形状に形成されているが、本実施例ではドレイン端子６のみが一旦前方（図中手前方向）に折れ曲がった後、その先端部が垂下するよう、ドレイン端子６の両端部が反対方向に略直角に折り曲げ成形されている。すなわち、ドレイン端子６は、その端部がゲート端子５及びソース端子７の端部と離れるよう折り曲げ成形されている。また、パッケージ本体４の背面に設けられた放熱ドレイン端子８には、ビス10が挿通可能なビス挿通孔９が穿設されている。なお、ドレイン端子６と放熱ドレイン端子８とは、パッケージ本体４内部で電気的に接続されている。   The semiconductor element 2 has a shape called a so-called TO package or a single in-line package, for example, and a plurality of lead terminals as electrode portions are arranged in parallel on the bottom surface of the rectangular parallelepiped package body 4. In the pin arrangement, 5 is a gate terminal as a signal electrode, 6 is a drain terminal as a high voltage electrode, and 7 is a source terminal as a ground electrode. These are usually formed in a shape that protrudes linearly from the package body 4, but in this embodiment, only the drain terminal 6 is once bent forward (frontward in the figure) and then its tip portion hangs down. The both ends of the drain terminal 6 are bent at substantially right angles in the opposite direction. That is, the drain terminal 6 is bent so that the end portions thereof are separated from the end portions of the gate terminal 5 and the source terminal 7. Further, a screw insertion hole 9 through which a screw 10 can be inserted is formed in the heat radiation drain terminal 8 provided on the back surface of the package body 4. The drain terminal 6 and the heat radiating drain terminal 8 are electrically connected inside the package body 4.

保護カバー１は、対向する矩形板状の側面部材20，21と、その長手方向をなす一側を部分的に連結する保護面部材22とから構成され、これらは半導体素子２を覆う保護部として例えばポリカーボネートなどの難燃性プラスチックで一体成形されている。保護カバー１は、半導体素子２の形状に合わせて大きさや輪郭などの外形形状が決定される。本実施例では、側面部材20，21と結合されていない保護面部材22の上部となる締結部23が、パッケージ本体４から放熱ドレイン端子８に至る稜線に沿って曲げ加工されており、ちょうどパッケージ本体４を側面部材20，21と保護面部材22で包みこむような形になっている。この締結部23には、放熱ドレイン端子８のビス挿通孔９の位置に合わせてビス10が挿通可能なビス挿通孔24が穿設されている。ビス挿通孔24は同図ではスリット状であるが、もちろん円形でもよい。また、側面部材20，21と結合された保護面部材22の下部には、下端中央から上方向へ向けて所定長さ分切り取られた切欠部25が形成されている。切欠部25の長さは、半導体素子２の形状に応じて決定され、具体的には、保護カバー１を半導体素子２に装着した際に、ドレイン端子６の端部（折り曲げ部分）が切欠部25から露出（外部へ突出）し、かつパッケージ本体４及びドレイン端子６の基部が覆われる程度の長さとすればよい。また、切欠部25はスリット状に限らず、ドレイン端子６を挿通可能な孔としてもよい。   The protective cover 1 is composed of opposing rectangular plate-shaped side members 20 and 21 and a protective surface member 22 that partially connects one side of the longitudinal direction thereof, and these serve as protective portions that cover the semiconductor element 2. For example, it is integrally formed with a flame retardant plastic such as polycarbonate. The protective cover 1 has an outer shape such as a size and a contour determined according to the shape of the semiconductor element 2. In the present embodiment, the fastening portion 23 that is the upper portion of the protective surface member 22 that is not coupled to the side surface members 20 and 21 is bent along the ridge line from the package body 4 to the heat radiation drain terminal 8, so The main body 4 is shaped so as to be wrapped by the side members 20 and 21 and the protective surface member 22. A screw insertion hole 24 through which the screw 10 can be inserted is formed in the fastening portion 23 in accordance with the position of the screw insertion hole 9 of the heat radiation drain terminal 8. The screw insertion hole 24 has a slit shape in FIG. In addition, a cutout portion 25 is formed at a lower portion of the protective surface member 22 coupled to the side members 20 and 21 and is cut by a predetermined length from the center of the lower end upward. The length of the notch 25 is determined according to the shape of the semiconductor element 2. Specifically, when the protective cover 1 is attached to the semiconductor element 2, the end (folded part) of the drain terminal 6 is notched. The length may be such that it is exposed from 25 (projects to the outside) and the base of the package body 4 and the drain terminal 6 is covered. Further, the notch 25 is not limited to the slit shape, and may be a hole through which the drain terminal 6 can be inserted.

ここで、半導体素子２にヒートシンク３と保護カバー１を装着する手順について説明する。図２は、当該装着後の状態を示した図である。   Here, a procedure for attaching the heat sink 3 and the protective cover 1 to the semiconductor element 2 will be described. FIG. 2 is a diagram showing a state after the mounting.

プリント基板に実装された半導体素子２の背面（放熱ドレイン端子８）へヒートシンク３の扁平面を密着させると共に、半導体素子２の正面側から保護カバー１を被せる。このとき、半導体素子２のドレイン端子６は保護カバー１の切欠部25から露出することとなる。そして、ビス10を、保護カバー１側から締結部23に設けられたビス挿通孔24と、放熱ドレイン端子８に設けられたビス挿通孔９とに順次挿通させ、ヒートシンク３のタップ孔11に螺着，締結することにより、保護カバー１とヒートシンク３が半導体素子２に取り付けられる。なお、同図では、ドレイン端子６に絶縁性を有するチューブを装着し、半導体素子２の背面側下部に各端子とヒートシンク３を絶縁するための板状絶縁部材を配置して、各部の絶縁耐圧を高めている。   The flat surface of the heat sink 3 is brought into close contact with the back surface (heat radiation drain terminal 8) of the semiconductor element 2 mounted on the printed circuit board, and the protective cover 1 is covered from the front side of the semiconductor element 2. At this time, the drain terminal 6 of the semiconductor element 2 is exposed from the notch 25 of the protective cover 1. Then, the screws 10 are sequentially inserted from the protective cover 1 side into the screw insertion holes 24 provided in the fastening portion 23 and the screw insertion holes 9 provided in the heat radiation drain terminal 8, and screwed into the tap holes 11 of the heat sink 3. The protective cover 1 and the heat sink 3 are attached to the semiconductor element 2 by attaching and fastening. In the figure, an insulating tube is attached to the drain terminal 6, and a plate-like insulating member for insulating each terminal and the heat sink 3 is disposed in the lower part on the back side of the semiconductor element 2, so that the withstand voltage of each part is Is increasing.

次に、上記構成における保護カバー１の作用について説明する。   Next, the operation of the protective cover 1 in the above configuration will be described.

半導体素子２が通電されると、ドレイン端子６に高電圧が印加される。ドレイン端子６の両隣には、比較的電位が低いゲート端子５や基準電位となるソース端子７とが近接して設けられているので、これらとドレイン端子６との間に短絡障害ひいては火花放電が生じ易い。半導体素子２は保護カバー１に覆われているため、保護カバー１内へホコリが侵入しにくく、ゲート端子５やソース端子７へのホコリの付着をある程度防止することができる。   When the semiconductor element 2 is energized, a high voltage is applied to the drain terminal 6. Since a gate terminal 5 having a relatively low potential and a source terminal 7 having a reference potential are provided adjacent to both sides of the drain terminal 6, a short circuit failure and a spark discharge are caused between these and the drain terminal 6. It is likely to occur. Since the semiconductor element 2 is covered with the protective cover 1, it is difficult for dust to enter the protective cover 1, and adhesion of dust to the gate terminal 5 and the source terminal 7 can be prevented to some extent.

本実施例では、ドレイン端子６を折り曲げてその端部を保護カバー１の切欠部25から外部へ突出させているが、これにより各端子間隔が大幅に広がる、言い換えると、各端子間に絶縁距離が確保され、火花放電の発生が抑制されている。とりわけ、低電位となる他の端子と火花放電が生じ易い、高電位となるドレイン端子６のみを切欠部25から外部へ出すことにより、ドレイン端子６とゲート端子５との間、又はドレイン端子６とソース端子７との間が絶縁性を有する保護面部材22で隔離された状態となるため、ドレイン端子６と他の端子との間の火花放電を電気的に防止すると共に、これらの間に架かるホコリやウィスカー等を物理的に遮断することができる。その反面、切欠部25を設けることにより切欠部25を通じてホコリが保護カバー１内へ侵入する虞があり、また、ドレイン端子６の基部が、パッケージ本体４の構造上、ゲート端子５及びソース端子７に近接してしまうことから、ドレイン端子６の基部へのホコリの付着が懸念されるが、一般的にホコリはドレイン端子６の先端側となるプリント基板上に溜まり易いため、少量の侵入であれば特に問題とはならない。万一、例えばホコリの付着やウィスカーの発生などにより、基部において火花放電が発生しても、当該部分は保護カバー１に覆われた部分であり、その影響が保護カバー１内に止まるため、半導体素子２周囲への弊害を抑制することができる。一方、半導体素子２の背面側はヒートシンク３により当該火花が遮断される。なお、当該基部における火花が極力外へ出ないようにするには、基部側をできるだけ保護カバー１で覆う必要があるため、ドレイン端子６に基部から先端へかけて傾斜をつけて、その先端側のみが切欠部25から外部へ突出するよう構成するのが好ましい。   In this embodiment, the drain terminal 6 is bent and its end protrudes from the notch 25 of the protective cover 1 to the outside, but this greatly increases the distance between the terminals, in other words, the insulation distance between the terminals. Is ensured, and the occurrence of spark discharge is suppressed. In particular, by discharging only the drain terminal 6 having a high potential, which is likely to cause a spark discharge with other terminals having a low potential, from the notch 25 to the outside, the drain terminal 6 is connected between the drain terminal 6 and the gate terminal 5 or the drain terminal 6. Between the drain terminal 6 and the source terminal 7 is isolated by the protective surface member 22 having an insulating property, so that the spark discharge between the drain terminal 6 and the other terminals is electrically prevented, and between them, Dust and whiskers can be physically blocked. On the other hand, the provision of the notch 25 may cause dust to enter the protective cover 1 through the notch 25, and the base of the drain terminal 6 may be the gate terminal 5 and the source terminal 7 due to the structure of the package body 4. However, since dust tends to accumulate on the printed circuit board on the tip side of the drain terminal 6, it may be a small amount of intrusion. This is not a problem. Even if a spark discharge occurs in the base due to dust or whisker, for example, the part is covered with the protective cover 1 and the influence is stopped in the protective cover 1. It is possible to suppress harmful effects on the periphery of the element 2. On the other hand, the spark is blocked by the heat sink 3 on the back side of the semiconductor element 2. In order to prevent the spark at the base from going outside as much as possible, it is necessary to cover the base side with the protective cover 1 as much as possible. Therefore, the drain terminal 6 is inclined from the base to the tip, and the tip side It is preferable that only the projection protrudes from the notch 25 to the outside.

以上のように本実施例では、一の電極部としてのドレイン端子６の端部が他の電極部としてのゲート端子５，ソース端子７の端部と離れるよう成形された半導体装置としての半導体素子２を覆う半導体装置保護カバーとしての保護カバー１であって、半導体素子２を覆う保護部としての側面部材20，21及び保護面部材22と、ドレイン端子６の端部を露出させる切欠部25とを備えている。   As described above, in this embodiment, the semiconductor element as a semiconductor device formed so that the end of the drain terminal 6 as one electrode part is separated from the end of the gate terminal 5 and the source terminal 7 as another electrode part. 2 is a protective cover 1 as a semiconductor device protective cover that covers 2, and includes side members 20 and 21 and protective surface member 22 as protective portions that cover the semiconductor element 2, and a notch 25 that exposes the end of the drain terminal 6. It has.

このようにすると、半導体素子２が側面部材20，21及び保護面部材22で覆われることにより、異物の侵入ひいてはゲート端子５，ドレイン端子６，ソース端子７への異物の付着を防止することができる。また、切欠部25からドレイン端子６の端部を露出させることにより、各端子間の絶縁が確保されるため、短絡障害を防止することができると共に、万一、側面部材20，21及び保護面部材22で覆われたドレイン端子６の基部において火花放電が発生しても、その影響が保護カバー１内に止まるため、半導体素子２周囲への弊害を抑制することができる。以上より、半導体素子２の端子間の短絡障害を防止すると共に、それによる二次的な弊害を防止することができる。   In this way, the semiconductor element 2 is covered with the side members 20 and 21 and the protective surface member 22, thereby preventing the entry of foreign matter and thus the foreign matter adhering to the gate terminal 5, the drain terminal 6, and the source terminal 7. it can. Further, by exposing the end of the drain terminal 6 from the notch 25, insulation between the terminals is ensured, so that a short circuit failure can be prevented and the side members 20, 21 and the protective surface should be protected. Even if a spark discharge occurs at the base of the drain terminal 6 covered with the member 22, the influence is stopped in the protective cover 1, so that adverse effects on the periphery of the semiconductor element 2 can be suppressed. From the above, it is possible to prevent a short-circuit failure between the terminals of the semiconductor element 2 and to prevent secondary problems caused by the short-circuit failure.

なお、本発明は、上記実施例に限定されるものではなく、本発明の趣旨を逸脱しない範囲で変更可能である。保護カバー１は、半導体素子２のパッケージ形状に応じて種々の変形例が考えられ、保護面部材22や側面部材20，21をゲート端子５やソース端子７に巻きつけるようにしてもよい。また、ドレイン端子６ではなく、ゲート端子５とソース端子７を保護カバー１から露出させるように、切欠部25を保護面部材22や側面部材20，21に設けてもよい。   In addition, this invention is not limited to the said Example, It can change in the range which does not deviate from the meaning of this invention. Various modifications of the protective cover 1 can be considered according to the package shape of the semiconductor element 2, and the protective surface member 22 and the side members 20 and 21 may be wound around the gate terminal 5 and the source terminal 7. Further, the notch 25 may be provided in the protective surface member 22 or the side members 20 and 21 so that the gate terminal 5 and the source terminal 7 are exposed from the protective cover 1 instead of the drain terminal 6.

本発明の第１実施例における半導体装置保護カバーの装着態様を示す分解斜視図である。It is a disassembled perspective view which shows the mounting aspect of the semiconductor device protective cover in 1st Example of this invention. 同上、半導体装置保護カバーの装着態様を示す斜視図である。It is a perspective view which shows the mounting aspect of a semiconductor device protective cover same as the above.

符号の説明Explanation of symbols

１ 保護カバー（半導体装置保護カバー）
２ 半導体素子（半導体装置）
５ ゲート端子（他の電極部）
６ ドレイン端子（一の電極部）
７ ソース端子（他の電極部）
20，21 側面部材（保護部）
22 保護面部材（保護部）
25 切欠部 1 Protective cover (semiconductor device protective cover)
2 Semiconductor elements (semiconductor devices)
5 Gate terminal (other electrodes)
6 Drain terminal (one electrode part)
7 Source terminal (other electrodes)
20, 21 Side member (protection part)
22 Protective surface member (protective part)
25 Notch

Claims (1)

一の電極部の端部が他の電極部の端部と離れるよう成形され、これらの電極部をパッケージ本体の底面に並設しており、前記パッケージ本体の背面に放熱ドレイン端子を設けてなる半導体装置を覆う半導体装置保護カバーにおいて、対向する矩形板状の側面部材と、その長手方向をなす一側を部分的に連結する、保護面部材とから構成され、前記側面部材と結合されていない前記保護面部材の上部となる締結部が、前記パッケージ本体から前記放熱ドレイン端子に至る稜線に沿って曲げ加工されており、前記パッケージ本体を前記側面部材と前記保護面部材で包み込むような形になっている、絶縁性を有する保護部と、前記保護面部材に形成された切欠部とを備え、一の電極部の端部のみを前記切欠部から外部へ露出することにより、一の電極部の端部と他の電極部の端部との間が前記保護面部材で隔離された状態となるように構成したことを特徴とする半導体装置保護カバー。 The end of one electrode part is shaped so as to be separated from the end of the other electrode part , these electrode parts are juxtaposed on the bottom surface of the package body, and a heat radiation drain terminal is provided on the back surface of the package body A semiconductor device protective cover for covering a semiconductor device , comprising a rectangular plate-shaped side member facing each other and a protective surface member that partially connects one side of the longitudinal direction thereof, and is not coupled to the side member. A fastening portion that is an upper portion of the protective surface member is bent along a ridge line extending from the package body to the heat radiating drain terminal, and the package body is wrapped with the side surface member and the protective surface member. going on, a protective portion having an insulating property, and a said protective surface member formed notch, by exposing to the outside only the end of one electrode portion from the notch, first electrodeposition The semiconductor device protective cover, characterized in that between the ends of the other electrode portion of the part is constructed as a state that is isolated by the protective surface member.
JP2005161227A 2005-06-01 2005-06-01 Semiconductor device protective cover Active JP4247749B2 (en)

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