JP4241353B2 - Arbitrary waveform generator - Google Patents

Arbitrary waveform generator Download PDF

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JP4241353B2
JP4241353B2 JP2003411363A JP2003411363A JP4241353B2 JP 4241353 B2 JP4241353 B2 JP 4241353B2 JP 2003411363 A JP2003411363 A JP 2003411363A JP 2003411363 A JP2003411363 A JP 2003411363A JP 4241353 B2 JP4241353 B2 JP 4241353B2
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健一 成川
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本発明は任意波形発生器に関するものであり、詳しくは、デジタル通信用デバイスをテストするためのＩＱベースバンド信号などの複数信号を発生するのに適した任意波形発生器に関するものである。 The present invention relates to an arbitrary waveform generator , and more particularly to an arbitrary waveform generator suitable for generating a plurality of signals such as an IQ baseband signal for testing a digital communication device.

非特許文献１には、実用化されたディジタルＩＱ信号発生器の一例が開示されている。   Non-Patent Document 1 discloses an example of a practical digital IQ signal generator.

すなわち、非特許文献１には、W-CDMA(Wideband-Code Devision Multiple Access；広帯域符号分割多重アクセス)方式に対応したベースバンド信号発生器の特長、ハードウェア構成、使用例などが記載されている。
しかし、本発明が目的とするレベルや周波数変更の自由度が確保できるテスト信号発生装置を実現するための具体的な構成に関する言及はない。 That is, Non-Patent Document 1 describes features, hardware configurations, usage examples, and the like of a baseband signal generator that supports a W-CDMA (Wideband-Code Division Multiple Access) system. .
However, there is no mention of a specific configuration for realizing a test signal generator capable of ensuring the desired level and frequency change degree desired by the present invention.

ディジタルIQ信号発生器 VB2000 7 横河技報 Vol.44 No.1 (2000) http://www.yokogawa.co.jp/TR/pdf/Japanese/2000-01/20000102.pdfDigital IQ signal generator VB2000 7 Yokogawa Technical Report Vol.44 No.1 (2000) http://www.yokogawa.co.jp/TR/pdf/Japanese/2000-01/20000102.pdf

特許文献１は、多チャンネルデジタル放送擬似信号発生装置に関するものであり、地上デジタル放送開始後の電波発射状況をシミュレートした多チャンネルのデジタル放送擬似信号を発生する技術が開示されている。   Patent Document 1 relates to a multi-channel digital broadcast pseudo signal generator, and discloses a technique for generating a multi-channel digital broadcast pseudo signal that simulates a radio wave emission situation after the start of terrestrial digital broadcasting.

この特許文献１の段落番号００２４には、ＯＦＤＭ信号を発生する任意波形発生部を構成する波形バンク部13に、デジタル放送擬似信号波形データを予め登録することが記載されている。段落番号００２６には、波形バンク部13の各EPROMに登録するＯＦＤＭ信号の生成方法が記載され、デジタル放送擬似信号のキャリアとして複素数のデータが出力されることが示されている。段落番号００３０には、波形バンク部13に記憶するこれら複素数のデータに基づく最終的なＯＦＤＭの時間波形信号について記載されている。   Paragraph No. 0024 of this Patent Document 1 describes that digital broadcast pseudo signal waveform data is registered in advance in the waveform bank unit 13 that constitutes an arbitrary waveform generation unit that generates an OFDM signal. Paragraph number 0026 describes a method of generating an OFDM signal to be registered in each EPROM of the waveform bank unit 13, and indicates that complex data is output as a carrier of a digital broadcast pseudo signal. Paragraph number 0030 describes the final OFDM time waveform signal based on the complex data stored in the waveform bank unit 13.

すなわち、特許文献１に開示されているＯＦＤＭ信号を発生する任意波形発生部を構成する波形バンク部13は、複素数のデータに基づく最終的なＯＦＤＭの時間波形信号が記憶されるものであり、本発明の任意波形発生部を構成する任意波形メモリとは異なる。   That is, the waveform bank unit 13 constituting the arbitrary waveform generation unit that generates the OFDM signal disclosed in Patent Document 1 stores a final OFDM time waveform signal based on complex data. This is different from the arbitrary waveform memory constituting the arbitrary waveform generator of the invention.

特開２００３−６９５２４JP 2003-69524 A

図５は、従来のテスト信号発生装置の一例を示すブロック図である。図５において、任意波形発生部10はＩＱベースバンド信号を発生し、高周波信号発生部20はＩＱ変調機能を備えたものであって、任意波形発生部10が発生するＩＱベースバンド信号により変調された高周波信号を発生する。なお、ＩＱにおけるＩはInphaseの頭文字で同相成分を表し、ＱはQuadratureの頭文字で直交成分を表す。   FIG. 5 is a block diagram showing an example of a conventional test signal generator. In FIG. 5, an arbitrary waveform generator 10 generates an IQ baseband signal, and a high-frequency signal generator 20 has an IQ modulation function, and is modulated by the IQ baseband signal generated by the arbitrary waveform generator 10. Generate high frequency signals. Note that I in IQ represents an in-phase component with an initial of Inphase, and Q represents an orthogonal component with an initial of Quadrature.

ここで、任意波形発生部10は、大きく分けて、Ｉ信号系統とＱ信号系統の2系統を備えている。   Here, the arbitrary waveform generator 10 is roughly divided into two systems, an I signal system and a Q signal system.

Ｉ信号系統は、Ｉ信号用に発生すべき任意波形を格納する任意波形メモリ11、任意波形メモリ11の出力をアナログ波形に変換するD／A変換器12、D／A変換器12の変換出力にゲイン・オフセット調整、フィルタ処理などを施す波形整形部13とで構成されている。   The I signal system includes an arbitrary waveform memory 11 that stores an arbitrary waveform to be generated for the I signal, a D / A converter 12 that converts an output of the arbitrary waveform memory 11 into an analog waveform, and a conversion output of the D / A converter 12 And a waveform shaping unit 13 that performs gain / offset adjustment, filter processing, and the like.

Ｑ信号系統は、Ｑ信号用に発生すべき任意波形を格納する任意波形メモリ14、任意波形メモリ14の出力をアナログ波形に変換するD／A変換器15、D／A変換器15の変換出力にゲイン・オフセット調整、フィルタ処理などを施す波形整形部16とで構成されている。   The Q signal system includes an arbitrary waveform memory 14 that stores an arbitrary waveform to be generated for the Q signal, a D / A converter 15 that converts the output of the arbitrary waveform memory 14 into an analog waveform, and a conversion output of the D / A converter 15 And a waveform shaping unit 16 that performs gain / offset adjustment, filter processing, and the like.

このような構成において、テスト信号を発生させるのにあたっては、各任意波形メモリ11，14に変調波とすべきＩ，Ｑ信号を各々書き込むようにする。   In such a configuration, when the test signal is generated, the I and Q signals to be modulated waves are written in the arbitrary waveform memories 11 and 14, respectively.

ところで、このようなテスト信号発生装置の用途として、妨害波と希望波を同時に含むようなテスト信号を発生させたい場合がある。そこで、図５に示した従来の構成で妨害波と希望波を同時に含むようなテスト信号を発生させるのにあたり、
1)妨害波と希望波を予め合成したＩＱ信号を各任意波形メモリ11，14に書き込む
2)妨害波、希望波用に任意波形発生部10を複数用意し、それらの出力を加算合成した上で高周波信号発生部20に入力する
3)妨害波、希望波用にそれぞれ任意波形発生部10と高周波信号発生部20を用意し、各高周波信号発生部20の出力を加算合成する
といった方法が取られていた。 By the way, as an application of such a test signal generator, there is a case where it is desired to generate a test signal that simultaneously includes an interference wave and a desired wave. Therefore, in generating the test signal that includes the interference wave and the desired wave at the same time in the conventional configuration shown in FIG.
1) Write IQ signals, which are pre-combined interference wave and desired wave, to each arbitrary waveform memory 11, 14
2) Prepare multiple arbitrary waveform generators 10 for interfering and desired waves, add and synthesize those outputs, and input to high frequency signal generator 20
3) A method has been adopted in which an arbitrary waveform generator 10 and a high-frequency signal generator 20 are prepared for the interference wave and the desired wave, and the outputs of the high-frequency signal generators 20 are added and synthesized.

しかし、前者２つの方法では、妨害波と希望波のレベルや周波数の関係を変更しようとした場合には、各任意波形メモリ11，14に書き込まれている波形自体の変更を行わなければならず、変更の自由度に欠けている。
これらに対し、３番目の方法によれば変更の自由度は確保できるが、高価で規模の大きい高周波信号発生部20を複数用意しなければならず、コスト面で問題があった。 However, in the former two methods, when the relationship between the level and frequency of the disturbing wave and the desired wave is to be changed, the waveform itself written in the arbitrary waveform memories 11 and 14 must be changed. Lacks freedom of change.
On the other hand, according to the third method, the degree of freedom of change can be ensured, but there is a problem in terms of cost because it is necessary to prepare a plurality of high-frequency and large-scale high-frequency signal generators 20.

本発明は、これらの従来の問題点を解決するものであり、その目的は、比較的安価な構成で、複数信号相互間のレベルや周波数の関係を変更する自由度が確保できる任意波形発生器を提供することにある。 The present invention solves these conventional problems, and an object of the present invention is to provide an arbitrary waveform generator capable of ensuring a degree of freedom to change the relationship between levels and frequencies between a plurality of signals with a relatively inexpensive configuration . Is to provide.

このような課題を達成する本発明のうち、請求項１の発明は、
第１の波形データと第２の波形データを格納する第１，第２の任意波形メモリと、
余弦波出力端子と正弦波出力端子を有し、直交する２系統の正弦波を出力する複素正弦波発生部と、
虚数端子と実数端子よりなる第１，第２の入力端子と出力端子を有し、前記第１の任意波形メモリの出力端子は前記第１の入力端子の実数端子に接続されて前記第２の任意波形メモリの出力端子は前記第１の入力端子の虚数端子に接続され、前記第２の入力端子の実数端子には前記複素正弦波発生部の余弦波出力端子が接続されて前記第２の入力端子の虚数端子には前記複素正弦波発生部の出力の正弦波出力端子が接続され、これら任意波形メモリの出力と複素正弦波発生部の出力を複素乗算する複素乗算器と、
複素乗算器の実数側出力データと虚数側出力データを個別にアナログ波形に変換し整形出力するアナログ波形処理手段とで構成され、
直交する２系統の信号を生成することを特徴とする任意波形発生器である。 Among the present inventions that achieve such problems, the invention of claim 1
First and second arbitrary waveform memories for storing first waveform data and second waveform data;
A complex sine wave generator having a cosine wave output terminal and a sine wave output terminal and outputting two orthogonal sine waves;
The first arbitrary waveform memory has a first input terminal and an output terminal each consisting of an imaginary number terminal and a real number terminal, and an output terminal of the first arbitrary waveform memory is connected to a real number terminal of the first input terminal, The output terminal of the arbitrary waveform memory is connected to the imaginary terminal of the first input terminal, and the cosine wave output terminal of the complex sine wave generator is connected to the real terminal of the second input terminal. A sine wave output terminal of the output of the complex sine wave generator is connected to the imaginary terminal of the input terminal, and a complex multiplier that performs complex multiplication of the output of the arbitrary waveform memory and the output of the complex sine wave generator,
Consists of analog waveform processing means for individually converting the real side output data and the imaginary side output data of the complex multiplier to an analog waveform and shaping the output,
An arbitrary waveform generator characterized in that it generates two orthogonal signals.

請求項２記載の発明は、請求項１記載の任意波形発生器において、
前記複素乗算器の一方の入力端子の実数端子は第１の乗算器の一方の入力端子および第２の乗算器の一方の入力端子に接続され、
前記複素乗算器の一方の入力端子の虚数端子は第３の乗算器の一方の入力端子および第４の乗算器の一方の入力端子に接続され、
前記複素乗算器の他方の入力端子の実数端子は第１の乗算器の他方の入力端子および第４の乗算器の他方の入力端子に接続され、
前記複素乗算器の他方の入力端子の虚数端子は第２の乗算器の他方の入力端子および第３の乗算器の他方の入力端子に接続され、
第１の乗算器の出力端子は減算器の加算端子に接続され、第２の乗算器の出力端子は加算器の一方の入力端子に接続され、第３の乗算器の出力端子は減算器の減算端子に接続され、第４の乗算器の出力端子は加算器の他方の入力端子に接続され、
減算器の出力端子は複素乗算器の出力端子の実数端子に接続され、加算器の出力端子は複素乗算器の出力端子の虚数端子に接続されていることを特徴とする。 The invention according to claim 2 is the arbitrary waveform generator according to claim 1,
The real terminal of one input terminal of the complex multiplier is connected to one input terminal of the first multiplier and one input terminal of the second multiplier,
The imaginary terminal of one input terminal of the complex multiplier is connected to one input terminal of the third multiplier and one input terminal of the fourth multiplier,
The real terminal of the other input terminal of the complex multiplier is connected to the other input terminal of the first multiplier and the other input terminal of the fourth multiplier,
The imaginary terminal of the other input terminal of the complex multiplier is connected to the other input terminal of the second multiplier and the other input terminal of the third multiplier,
The output terminal of the first multiplier is connected to the addition terminal of the subtracter, the output terminal of the second multiplier is connected to one input terminal of the adder, and the output terminal of the third multiplier is connected to the subtracter. Connected to the subtraction terminal, the output terminal of the fourth multiplier is connected to the other input terminal of the adder,
The output terminal of the subtractor is connected to the real terminal of the output terminal of the complex multiplier, and the output terminal of the adder is connected to the imaginary terminal of the output terminal of the complex multiplier.

請求項３記載の発明は、請求項１記載の任意波形発生器において、
前記複素正弦波発生部は、フェーズアキュムレータと正弦波テーブルを使用した数値演算オシレータであることを特徴とする。 The invention according to claim 3 is the arbitrary waveform generator according to claim 1,
The complex sine wave generator is a numerical operation oscillator using a phase accumulator and a sine wave table.

請求項４記載の発明は、請求項１から請求項３のいずれかに記載の任意波形発生器において、
ＩＱベースバンド信号を出力することを特徴とする。 The invention according to claim 4 is the arbitrary waveform generator according to any one of claims 1 to 3,
An IQ baseband signal is output.

本発明によれば、比較的安価な構成で、複数信号相互間のレベルや周波数の関係を変更する自由度が確保できる任意波形発生器を実現できる。

ADVANTAGE OF THE INVENTION According to this invention, the arbitrary waveform generator which can ensure the freedom degree which changes the relationship of the level and frequency between several signals with a comparatively cheap structure is realizable.

以下、本発明を図面を用いて詳細に説明する。図１は本発明の一実施例を示すブロック図であり、図５と共通する部分には同一の符号を付けている。
図１において、任意波形メモリ11の出力端子は複素乗算器30の一方の入力端子IN1の実数端子Re.に接続され、任意波形メモリ14の出力端子は複素乗算器30の一方の入力端子IN1の虚数端子Im.に接続されている。複素乗算器30の他方の入力端子IN2の実数端子Re.には複素正弦波発生部40の余弦波出力端子cosωtが接続され、複素乗算器30の他方の入力端子IN2の虚数端子Im.には複素正弦波発生部40の出力の正弦波出力端子sinωtが接続されている。そして、複素乗算器30の出力端子OUTの実数端子Re.はD／A変換器12の入力端子に接続され、複素乗算器30の出力端子OUTの虚数端子Im.はD／A変換器15の入力端子に接続されている。 Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention, and the same reference numerals are given to portions common to FIG.
1, the output terminal of the arbitrary waveform memory 11 is connected to the real terminal Re. Of one input terminal IN1 of the complex multiplier 30, and the output terminal of the arbitrary waveform memory 14 is connected to one input terminal IN1 of the complex multiplier 30. Connected to imaginary terminal Im. The cosine wave output terminal cosωt of the complex sine wave generator 40 is connected to the real terminal Re. Of the other input terminal IN2 of the complex multiplier 30, and the imaginary terminal Im. Of the other input terminal IN2 of the complex multiplier 30 is connected to the real terminal Re. A sine wave output terminal sinωt that is an output of the complex sine wave generator 40 is connected. The real terminal Re. Of the output terminal OUT of the complex multiplier 30 is connected to the input terminal of the D / A converter 12, and the imaginary terminal Im. Of the output terminal OUT of the complex multiplier 30 is connected to the D / A converter 15. Connected to the input terminal.

図２は複素乗算器30の具体例を示すブロック図である。複素乗算器30は、例えば４つの乗算器31〜34と減算器35と加算器36とで構成されている。   FIG. 2 is a block diagram showing a specific example of the complex multiplier 30. The complex multiplier 30 includes, for example, four multipliers 31 to 34, a subtracter 35, and an adder 36.

複素乗算器30の一方の入力端子IN1の実数端子Re.は乗算器31の一方の入力端子および乗算器32の一方の入力端子に接続され、複素乗算器30の一方の入力端子IN1の虚数端子Im.は乗算器33の一方の入力端子および乗算器34の一方の入力端子に接続されている。   The real terminal Re. Of one input terminal IN1 of the complex multiplier 30 is connected to one input terminal of the multiplier 31 and one input terminal of the multiplier 32, and the imaginary terminal of one input terminal IN1 of the complex multiplier 30. Im. Is connected to one input terminal of the multiplier 33 and one input terminal of the multiplier 34.

複素乗算器30の他方の入力端子IN2の実数端子Re.は乗算器31の他方の入力端子および乗算器34の他方の入力端子に接続され、複素乗算器30の他方の入力端子IN2の虚数端子Im.は乗算器32の他方の入力端子および乗算器33の他方の入力端子に接続されている。   The real terminal Re. Of the other input terminal IN2 of the complex multiplier 30 is connected to the other input terminal of the multiplier 31 and the other input terminal of the multiplier 34, and the imaginary terminal of the other input terminal IN2 of the complex multiplier 30. Im. Is connected to the other input terminal of the multiplier 32 and the other input terminal of the multiplier 33.

乗算器31の出力端子は減算器35の加算端子に接続され、乗算器32の出力端子は加算器36の一方の入力端子に接続され、乗算器33の出力端子は減算器35の減算端子に接続され、乗算器34の出力端子は加算器36の他方の入力端子に接続されている。   The output terminal of the multiplier 31 is connected to the addition terminal of the subtractor 35, the output terminal of the multiplier 32 is connected to one input terminal of the adder 36, and the output terminal of the multiplier 33 is connected to the subtraction terminal of the subtractor 35. The output terminal of the multiplier 34 is connected to the other input terminal of the adder 36.

そして、減算器35の出力端子は複素乗算器30の出力端子OUTの実数端子Re.に接続され、加算器36の出力端子は複素乗算器30の出力端子OUTの虚数端子Im.に接続されている。   The output terminal of the subtractor 35 is connected to the real terminal Re. Of the output terminal OUT of the complex multiplier 30, and the output terminal of the adder 36 is connected to the imaginary terminal Im. Of the output terminal OUT of the complex multiplier 30. Yes.

複素正弦波発生部40としては、例えばフェーズアキュムレータと正弦波テーブルを使用した数値演算オシレータ（ＮＣＯ）を用いる。この複素正弦波発生部40は、直交する２つの正弦波信号cosωtとsinωtを発生する。   As the complex sine wave generator 40, for example, a numerical operation oscillator (NCO) using a phase accumulator and a sine wave table is used. The complex sine wave generator 40 generates two orthogonal sine wave signals cosωt and sinωt.

図１および図２の動作を説明する。任意波形メモリ11の出力信号をＩ'、任意波形メモリ14の出力信号をＱ'、複素正弦波発生部40の出力をexp(jωt)とすると、複素乗算器30の出力（Ｉ＋ｊＱ）は次式で示される。
Ｉ＋ｊＱ＝（Ｉ'＋ｊＱ'）・exp(jωt)
これは、（Ｉ'＋ｊＱ'）で示される複素信号の周波数スペクトルを、周波数ωだけ平行移動する操作を表している。すなわち複素乗算器30のωの値によって、任意にメモリ波形のスペクトルを移動できることになる。ちなみにω＝０であれば、スペクトルの移動は行われない。 The operation of FIGS. 1 and 2 will be described. If the output signal of the arbitrary waveform memory 11 is I ′, the output signal of the arbitrary waveform memory 14 is Q ′, and the output of the complex sine wave generator 40 is exp (jωt), the output (I + jQ) of the complex multiplier 30 is Indicated by
I + jQ = (I ′ + jQ ′) · exp (jωt)
This represents an operation of translating the frequency spectrum of the complex signal represented by (I ′ + jQ ′) by the frequency ω. That is, the spectrum of the memory waveform can be arbitrarily moved according to the value of ω of the complex multiplier 30. Incidentally, if ω = 0, the spectrum is not moved.

このような任意波形発生部10の構成によれば、任波波形メモリ11，14に書き込まれている波形を書き換えることなく、出力されるＩＱ信号の中心周波数を変更することが可能となる。   According to such a configuration of the arbitrary waveform generation unit 10, it is possible to change the center frequency of the output IQ signal without rewriting the waveforms written in the arbitrary waveform memories 11 and 14.

したがって、このようなＩＱ信号をＩＱ変調機能を備えた高周波信号発生部20の入力として用いることにより、高周波信号発生部20側の設定周波数を固定していても、任意波形発生部10を構成する複素正弦波発生器40の周波数を変更することで、高周波信号発生部20の出力周波数を任意に変更することができる。   Therefore, by using such an IQ signal as an input of the high frequency signal generator 20 having the IQ modulation function, the arbitrary waveform generator 10 is configured even if the set frequency on the high frequency signal generator 20 side is fixed. By changing the frequency of the complex sine wave generator 40, the output frequency of the high-frequency signal generator 20 can be arbitrarily changed.

図３は、本発明に基づき、妨害波と希望波を同時に含むテスト信号を発生させるように構成したテスト信号発生装置の一例を示すブロック図である。図３において、任意波形発生部50，60はそれぞれ図１のように構成されている。任意波形発生部50のＩ信号出力端子は加算器71の一方の入力端子に接続され、任意波形発生部50のＱ信号出力端子は加算器72の一方の入力端子に接続されている。任意波形発生部60のＩ信号出力端子は加算器71の他方の入力端子に接続され、任意波形発生部60のＱ信号出力端子は加算器72の他方の入力端子に接続されている。そして、加算器71の出力端子は高周波信号発生部20のＩ信号入力端子に接続され、加算器72の出力端子は高周波信号発生部20のＱ信号入力端子に接続されている。   FIG. 3 is a block diagram showing an example of a test signal generator configured to generate a test signal that simultaneously includes an interference wave and a desired wave according to the present invention. In FIG. 3, each of the arbitrary waveform generators 50 and 60 is configured as shown in FIG. The I signal output terminal of the arbitrary waveform generator 50 is connected to one input terminal of the adder 71, and the Q signal output terminal of the arbitrary waveform generator 50 is connected to one input terminal of the adder 72. The I signal output terminal of the arbitrary waveform generator 60 is connected to the other input terminal of the adder 71, and the Q signal output terminal of the arbitrary waveform generator 60 is connected to the other input terminal of the adder 72. The output terminal of the adder 71 is connected to the I signal input terminal of the high frequency signal generator 20, and the output terminal of the adder 72 is connected to the Q signal input terminal of the high frequency signal generator 20.

ここで、任意波形発生部50の任意波形メモリには希望波のベースバンド波形が書き込まれ、任意波形発生部60の任意波形メモリには妨害波のベースバンド波形が書き込まれているものとする。そして、任意波形発生部50の複素正弦波発生器の設定周波数をω１、任意波形発生部60の複素正弦波発生器の周波数をω２、高周波信号発生部20の設定周波数をωｃとすると、高周波信号発生部20の出力として図４のような希望波、妨害波の合成波形が得られることになる。   Here, it is assumed that the baseband waveform of the desired wave is written in the arbitrary waveform memory of the arbitrary waveform generation unit 50, and the baseband waveform of the interference wave is written in the arbitrary waveform memory of the arbitrary waveform generation unit 60. When the set frequency of the complex sine wave generator of the arbitrary waveform generator 50 is ω1, the frequency of the complex sine wave generator of the arbitrary waveform generator 60 is ω2, and the set frequency of the high frequency signal generator 20 is ωc, the high frequency signal A combined waveform of the desired wave and the interference wave as shown in FIG.

図４において、希望波と妨害波の周波数関係は、ω１、ω２の設定により任意に変更可能である。また、希望波と妨害波のレベル関係は、任意波形発生部50と任意波形発生部60のそれぞれのゲイン調整機能で調整できる。
これにより、低コストで、自由度の高い希望波、妨害波を含んだテスト信号の発生が可能となる。 In FIG. 4, the frequency relationship between the desired wave and the interference wave can be arbitrarily changed by setting ω1 and ω2. Further, the level relationship between the desired wave and the interference wave can be adjusted by the respective gain adjustment functions of the arbitrary waveform generator 50 and the arbitrary waveform generator 60.
As a result, it is possible to generate a test signal including a desired wave and a disturbing wave with a high degree of freedom at a low cost.

なお上記実施例ではＩＱベースバンド信号を出力する装置について説明したが、本発明は、携帯電話やデジタル放送などのデジタル通信用デバイスをテストするための各種の信号発生器としても有効である。   In the above embodiment, an apparatus for outputting an IQ baseband signal has been described. However, the present invention is also effective as various signal generators for testing digital communication devices such as mobile phones and digital broadcasts.

本発明の一実施例を示すブロック図である。It is a block diagram which shows one Example of this invention. 図１の複素乗算器30の具体例を示すブロック図である。FIG. 2 is a block diagram illustrating a specific example of a complex multiplier 30 in FIG. 1. 妨害波と希望波を同時に含むテスト信号を発生させるテスト信号発生装置の一例を示すブロック図である。It is a block diagram which shows an example of the test signal generator which generates the test signal containing an interference wave and a desired wave simultaneously. 図３の装置から出力される希望波と妨害波の合成波形説明図である。FIG. 4 is an explanatory diagram of a combined waveform of a desired wave and an interference wave output from the apparatus of FIG. 3. 従来のテスト信号発生装置の一例を示すブロック図である。It is a block diagram which shows an example of the conventional test signal generator.

符号の説明Explanation of symbols

１１,１４ 任意波形メモリ
１２,１５ Ｄ／Ａ変換器
１３,１６ 波形整形部
２０ 高周波信号発生部
３０ 複素演算器
３１〜３４ 乗算器
３５ 減算器
３６，７１，７２ 加算器
４０ 複素正弦波発生器
５０，６０ 任意波形発生器

DESCRIPTION OF SYMBOLS 11,14 Arbitrary waveform memory 12,15 D / A converter 13,16 Waveform shaping part 20 High frequency signal generation part 30 Complex arithmetic units 31-34 Multiplier 35 Subtractor 36,71,72 Adder 40 Complex sine wave generator 50,60 Arbitrary waveform generator

Claims (4)

第１の波形データと第２の波形データを格納する第１，第２の任意波形メモリと、
余弦波出力端子と正弦波出力端子を有し、直交する２系統の正弦波を出力する複素正弦波発生部と、
虚数端子と実数端子よりなる第１，第２の入力端子と出力端子を有し、前記第１の任意波形メモリの出力端子は前記第１の入力端子の実数端子に接続されて前記第２の任意波形メモリの出力端子は前記第１の入力端子の虚数端子に接続され、前記第２の入力端子の実数端子には前記複素正弦波発生部の余弦波出力端子が接続されて前記第２の入力端子の虚数端子には前記複素正弦波発生部の出力の正弦波出力端子が接続され、これら任意波形メモリの出力と複素正弦波発生部の出力を複素乗算する複素乗算器と、
複素乗算器の実数側出力データと虚数側出力データを個別にアナログ波形に変換し整形出力するアナログ波形処理手段とで構成され、
直交する２系統の信号を生成することを特徴とする任意波形発生器。 First and second arbitrary waveform memories for storing first waveform data and second waveform data;
A complex sine wave generator having a cosine wave output terminal and a sine wave output terminal and outputting two orthogonal sine waves;
The first arbitrary waveform memory has a first input terminal and an output terminal each consisting of an imaginary number terminal and a real number terminal, and an output terminal of the first arbitrary waveform memory is connected to a real number terminal of the first input terminal, The output terminal of the arbitrary waveform memory is connected to the imaginary terminal of the first input terminal, and the cosine wave output terminal of the complex sine wave generator is connected to the real terminal of the second input terminal. A sine wave output terminal of the output of the complex sine wave generator is connected to the imaginary terminal of the input terminal, and a complex multiplier that performs complex multiplication of the output of the arbitrary waveform memory and the output of the complex sine wave generator,
Consists of analog waveform processing means for individually converting the real side output data and the imaginary side output data of the complex multiplier to an analog waveform and shaping the output,
An arbitrary waveform generator characterized by generating two orthogonal signals. 前記複素乗算器の一方の入力端子の実数端子は第１の乗算器の一方の入力端子および第２の乗算器の一方の入力端子に接続され、
前記複素乗算器の一方の入力端子の虚数端子は第３の乗算器の一方の入力端子および第４の乗算器の一方の入力端子に接続され、
前記複素乗算器の他方の入力端子の実数端子は第１の乗算器の他方の入力端子および第４の乗算器の他方の入力端子に接続され、
前記複素乗算器の他方の入力端子の虚数端子は第２の乗算器の他方の入力端子および第３の乗算器の他方の入力端子に接続され、
第１の乗算器の出力端子は減算器の加算端子に接続され、第２の乗算器の出力端子は加算器の一方の入力端子に接続され、第３の乗算器の出力端子は減算器の減算端子に接続され、第４の乗算器の出力端子は加算器の他方の入力端子に接続され、
減算器の出力端子は複素乗算器の出力端子の実数端子に接続され、加算器の出力端子は複素乗算器の出力端子の虚数端子に接続されていることを特徴とする請求項１記載の任意波形発生器。 The real terminal of one input terminal of the complex multiplier is connected to one input terminal of the first multiplier and one input terminal of the second multiplier,
The imaginary terminal of one input terminal of the complex multiplier is connected to one input terminal of the third multiplier and one input terminal of the fourth multiplier,
The real terminal of the other input terminal of the complex multiplier is connected to the other input terminal of the first multiplier and the other input terminal of the fourth multiplier,
The imaginary terminal of the other input terminal of the complex multiplier is connected to the other input terminal of the second multiplier and the other input terminal of the third multiplier,
The output terminal of the first multiplier is connected to the addition terminal of the subtracter, the output terminal of the second multiplier is connected to one input terminal of the adder, and the output terminal of the third multiplier is connected to the subtracter. Connected to the subtraction terminal, the output terminal of the fourth multiplier is connected to the other input terminal of the adder,
2. An arbitrary output terminal according to claim 1, wherein the output terminal of the subtractor is connected to the real number terminal of the output terminal of the complex multiplier, and the output terminal of the adder is connected to the imaginary number terminal of the output terminal of the complex multiplier. Waveform generator. 前記複素正弦波発生部は、フェーズアキュムレータと正弦波テーブルを使用した数値演算オシレータであることを特徴とする請求項１記載の任意波形発生器。   2. The arbitrary waveform generator according to claim 1, wherein the complex sine wave generator is a numerical operation oscillator using a phase accumulator and a sine wave table. ＩＱベースバンド信号を出力することを特徴とする請求項１から請求項３のいずれかに記載の任意波形発生器。   The arbitrary waveform generator according to any one of claims 1 to 3, wherein an IQ baseband signal is output.
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