JP4208995B2 - Substrate temperature measurement method - Google Patents

Substrate temperature measurement method Download PDF

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JP4208995B2
JP4208995B2 JP19370698A JP19370698A JP4208995B2 JP 4208995 B2 JP4208995 B2 JP 4208995B2 JP 19370698 A JP19370698 A JP 19370698A JP 19370698 A JP19370698 A JP 19370698A JP 4208995 B2 JP4208995 B2 JP 4208995B2
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Prior art keywords
substrate
heat treatment
temperature
impurities
impurity distribution
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JP2000009549A (en
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正裕 清水
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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  • Measuring Temperature Or Quantity Of Heat (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体ウエハ等の基板の温度を測定する基板温度の測定方法に関する。
【0002】
【従来の技術】
半導体デバイスの製造プロセスにおいては、所定の不純物を注入した後のアニール等種々の熱処理が存在し、また種々の膜の成膜工程やエッチング工程等の熱が関与する処理が存在する。これらの処理においては、その際の半導体ウエハの温度がその特性に大きな影響を及ぼすため、半導体ウエハの温度制御が極めて重要である。
【0003】
しかし、半導体ウエハの温度を直接測定することが困難であることから、従来は、半導体ウエハの加熱部分であるサセプタの温度や、チャンバー内の雰囲気温度をモニターしてその温度に基づいて間接的にウエハ温度を求めており、実際のウエハ温度自体を直接把握していないため、半導体ウエハのプロセス中の温度を高精度で求めることはできていない。なお、半導体ウエハの比抵抗を直接測定して、半導体ウエハの面内温度の均一性を把握する方法があるが、この方法では温度の絶対値を求めることが困難である。
【0004】
【発明が解決しようとする課題】
本発明はかかる事情に鑑みてなされたものであって、基板自体から直接的に高精度でその温度を把握することができる基板温度の測定方法を提供することを目的とする。
【0005】
【課題を解決するための手段】
上記課題を解決するために、本発明は、不純物を存在させた基板に所定の熱処理を施した際における基板の深さ方向の不純物分布を測定する工程と、熱処理温度と保持時間を含む熱処理条件が異なる複数の場合について、基板の深さ方向の不純物分布を理論に基づいて計算する工程と、理論計算で求めた不純物の複数の分布の中から、前記測定による不純物分布に一致する分布を選択する工程を含み、選択された理論不純物分布の計算に基づいて、熱処理の際の基板温度と時間との関係である熱履歴を把握することを特徴とする基板温度の測定方法を提供する。
【0006】
また、本発明は、不純物を存在させた基板に所定の熱処理を施した際における基板の深さ方向の不純物分布を基板面内の複数箇所で測定する工程と、熱処理温度と保持時間を含む熱処理条件が異なる複数の場合について、基板の深さ方向の不純物分布を理論に基づいて計算する工程と、理論計算で求めた不純物の複数の分布の中から、前記測定による不純物分布に一致する分布を選択する工程を含み、選択された理論不純物分布の計算に基づいて、熱処理の際の基板面内の複数箇所における基板温度と時間との関係である熱履歴を把握することを特徴とする基板温度の測定方法を提供する。
【0007】
さらに、本発明は、熱処理温度以外の昇温速度、保持時間が一定の場合に、不純物を存在させた基板に所定の熱処理を施した際における基板の所定深さの不純物量を測定し、その測定結果を、理論に基づく計算で得られた前記保持時間内の基板温度と所定深さの不純物量との関係と比較し、熱処理の際の前記保持時間内の基板温度を把握することを特徴とする基板温度の測定方法を提供する。
【0008】
さらにまた、本発明は、熱処理温度以外の昇温速度、保持時間が一定の場合に、不純物を存在させた基板に所定の熱処理を施した際における基板の所定深さの不純物量を基板面内の複数箇所で測定し、それらの測定結果を、理論に基づく計算で得られた前記保持時間内の基板温度と所定深さの不純物量との関係と比較し、熱処理の際の前記保持時間内の基板面内の温度分布を把握することを特徴とする基板温度の測定方法を提供する。
【0009】
これらの発明において、熱処理前に基板の表面部分に不純物をドープすることにより基板に不純物を存在させることができる。
【0010】
本発明においては、基板に不純物を存在させた状態で基板を熱処理すると、その熱処理温度に応じた不純物の拡散が生じることを利用して基板温度を把握する。すなわち、例えば理論的なシミュレーション結果のような計算結果から各温度における基板の深さ方向の不純物分布を把握しておけば、実際の熱処理により得られた基板深さ方向の不純物分布をこのような計算結果と比較することにより、基板の温度を把握することができる。このように基板自体の状態に基づいて基板温度を把握するので、極めて高精度に基板の温度を測定することができる。そして、実際の不純物分布を種々の熱履歴に対応する計算結果と比較すれば、温度のみならず熱履歴をも把握することができる。昇温速度や保持時間が一定の場合には、不純物分布を測定する代わりに基板の所定深さの不純物量を測定して計算結果に基づく温度と所定深さの不純物量との関係と比較すればより容易に基板温度を把握することができる。また、このような基板の深さ方向の不純物分布や所定深さの不純物量を基板面内の複数位置で測定することにより、基板面内の温度分布を高精度で把握することができる。
【0011】
【発明の実施の形態】
以下、本発明の実施の形態について詳細に説明する。ここでは、基板として半導体ウエハを用いた場合について説明する。
図1は、本発明の方法の一実施形態を示す工程図である。本発明により半導体ウエハ温度を測定する際には、図1に示すように、まず、不純物を存在させた半導体ウエハに所定の熱処理を施す(工程1)。次いで、半導体ウエハの深さ方向の不純物分布を測定する(工程2)。さらに、予めシミュレーションにより求めた各条件における不純物分布カーブによるカーブフィッティングを行う(工程3)。すなわち、工程2で求めた不純物分布カーブに一致するシミュレーションカーブを選択する。そして、選択されたシミュレーションカーブから熱処理の際の半導体ウエハの温度を特定する(工程4)。
【0012】
上記工程1において用いられる不純物としては、通常、半導体ウエハの不純物元素として用いられる3価または5価の元素、典型的にはBまたはAsを用いることができる。これら不純物元素は通常のイオン注入を用いてドープすることにより表面部分に存在させることができる。
【0013】
本発明が適用される熱処理は特に限定されないが、不純物をドープした後の600〜1200℃程度の高温領域でのアニール処理が好適である。このような範囲の温度の熱処理では温度変化により不純物分布の変化が生じやすく、高精度でウエハ温度を把握することができる。
【0014】
このようなアニール処理には、制御性がよい短時間アニール(RTA;Rapid Thermal Annealing)が多用されており、そのため図2に示すようなRTP(Rapid Thermal Processor)が用いられる。図2において、参照符号1はプロセスチャンバーであり、このプロセスチャンバー1は上部チャンバー1aおよび下部チャンバー1bに分離可能となっている。上部チャンバー1aおよび下部チャンバー1bの間には石英窓2が設けられている。チャンバー1の上方には発熱部3が着脱可能に設けられている。発熱部3は、水冷ジャケット4と、その下面に複数配列されたタングステンランプ5とを有している。プロセスチャンバー1の下方には半導体ウエハWを保持する水冷プラテン6が着脱可能に設けられている。このプラテン6の上面にはウエハ支持ピン7が設けられており、半導体ウエハWはこの支持ピン7に支持される。発熱部3のジャケット4と上部チャンバー1aとの間、上部チャンバー1aと石英窓2との間、石英窓2と下部チャンバー1bとの間、下部チャンバー1bとプラテン6との間にはシール部材Sが介在されており、プロセスチャンバー1は気密状態となる。チャンバー1内は図示しない排気装置により減圧可能となっている。
【0015】
このような熱処理装置においては、プロセスチャンバー1内に半導体ウエハWをセットし、その中に気密な空間を形成し、排気装置により排気してその中を真空状態とする。次いで、発熱部3のタングステンランプ5をオンにすると、タングステンランプ5で発生した熱が石英窓2を通過して半導体ウエハWに至り、半導体ウエハWが急速に加熱される。加熱が終了した後は、プロセスチャンバー1内を大気圧に戻し、発熱部3を退避させるとともに、プラテン6を下降させて半導体ウエハWを急速に冷却する。このようにして、所望の急速加熱処理が実現される。
【0016】
半導体ウエハの表面部分にドープされた不純物は、このような熱処理によって内部に拡散し、深さ方向に所定の分布を形成する。工程2では、このような深さ方向の不純物の分布を分析によって求める。この際の分析方法は特に限定されないが、二次イオン質量分析(SIMS)により好適に求めることができる。
【0017】
工程3では、理論的な計算により各条件毎に深さ方向の不純物分布のシミュレーションカーブを予めコンピュータに入力しておき、実際にSIMSにより求めた不純物分布のカーブに対し、これらシミュレーションカーブによるカーブフィッティングを行う。この際のシミュレーションカーブの作成およびカーブフィッティングは、適宜のソフトウェアーを用いて行うことができ、例えばT−CADのプロセスシミュレーターを用いて行うことができる。
【0018】
図3は、理論的な計算結果に基づくシリコンウエハーの不純物分布のシミュレーションカーブと実際にSIMSにより求めた不純物分布のカーブとを比較した図であり、(a)は1000℃で1分間のRTAを行ったもの、(b)は1000℃で1分間のRTAを行った後、750℃で160分間の非活性化アニールを行ったもの、(c)は750℃で10分間のアニールを行ったもの、(d)は750℃で160分間のアニールを行ったものである(出典:Chang et al.IEDM97)。
【0019】
図3に示すように、理論的な計算結果に基づいて描かれた不純物分布のシミュレーションカーブは、実際の分析値とほぼ一致しており、このようなシミュレーション結果に基づいて半導体ウエハの温度を把握することの有効性が理解される。この図にも示すように、不純物分布は処理温度によって異なっているから、種々の熱処理温度でのシミュレーションデータを入力しておけば、熱処理を行った後の分析結果をこれらシミュレーションデータと比較することにより、熱処理の際の半導体ウエハの温度を特定することができる。
【0020】
このように、高精度のシミュレーションデータに基づいてカーブフィッティングを行って、半導体ウエハの不純物分布という半導体ウエハ自体の状態に基づいてその温度を把握するので、従来の間接的な温度測定の場合と比較して、著しく精度の高い温度測定を行うことができる。
【0021】
また、図3から明らかなように、熱処理温度のみならず保持時間等他の熱処理条件によっても不純物分布は異なっている。したがって、種々の熱履歴を加えた場合の不純物分布のシミュレーション結果を入力しておくことにより、半導体ウエハに対して熱処理を行った際の熱処理温度のみならず、熱履歴を把握することも可能である。
【0022】
逆に、熱処理温度以外の昇温速度や保持時間等が一定の場合には、上述のような不純物分布を測定する代わりに、ウエハの所定深さの不純物量を測定し、熱処理温度と所定深さの不純物量との関係のシミュレーションデータと比較するようにすれば、より容易に基板温度を把握することができる。
【0023】
以上のような手順により半導体ウエハの温度を把握することができるが、半導体ウエハ面内の温度分布を把握する場合には、深さ方向の不純物分布や所定深さの不純物量の測定を基板面内の複数位置で測定し、同様にシミュレーションデータと比較すればよい。これにより、ウエハ面内の温度分布を高精度で把握することができる。
【0024】
なお、本発明は上記実施の形態に限定されることなく種々変形が可能である。例えば上記実施の形態では半導体ウエハの温度測定について示したが、これに限らず、不純物の拡散が想定される基板であれば用いることができる。また、対象とする熱処理も上述のようなアニールに限らず、他の種々の熱が関与する処理に適用することができる。
【0025】
【発明の効果】
以上説明したように、本発明によれば、不純物を存在させた基板に所定の熱処理を施した際における基板の深さ方向の不純物分布を測定し、その測定結果を、計算結果に基づく温度と不純物分布との関係と比較し、熱処理の際の基板温度を把握するので、実際の基板の状態に基づいて直接的に基板温度を把握することができ、極めて高精度に基板の温度を測定することができる。また、昇温速度や保持時間が一定の場合には、不純物分布を測定する代わりに基板の所定深さの不純物量を測定して計算結果に基づく温度と所定深さの不純物量との関係と比較すれば、より容易に基板温度を把握することができる。さらに、このような基板の深さ方向の不純物分布や所定深さの不純物量を基板面内の複数位置で測定してこれらについて計算結果と比較することにより、基板面内の温度分布を高精度で把握することができる。
【図面の簡単な説明】
【図1】本発明の方法の一実施形態を示す工程図。
【図2】本発明が適用される熱処理を行うための装置の一例を示す断面図。
【図3】理論的な計算結果に基づくシリコンウエハーの不純物分布のシミュレーションカーブと実際に二次イオン質量分析により求めた不純物分布のカーブとを比較して示す図。
【符号の説明】
1;チャンバー
2;石英窓
3;発熱部
4;水冷ジャケット
5;タングステンランプ
6;プラテン
7;ウエハ支持ピン
S;シール部材
W;半導体ウエハ
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a substrate temperature measuring method for measuring the temperature of a substrate such as a semiconductor wafer.
[0002]
[Prior art]
In the manufacturing process of a semiconductor device, there are various heat treatments such as annealing after implanting a predetermined impurity, and there are processes involving heat such as various film formation processes and etching processes. In these processes, since the temperature of the semiconductor wafer at that time has a great influence on the characteristics, temperature control of the semiconductor wafer is extremely important.
[0003]
However, since it is difficult to directly measure the temperature of the semiconductor wafer, conventionally, the temperature of the susceptor, which is a heated portion of the semiconductor wafer, and the ambient temperature in the chamber are monitored and indirectly based on the temperature. Since the wafer temperature is obtained and the actual wafer temperature itself is not directly grasped, the temperature during the process of the semiconductor wafer cannot be obtained with high accuracy. Although there is a method of directly measuring the specific resistance of the semiconductor wafer to grasp the uniformity of the in-plane temperature of the semiconductor wafer, it is difficult to obtain the absolute value of the temperature by this method.
[0004]
[Problems to be solved by the invention]
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a method for measuring a substrate temperature, in which the temperature can be grasped directly and accurately from the substrate itself.
[0005]
[Means for Solving the Problems]
In order to solve the above problems, the present invention provides a process for measuring an impurity distribution in a depth direction of a substrate when a predetermined heat treatment is performed on a substrate in which impurities are present, and a heat treatment condition including a heat treatment temperature and a holding time. Select the distribution that matches the impurity distribution obtained by the measurement from the process of calculating the impurity distribution in the depth direction of the substrate based on theory and the distribution of impurities determined by theoretical calculation for multiple cases with different A method for measuring a substrate temperature is provided, which includes grasping a thermal history that is a relationship between a substrate temperature and a time during heat treatment based on a calculation of a selected theoretical impurity distribution .
[0006]
The present invention also includes a step of measuring the impurity distribution in the depth direction of the substrate at a plurality of locations in the substrate surface when a predetermined heat treatment is performed on the substrate in which impurities are present, and a heat treatment including a heat treatment temperature and a holding time. For a plurality of cases with different conditions, a step of calculating the impurity distribution in the depth direction of the substrate based on the theory, and a distribution that matches the impurity distribution obtained by the above measurement from the plurality of distributions of the impurities obtained by the theoretical calculation. Substrate temperature characterized by grasping a thermal history that is a relation between substrate temperature and time at a plurality of locations in the substrate surface during the heat treatment based on calculation of the selected theoretical impurity distribution Provides a measurement method.
[0007]
Furthermore, the present invention measures the amount of impurities at a predetermined depth of a substrate when a predetermined heat treatment is performed on the substrate in which impurities are present when the temperature rising rate other than the heat treatment temperature and the holding time are constant , The measurement result is compared with the relationship between the substrate temperature within the holding time obtained by calculation based on theory and the amount of impurities at a predetermined depth , and the substrate temperature within the holding time during heat treatment is grasped. A method for measuring the substrate temperature is provided.
[0008]
Furthermore, the present invention relates to the amount of impurities at a predetermined depth of a substrate when a predetermined heat treatment is performed on a substrate in which impurities are present when a heating rate other than the heat treatment temperature and a holding time are constant . The measurement results are compared with the relationship between the substrate temperature within the holding time obtained by calculation based on theory and the amount of impurities at a predetermined depth, and within the holding time during the heat treatment . A method for measuring a substrate temperature characterized by grasping a temperature distribution in the substrate surface of the substrate is provided.
[0009]
In these inventions, impurities can be present in the substrate by doping the surface portion of the substrate before the heat treatment.
[0010]
In the present invention, the substrate temperature is grasped by utilizing the fact that when the substrate is heat-treated in the presence of impurities in the substrate, the diffusion of impurities according to the heat treatment temperature occurs. That is, for example, if the impurity distribution in the depth direction of the substrate at each temperature is grasped from a calculation result such as a theoretical simulation result, the impurity distribution in the substrate depth direction obtained by actual heat treatment can be obtained as described above. By comparing with the calculation result, the temperature of the substrate can be grasped. Thus, since the substrate temperature is grasped based on the state of the substrate itself, the temperature of the substrate can be measured with extremely high accuracy. If the actual impurity distribution is compared with the calculation results corresponding to various thermal histories, not only the temperature but also the thermal history can be grasped. If the heating rate and holding time are constant, instead of measuring the impurity distribution, measure the amount of impurities at a predetermined depth of the substrate and compare it with the relationship between the temperature based on the calculation results and the amount of impurities at the predetermined depth. Thus, the substrate temperature can be grasped more easily. Further, by measuring the impurity distribution in the depth direction of the substrate and the amount of impurities at a predetermined depth at a plurality of positions in the substrate surface, the temperature distribution in the substrate surface can be grasped with high accuracy.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail. Here, a case where a semiconductor wafer is used as the substrate will be described.
FIG. 1 is a process diagram illustrating an embodiment of the method of the present invention. When measuring the semiconductor wafer temperature according to the present invention, as shown in FIG. 1, first, a predetermined heat treatment is performed on the semiconductor wafer in which impurities are present (step 1). Next, the impurity distribution in the depth direction of the semiconductor wafer is measured (step 2). Further, curve fitting is performed using an impurity distribution curve under each condition obtained in advance by simulation (step 3). That is, a simulation curve that matches the impurity distribution curve obtained in step 2 is selected. Then, the temperature of the semiconductor wafer during heat treatment is specified from the selected simulation curve (step 4).
[0012]
As the impurity used in the step 1, a trivalent or pentavalent element, typically B or As, which is usually used as an impurity element of a semiconductor wafer can be used. These impurity elements can be present in the surface portion by doping using ordinary ion implantation.
[0013]
The heat treatment to which the present invention is applied is not particularly limited, but an annealing treatment in a high temperature region of about 600 to 1200 ° C. after doping with impurities is suitable. In the heat treatment in such a temperature range, the impurity distribution easily changes due to the temperature change, and the wafer temperature can be grasped with high accuracy.
[0014]
For such annealing treatment, rapid annealing (RTA; Rapid Thermal Annealing) with good controllability is frequently used, and therefore an RTP (Rapid Thermal Processor) as shown in FIG. 2 is used. In FIG. 2, reference numeral 1 denotes a process chamber. The process chamber 1 can be separated into an upper chamber 1a and a lower chamber 1b. A quartz window 2 is provided between the upper chamber 1a and the lower chamber 1b. A heating unit 3 is detachably provided above the chamber 1. The heat generating unit 3 includes a water cooling jacket 4 and a plurality of tungsten lamps 5 arranged on the lower surface thereof. A water-cooled platen 6 that holds the semiconductor wafer W is detachably provided below the process chamber 1. Wafer support pins 7 are provided on the upper surface of the platen 6, and the semiconductor wafer W is supported by the support pins 7. A seal member S is provided between the jacket 4 of the heat generating part 3 and the upper chamber 1a, between the upper chamber 1a and the quartz window 2, between the quartz window 2 and the lower chamber 1b, and between the lower chamber 1b and the platen 6. The process chamber 1 is in an airtight state. The chamber 1 can be depressurized by an exhaust device (not shown).
[0015]
In such a heat treatment apparatus, the semiconductor wafer W is set in the process chamber 1, an airtight space is formed therein, the air is exhausted by an exhaust device, and the inside is evacuated. Next, when the tungsten lamp 5 of the heat generating unit 3 is turned on, the heat generated by the tungsten lamp 5 passes through the quartz window 2 and reaches the semiconductor wafer W, and the semiconductor wafer W is rapidly heated. After the heating is completed, the inside of the process chamber 1 is returned to the atmospheric pressure, the heat generating part 3 is retracted, and the platen 6 is lowered to rapidly cool the semiconductor wafer W. In this way, the desired rapid heating process is realized.
[0016]
Impurities doped in the surface portion of the semiconductor wafer diffuse into the interior by such heat treatment, and form a predetermined distribution in the depth direction. In step 2, such a distribution of impurities in the depth direction is obtained by analysis. Although the analysis method in this case is not particularly limited, it can be suitably obtained by secondary ion mass spectrometry (SIMS).
[0017]
In step 3, a simulation curve of the impurity distribution in the depth direction is input to a computer in advance for each condition by theoretical calculation, and curve fitting using these simulation curves is performed on the impurity distribution curve actually obtained by SIMS. I do. Creation of the simulation curve and curve fitting at this time can be performed using appropriate software, for example, using a T-CAD process simulator.
[0018]
FIG. 3 is a diagram comparing a simulation curve of impurity distribution of a silicon wafer based on a theoretical calculation result and a curve of impurity distribution actually obtained by SIMS, and (a) shows an RTA for 1 minute at 1000 ° C. (B): RTA at 1000 ° C. for 1 minute followed by deactivation annealing at 750 ° C. for 160 minutes, (c): Annealing at 750 ° C. for 10 minutes , (D) shows the result of annealing at 750 ° C. for 160 minutes (Source: Chang et al. IEDM97).
[0019]
As shown in FIG. 3, the simulation curve of the impurity distribution drawn based on the theoretical calculation result almost coincides with the actual analysis value, and the temperature of the semiconductor wafer is grasped based on such a simulation result. The effectiveness of doing is understood. As shown in this figure, the impurity distribution varies depending on the processing temperature, so if simulation data at various heat treatment temperatures is input, the analysis results after heat treatment can be compared with these simulation data. Thus, the temperature of the semiconductor wafer during the heat treatment can be specified.
[0020]
In this way, curve fitting is performed based on high-precision simulation data, and the temperature is grasped based on the state of the semiconductor wafer itself, which is the impurity distribution of the semiconductor wafer. Compared to conventional indirect temperature measurement. Thus, temperature measurement with extremely high accuracy can be performed.
[0021]
Further, as is apparent from FIG. 3, the impurity distribution differs depending not only on the heat treatment temperature but also on other heat treatment conditions such as the holding time. Therefore, by inputting the simulation results of the impurity distribution when various heat histories are added, it is possible to grasp not only the heat treatment temperature when performing heat treatment on the semiconductor wafer but also the heat history. is there.
[0022]
On the contrary, when the heating rate other than the heat treatment temperature, the holding time, etc. are constant, instead of measuring the impurity distribution as described above, the impurity amount at a predetermined depth of the wafer is measured, and the heat treatment temperature and the predetermined depth are measured. If the comparison is made with the simulation data of the relationship with the impurity amount, the substrate temperature can be grasped more easily.
[0023]
The temperature of the semiconductor wafer can be grasped by the procedure as described above. However, when the temperature distribution in the semiconductor wafer surface is grasped, the impurity distribution in the depth direction and the measurement of the impurity amount at the predetermined depth are measured. It is only necessary to measure at a plurality of positions and compare it with simulation data. Thereby, the temperature distribution in the wafer surface can be grasped with high accuracy.
[0024]
The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, the temperature measurement of the semiconductor wafer has been described in the above embodiment, but the present invention is not limited to this, and any substrate can be used as long as impurity diffusion is assumed. The target heat treatment is not limited to the above-described annealing, and can be applied to a process involving other various heats.
[0025]
【The invention's effect】
As described above, according to the present invention, the impurity distribution in the depth direction of the substrate when a predetermined heat treatment is performed on the substrate in which the impurity is present is measured, and the measurement result is expressed as a temperature based on the calculation result. Compared with the relationship with the impurity distribution, the substrate temperature at the time of heat treatment is grasped, so the substrate temperature can be grasped directly based on the actual substrate state, and the substrate temperature is measured with extremely high accuracy. be able to. In addition, when the heating rate and holding time are constant, instead of measuring the impurity distribution, the amount of impurities at a predetermined depth of the substrate is measured, and the relationship between the temperature based on the calculation result and the amount of impurities at the predetermined depth is In comparison, the substrate temperature can be grasped more easily. Furthermore, by measuring the impurity distribution in the depth direction of the substrate and the amount of impurities at a predetermined depth at multiple positions in the substrate surface and comparing these with the calculation results, the temperature distribution in the substrate surface can be accurately measured. Can be grasped.
[Brief description of the drawings]
FIG. 1 is a process diagram showing an embodiment of the method of the present invention.
FIG. 2 is a cross-sectional view showing an example of an apparatus for performing a heat treatment to which the present invention is applied.
FIG. 3 is a diagram showing a comparison between a simulation curve of impurity distribution of a silicon wafer based on theoretical calculation results and a curve of impurity distribution actually obtained by secondary ion mass spectrometry.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1; Chamber 2; Quartz window 3; Heat generating part 4; Water cooling jacket 5; Tungsten lamp 6; Platen 7; Wafer support pin S;

Claims (5)

不純物を存在させた基板に所定の熱処理を施した際における基板の深さ方向の不純物分布を測定する工程と、
熱処理温度と保持時間を含む熱処理条件が異なる複数の場合について、基板の深さ方向の不純物分布を理論に基づいて計算する工程と、
理論計算で求めた不純物の複数の分布の中から、前記測定による不純物分布に一致する分布を選択する工程を含み、
選択された理論不純物分布の計算に基づいて、熱処理の際の基板温度と時間との関係である熱履歴を把握することを特徴とする基板温度の測定方法。
Measuring the impurity distribution in the depth direction of the substrate when a predetermined heat treatment is performed on the substrate in which the impurities are present ; and
For a plurality of cases where the heat treatment conditions including the heat treatment temperature and the holding time are different, the step of calculating the impurity distribution in the depth direction of the substrate based on the theory,
Selecting a distribution that matches the impurity distribution obtained by the measurement from a plurality of distributions of impurities determined by theoretical calculation;
A substrate temperature measurement method characterized by grasping a thermal history which is a relation between a substrate temperature and a time during heat treatment based on calculation of a selected theoretical impurity distribution .
不純物を存在させた基板に所定の熱処理を施した際における基板の深さ方向の不純物分布を基板面内の複数箇所で測定する工程と、
熱処理温度と保持時間を含む熱処理条件が異なる複数の場合について、基板の深さ方向の不純物分布を理論に基づいて計算する工程と、
理論計算で求めた不純物の複数の分布の中から、前記測定による不純物分布に一致する分布を選択する工程を含み、
選択された理論不純物分布の計算に基づいて、熱処理の際の基板面内の複数箇所における基板温度と時間との関係である熱履歴を把握することを特徴とする基板温度の測定方法。
A step of measuring the impurity distribution in the depth direction of the substrate when a predetermined heat treatment is performed on the substrate in which the impurities are present at a plurality of locations in the substrate surface ;
For a plurality of cases where the heat treatment conditions including the heat treatment temperature and the holding time are different, the step of calculating the impurity distribution in the depth direction of the substrate based on the theory,
Selecting a distribution that matches the impurity distribution obtained by the measurement from a plurality of distributions of impurities determined by theoretical calculation;
A method for measuring a substrate temperature, characterized in that a thermal history that is a relationship between a substrate temperature and time at a plurality of locations in a substrate surface during heat treatment is grasped based on a calculation of a selected theoretical impurity distribution .
熱処理温度以外の昇温速度、保持時間が一定の場合に、
不純物を存在させた基板に所定の熱処理を施した際における基板の所定深さの不純物量を測定し、その測定結果を、理論に基づく計算で得られた前記保持時間内の基板温度と所定深さの不純物量との関係と比較し、熱処理の際の前記保持時間内の基板温度を把握することを特徴とする基板温度の測定方法。
When the heating rate and holding time other than the heat treatment temperature are constant,
The amount of impurities at a predetermined depth of the substrate when a predetermined heat treatment is performed on the substrate in which impurities are present is measured, and the measurement result is obtained by calculating the substrate temperature and the predetermined depth within the holding time obtained by calculation based on theory. A substrate temperature measurement method characterized in that the substrate temperature within the holding time during heat treatment is ascertained in comparison with the relationship with the amount of impurities.
熱処理温度以外の昇温速度、保持時間が一定の場合に、
不純物を存在させた基板に所定の熱処理を施した際における基板の所定深さの不純物量を基板面内の複数箇所で測定し、それらの測定結果を、理論に基づく計算で得られた前記保持時間内の基板温度と所定深さの不純物量との関係と比較し、熱処理の際の前記保持時間内の基板面内の温度分布を把握することを特徴とする基板温度の測定方法。
When the heating rate and holding time other than the heat treatment temperature are constant,
The amount of impurities at a predetermined depth of the substrate when a predetermined heat treatment is performed on the substrate in which impurities are present is measured at a plurality of locations in the substrate surface, and the measurement results are obtained by calculation based on theory. A method for measuring a substrate temperature, characterized in that the temperature distribution in the substrate surface within the holding time during the heat treatment is grasped by comparing the relationship between the substrate temperature within the time and the amount of impurities at a predetermined depth.
前記不純物は熱処理前に基板の表面部分にドープされていることを特徴とする請求項1ないし請求項4のいずれか1項に記載の基板温度の測定方法。  5. The substrate temperature measuring method according to claim 1, wherein the impurity is doped in a surface portion of the substrate before the heat treatment.
JP19370698A 1998-06-24 1998-06-24 Substrate temperature measurement method Expired - Fee Related JP4208995B2 (en)

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