JP4207840B2 - Image forming apparatus - Google Patents

Description

  The present invention relates to an image forming apparatus such as a copying machine or a printer, and more particularly to an image forming apparatus that forcibly discharges electric charge accumulated in a voltage drop electrolytic capacitor when the power is turned off.

  The image forming apparatus incorporates a DC power source that outputs two direct currents, for example, DC 5 V and DC 24 V. Usually, DC5V is supplied to a logic unit or the like of a control system, and DC24V is supplied to a large current consumption unit of a drive system such as a motor. The logic part of the control system to which DC5V is supplied has a small load fluctuation, and the drive system to which DC24V is supplied has a large load fluctuation because of many motors and the like. For this reason, the electrolytic capacitor for preventing voltage drop of the DC24V system has a larger capacitance than the DC5V system.

  For this reason, when the power switch is turned off, the DC output of the two systems, DC5V and DC24V, is stopped, but the discharge of the DC24V electrolytic capacitor is larger than that of the DC5V electrolytic capacitor because the capacitance of the DC24V electrolytic capacitor is large. Delay. This residual charge is applied to the drive system, but in this case, it is in an uncontrolled state. In order to prevent the drive system from operating in this uncontrolled state, the input section of the driver of the drive system is fixed to a logic state where the drive system does not operate. Also, the DC24V power line of the drive system is grounded by a relay or the like to discharge the residual charge of the electrolytic capacitor. Furthermore, the residual electric charge of the electrolytic capacitor is discharged by forcibly operating an electric load such as a motor or the like, which is less likely to cause an electric shock, or by operating an electric load unnecessary for operation (for example, patents). Reference 1).

JP-A-9-297507 (paragraphs [0016]-[0024])

  However, in the conventional image forming apparatus, when the power switch is turned off, the discharge of the DC 24V electrolytic capacitor is delayed from the DC 5V electrolytic capacitor, and this residual charge is applied to the drive system. There is a danger.

  Further, when the power supply line of DC 24V of the driving system is grounded by a relay or the like to discharge the residual charge of the electrolytic capacitor, expensive additional parts such as a relay are required, which increases the cost of the image forming apparatus. Furthermore, it is necessary to drive even an electrical load that does not need to be operated. In addition, since forced discharge is controlled, there is a problem that the effect of forced discharge cannot be obtained in an uncontrolled state.

  SUMMARY OF THE INVENTION The present invention solves the above-described problem. Even when the main power supply of an image forming apparatus is turned off (OFF) and the control system is stopped, the large-capacity electrolytic capacitor remains in an uncontrolled state quickly and reliably. The purpose is to discharge the residual charges. An object of the present invention is to provide an image forming apparatus capable of preventing a malfunction of a load and an electric shock by reliably and rapidly discharging a residual charge. It is another object of the present invention to achieve the above-described effect without using expensive parts and to reduce the cost of the image forming apparatus.

  In addition, the image forming apparatus has an interlock mechanism that opens (turns off) the power supply line to the drive system when the cover, door, etc. are opened to ensure safety, and prevents the energization and stops the drive. Is provided. According to the present invention, even when the power supply line to the drive system is interrupted by the interlock mechanism, it is possible to prevent a steep discharge from occurring and to prevent a malfunction of the control system due to a steep current fluctuation. An object is to provide an image forming apparatus.

  The invention according to claim 1 is an image forming process unit that forms an output image by performing image processing on input image data, a control unit that controls an operation of the image forming process unit, and the image forming process unit. An image forming apparatus having a first power source for supplying a voltage to the control unit and a second power source for supplying a voltage to the control unit, wherein one end is connected to the first power source and the other end is grounded. A first resistor having one end connected to the one end of the capacitor, a second resistor having one end connected to the one end of the capacitor and the one end of the first resistor, and the first resistor Connected to the first resistor and the second resistor, and connected to the first semiconductor switch for turning on / off between the first resistor and the ground, the second power source and the second resistor, On / between second resistor and ground And when the voltage supply by the first power source is cut off, the second semiconductor switch is turned on by the voltage of the second power source to discharge the capacitor. When the voltage supply by the first power source is cut off and the voltage supply of the second power source is cut off, the first semiconductor switch is turned on with the voltage charged in the capacitor, and the capacitor Is an image forming apparatus.

  For example, a DC 24V that supplies a voltage to a drive system such as a motor is used as the first power source, and a DC 5V that supplies a voltage to a control system such as a CPU is used as the second power source. Since the capacitor is connected to the first power source composed of DC 24V, electric charges are accumulated in the capacitor. This capacitor is provided to operate the electrical load of the drive system using the accumulated charges in preparation for resuming the operation of the image forming apparatus when the first power source composed of 24 VDC is shut off. Yes.

  When the first power source composed of DC 24V is cut off, the second semiconductor switch is turned on by the second power source composed of DC 5V. Since one end of the capacitor is connected to the second semiconductor switch via the second resistor, the electric charge accumulated in the capacitor flows to the ground by the second semiconductor switch. In this way, the electric charge accumulated in the capacitor is consumed, and the capacitor is discharged.

  Further, when the main power supply of the image forming apparatus is cut off and the second power supply of DC 5V is also cut off, the second semiconductor switch is turned off, and the capacitor is not discharged by the second semiconductor switch.

  When the main power supply of the image forming apparatus is cut off and the second power supply is cut off, the first semiconductor switch is turned on by the electric charge accumulated in the capacitor. Since one end of the capacitor is connected to the first semiconductor switch via the first resistor, the electric charge accumulated in the capacitor flows to the ground by the first semiconductor switch. Thus, even when the second power supply is shut off and the control system is stopped, the electric charge accumulated in the capacitor is consumed and the capacitor is discharged.

  According to a second aspect of the present invention, there is provided an image forming process unit that forms an output image by performing image processing on input image data, a control unit that controls the operation of the image forming process unit, and the image forming process unit. An image forming apparatus having a first power source for supplying a voltage to the control unit and a second power source for supplying a voltage to the control unit, wherein one end is connected to the first power source and the other end is grounded. When the door of the image forming apparatus is opened, the voltage supply from the first power source to the image forming process unit is cut off when the door is opened between the capacitor and the first power source and the capacitor. An interlock mechanism; a first resistor having one end connected to the one end of the capacitor; a second resistor having one end connected to the one end of the capacitor and the one end of the first resistor; 1 resistance and the first A first semiconductor switch that is turned on / off between the first resistor and the ground, and is connected to the second power source and the second resistor, and the second resistor and the ground. And when the first power supply is shut off by the interlock mechanism, the second semiconductor switch is turned on by the voltage of the second power supply. When the first power supply is cut off by the interlock mechanism, and when the second power supply is cut off, the first semiconductor is turned on by the voltage charged in the capacitor. An image forming apparatus characterized in that the capacitor is discharged by turning on a switch.

  A third aspect of the present invention is the image forming apparatus according to the first or second aspect, wherein the collector of the first semiconductor switch is connected to the other end of the first resistor. The second semiconductor switch has a base connected to the other end of the second resistor and an emitter grounded, and the collector of the second semiconductor switch includes the other end of the second resistor and the first resistor. The second transistor is connected to the base of the transistor, the base is connected to the second power source, and the emitter is grounded.

  As described above, since the capacitor is connected to the first power source composed of DC 24V, electric charges are accumulated in the capacitor. Then, when the first power source composed of DC 24V is cut off, the base current is supplied to the second transistor by the second power source composed of DC 5V, and the second transistor is turned on. Since one end of the capacitor is connected to the collector of the second transistor, the charge accumulated in the capacitor flows from the collector of the second transistor to the grounded base. In this way, the electric charge accumulated in the capacitor is consumed, and the capacitor is discharged.

  Further, when the main power supply of the image forming apparatus is cut off and the second power supply consisting of DC5V is also cut off, no current is supplied to the base of the second transistor, so the second transistor is turned off, and the second transistor Does not discharge the capacitor.

  When the main power supply of the image forming apparatus is cut off and the second power supply is also cut off, the base current is supplied to the first transistor by the charge accumulated in the capacitor, and the capacitor is automatically discharged. Is called. That is, since one end of the capacitor is connected to the base of the first transistor, the electric charge accumulated in the capacitor flows as the base current of the first transistor, and the first transistor is turned on. Further, since one end of the capacitor is also connected to the collector of the first transistor, the electric charge accumulated in the capacitor flows from the collector of the first transistor to the grounded base. Thus, even when the second power supply is shut off and the control system is stopped, the electric charge accumulated in the capacitor is consumed and the capacitor is discharged. In this case, since the discharge is performed using the charge accumulated in the capacitor itself, the discharge is surely performed until the charge capable of supplying the base current to the first transistor is consumed.

  According to a fourth aspect of the present invention, there is provided the image forming apparatus according to any one of the first to third aspects, wherein the voltage monitoring unit that monitors the voltage supply of the second power supply, and the voltage monitoring unit And a power output stop means for cutting off the output of the first power supply when no voltage is supplied based on the monitoring result.

  When the first power source and the second power source are shut off by shutting off the main power source of the image forming apparatus, as described above, discharging is performed by the first transistor (first semiconductor switch). . However, when only the second power source is shut off due to some abnormality and the first power source is not shut off, current is always supplied, so that a state in which discharge is always performed through the first resistor is achieved. Become. In such a state, heat due to current consumption is constantly generated in the first resistor, and a load is imposed on the first resistor.

  According to the present invention, when the second power source is shut off while the first power source is not shut off, the output of the first power source is stopped by monitoring the shut-off. That is, the voltage supply from the second power source to the second transistor (second semiconductor switch) is monitored, and it is determined whether or not the voltage is supplied based on the monitoring result. Based on the determination, the power supply output stopping means stops the output of the first power supply. When it is determined that a voltage is supplied from the second power source to the second transistor (second semiconductor switch), the first power source is not shut off and the voltage supply is continued. On the other hand, when it is determined that no voltage is supplied from the second power source to the second transistor (second semiconductor switch), the output of the first power source is stopped. As described above, by controlling the output of the first power supply in accordance with the state of voltage supply by the second power supply, current consumption in the first resistor can be suppressed.

  A fifth aspect of the present invention is the image forming apparatus according to any one of the first to fourth aspects, wherein the resistance value of the first resistor is smaller than the resistance value of the second resistor. It is characterized by this.

  When the main power supply of the image forming apparatus is turned on and the first power supply and the second power supply are turned on, or when only the first power supply is shut off and the second power supply is turned on, 2 transistor is turned on. When the second transistor is turned on, a current flows from the collector to the emitter of the second transistor, and the capacitor is always discharged.

  In this state, the value of the current flowing from the collector to the emitter can be reduced by increasing the resistance value of the second resistor. That is, only the first power source that supplies the voltage to the drive system is shut off, the second power source that supplies the voltage to the control system is turned on, and the electrical charge of the drive system or the like is generated using the electric charge accumulated in the capacitor When the load is operated to prepare for the resumption of operation of the image forming apparatus, it is necessary to avoid discharging as much as possible in preparation for the resumption of operation. As in the present invention, by increasing the resistance value of the second resistor, the current flowing through the second resistor can be reduced, and current consumption can be suppressed in preparation for resumption of operation.

  On the other hand, when the main power supply of the image forming apparatus is turned off and the first power supply and the second power supply are turned off, it is necessary to quickly discharge the capacitor in order to prevent electric shock and malfunction. As in the present invention, by reducing the resistance value of the first resistor, the discharge through the first resistor and the first transistor can be performed quickly.

  According to the first aspect of the present invention, even when the second power supply is shut off and the control system is stopped, the capacitor is discharged by turning on the first semiconductor switch by the charge charged in the capacitor. Can be performed automatically, and it is possible to prevent electric shock and malfunction of the load.

  According to the second aspect of the present invention, even when only the first power source is shut off by the interlock mechanism and the second power source is not shut off, the electric charge accumulated in the capacitor can be surely discharged. No steep current fluctuation occurs. As a result, it is possible to prevent malfunction of the control unit.

  According to the third aspect of the present invention, even when the second power supply is shut off, the capacitor is automatically discharged by turning on the first transistor by the electric charge charged in the capacitor. Can do. Since the discharge is performed using the residual charge of the capacitor itself to be discharged, the discharge can be reliably performed until the residual charge that can supply the base current to the transistor is consumed. As a result, it is possible to reduce the residual charge to a level at which there is no possibility of electric shock or driving load being operated. Further, the discharge circuit provided in the image forming apparatus of the present invention does not use expensive components such as a relay, and is composed of a transistor and a resistor. Therefore, the capacitor can be reliably discharged with an inexpensive circuit, and the cost of the image forming apparatus can be reduced.

  According to the fourth aspect of the present invention, the monitoring means for monitoring the second power source is provided, and when the second power source is shut off, the first power source is shut off, so that the first power source is switched to the first power source. It is possible to prevent current from being constantly consumed through the resistor. As a result, it is possible to prevent a burden on the first resistor.

  According to the fifth aspect of the present invention, the capacitor can be discharged quickly by reducing the resistance value of the first resistor. The resistance value of the first resistor may be selected in consideration of the rated power of the resistor and the rated current of the transistor from the cost, specifications required for the device, and the like. On the other hand, current consumption can be suppressed by increasing the resistance value of the second resistor. When the electric load is operated using the electric charge stored in the capacitor, it is necessary to avoid discharging as much as possible in preparation for resuming the operation of the image forming apparatus. When the resistance value of the second resistor is increased, the value of the current flowing through the second resistor can be decreased, so that current consumption can be suppressed. Note that the resistance value of the second resistor may be selected so that a base current necessary for turning on the first transistor flows in the first transistor.

[First Embodiment]
Hereinafter, an image forming apparatus according to a first embodiment of the present invention will be described with reference to FIGS.

  First, the configuration of the image forming apparatus according to the first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing a schematic configuration of an image forming apparatus according to the first embodiment of the present invention. As shown in FIG. 1, the image forming apparatus 10 includes a DC power source 20, a control unit 30, a driving unit 40, and an image forming process unit 50.

  The DC power source 20 includes a power source V1 and a power source V2, and is connected to an external AC power source (not shown). The power source V1 outputs DC 24V and supplies a voltage to the driving unit 40 and the image forming process unit 50 of the image forming apparatus 10. The power supply V2 outputs DC5V and supplies a voltage to the control unit 30. The power source V1 corresponds to the “first power source” of the present invention, and the power source V2 corresponds to the “second power source” of the present invention.

  The control unit 30 is equipped with a CPU and controls the entire image forming apparatus 10 such as the drive unit 40 and the image forming process unit 50. The control unit 30 is connected to the DC power supply 20 and receives a voltage of DC5V from the power supply V2.

  The drive unit 40 includes a discharge circuit 1, a large-capacity electrolytic capacitor C for preventing voltage drop, and drive circuits 41 a to 41 c that drive each unit in the image forming apparatus 10. The discharge circuit 1 is connected to the DC power supply 20 through the overcurrent protection element 42 and receives a voltage of DC5V from the power supply V2. Further, the discharge circuit 1 is connected to a DC power source 20 through a diode D and a resistor R4, and receives a voltage of 24V DC from the power source V1. The electrolytic capacitor C has one end connected to the discharge circuit 1 and the resistor R4, and the other end grounded. The drive circuits 41a to 41c are connected to each unit installed in the image forming process unit 50 and drive them. The discharge circuit 1 is a feature of the present invention, and the configuration and operation of the discharge circuit 1 will be described in detail later.

  The image forming process unit 50 includes an image reading unit 51, an image forming unit 52, and an output unit 53, which are connected by a bus.

  The image reading unit 51 includes a scanner below the contact glass on which the document is placed, and reads the image data of the document. The scanner is composed of a light source, a lens, a CCD (Charge Coupled Device), and the like, and reads a document image by forming an image of reflected light of light that has been illuminated from the light source to the document and performing photoelectric conversion. Then, the read image data is output to the image forming unit 52. The image data includes not only image data such as graphics and photographs but also text data such as characters and symbols.

  The image forming unit 52 performs enlargement / reduction, rotation, and position conversion on the image data input from the image reading unit 51 in accordance with a signal input from the control unit 30. In the image correction processing, the image data input from the image reading unit 51 is subjected to image processing such as density conversion processing, color correction processing, density gradient correction processing, gradation characteristic correction processing, halftone processing, and the like. The output data is output to the output unit 53.

  The output unit 53 includes an image output unit, a paper feed cassette, a paper feed unit, a toner, a transfer unit, a fixing device, a paper discharge unit, and the like. The paper feed unit includes a feed roller, a paper feed roller, a transport roller, and a registration roller. The transfer unit includes an intermediate transfer belt, a primary transfer roller, and a secondary transfer roller. The paper discharge unit includes a paper discharge roller and a paper discharge tray.

  The image output unit includes a drum-shaped charge holding member (photosensitive drum) as an image forming member, a charging unit disposed around the photosensitive drum, an exposure unit, a developing device, and an image forming unit cleaning unit. . The development by the developing device is performed by a reversal phenomenon in which a development bias in which an AC voltage is superimposed on a DC voltage having the same polarity as the toner polarity to be used is applied.

  In accordance with an output instruction from the control unit 30, the output unit 53 exposes the electrostatic latent image of the image data onto the photosensitive drum, and adsorbs toner to the electrostatic latent image to form a toner image. The output unit 53 prints the toner image on a recording sheet.

  The image forming apparatus 10 includes an input unit, a display unit, a RAM, and a storage unit (not shown). The input unit includes a keyboard having cursor keys, numeric input keys, various function keys, and the like, and outputs a pressing signal corresponding to the key pressed on the keyboard to the control unit 30. The input unit may be provided integrally with a display unit such as a touch panel as necessary, or may include other input devices.

  The display unit includes a liquid crystal display, an EL display, and the like, and displays image data, text data, and the like on the screen in accordance with an instruction of a display signal input from the control unit 30.

  The RAM forms a temporary storage area for programs, input or output data, parameters, and the like read from the storage unit in various processes executed and controlled by the control unit 30. The storage unit is configured by a non-volatile memory or the like, and stores various programs that can be executed by the image forming apparatus and setting contents according to functions.

  The printing operation of the image forming apparatus 10 is performed through processes such as exposure, development, transfer, and fixing. Specifically, each color image formed by the image output unit is sequentially transferred onto a rotating intermediate transfer belt by a primary transfer roller to which a primary transfer bias having a polarity opposite to that of the toner to be used is applied. (Primary transfer) and a combined color image (color toner image) is formed. The recording paper stored in the paper feeding cassette is fed by a feed roller and a paper feeding roller provided in the paper feeding cassette, and is conveyed to a secondary transfer roller as a secondary transfer means through a conveyance roller and a registration roller. Then, the color images are collectively transferred to one surface on the recording means (secondary transfer).

  The recording paper on which the color image has been transferred is fixed by a fixing device, is sandwiched between paper discharge rollers, and is placed on a paper discharge tray outside the apparatus. The untransferred toner remaining on the peripheral surface of the photosensitive drum after the transfer is cleaned by the image forming body cleaning unit and enters the next image forming cycle.

  Next, the configuration of the discharge circuit 1 provided in the image forming apparatus 10 according to the first embodiment of the present invention will be described with reference to FIG. FIG. 2 is a circuit diagram of a discharge circuit provided in the image forming apparatus according to the first embodiment of the present invention.

  As shown in FIG. 2, one end of a resistor R4 is connected to a power source V1 that supplies 24V DC to the drive unit 40 and the image forming process unit 50 through a diode D, and the other end of the electrolytic capacitor C is connected to the other end of the resistor R4. One end is connected. The other end of the electrolytic capacitor C is grounded.

  Furthermore, one end of the electrolytic capacitor C is connected to one end of the resistor R1 and one end of the resistor R2 in the discharge circuit 1. The other end of the resistor R1 is connected to the collector of the npn transistor Q1, and the other end of the resistor R2 is connected to the base of the npn transistor Q1 via the resistor R7. The emitter of the npn transistor Q1 is grounded. A resistor R5 is connected between the base and the emitter.

  The other end of the resistor R2 is connected to the collector of the npn transistor Q2. The emitter of the npn transistor Q2 is grounded, and the base is connected to one end of a resistor R3 serving as a pull-up resistor via a resistor R8. The resistor R3 is connected to the power source V2. A resistor R6 is connected between the base and the emitter.

(Operation)
The operation of the discharge circuit having the above configuration will be described with reference to FIGS. 3 and 4 are circuit diagrams for explaining the operation of the discharge circuit according to the present embodiment.

  First, the operation when the line of the power source V2 is not interrupted will be described with reference to FIG. When the power supply V1 is turned on by turning on the main power supply of the image forming apparatus 10, electric charges are accumulated in the electrolytic capacitor C. In this state, when the line of the power supply V1 is cut off, the base current flows through the npn transistor Q2 (arrow A) because the power supply V2 is turned on, and the npn transistor Q2 is turned on. When npn transistor Q2 is turned on, the electric charge accumulated in electrolytic capacitor C is discharged, and a current flows from the collector of npn transistor Q2 to the emitter via resistor R2 (arrow B). A current flows from the emitter to the ground (arrow C), and the residual charge accumulated in the electrolytic capacitor C is consumed.

  Next, an operation when the lines of the power supply V1 and the power supply V2 are cut off will be described with reference to FIG. When the main power supply of the image forming apparatus 10 is turned off, the power supply V1 line and the power supply V2 line are turned off. When the line of the power supply V2 is turned off, no base current flows through the npn transistor Q2, and the npn transistor Q2 is turned off. In this state, a base current flows to npn transistor Q1 via resistor R2 (arrow D), and npn transistor Q1 is turned on. When npn transistor Q1 is turned on, current flows from the collector to the emitter of npn transistor Q1 via resistor R1 (arrow E). A current flows from the emitter to the ground (arrow F), and the residual charge charged in the electrolytic capacitor C is consumed.

  As described above, the npn transistor Q1 can be turned on by the electric charge charged in the electrolytic capacitor C even when the power supply V2 is shut off and the control unit 30 is stopped. Can be performed automatically. As a result, the residual charge of the electrolytic capacitor C can be consumed reliably, and it is possible to prevent electric shock and malfunction of the load in the image forming apparatus 10. Further, since the discharge circuit 1 according to the present embodiment is composed of a transistor and a resistor, the cost of the discharge circuit 1 can be reduced. As a result, the image forming apparatus 10 including the discharge circuit 1 can be reduced in cost. Cost can be reduced.

  Further, when the power source V2 is shut off and the electric charge is discharged through the resistor R1 as when the main power source of the image forming apparatus 10 is turned off, the discharge is accelerated by reducing the resistance value of the resistor R1. be able to. The resistance value of the resistor R1 may be selected from the required specifications of the image forming apparatus in consideration of the rated power of the resistor and the rated current of the transistor.

  On the other hand, in the case where only the power source V1 is cut off and the electric charge is discharged through the resistor R2, increasing the resistance value of the resistor R2 can decrease the value of the current flowing through the resistor R2, and the resistor R2 It becomes possible to suppress current consumption due to. Note that the resistance value of the resistor R2 may be selected in consideration of the base current necessary for turning on the npn transistor Q1, the operation time, and the like.

  When the load in the image forming apparatus is operated using the electric charge accumulated in the electrolytic capacitor C, it is necessary to avoid discharging as much as possible in preparation for resuming the operation of the apparatus. In that case, the discharge of the electrolytic capacitor C can be delayed by increasing the resistance value of the resistor R2. Further, the larger the capacity of the electrolytic capacitor C, the more the load in the image forming apparatus can be operated until the operation of the apparatus is resumed.

  Further, an interlock mechanism may be provided in the image forming apparatus according to the present embodiment. The image forming apparatus will be described with reference to FIG. FIG. 5 shows an image forming apparatus according to another embodiment of the present invention. As shown in the figure, the interlock mechanism 60 is installed between the power source V <b> 1 and the drive unit 40. The operation of the discharge circuit 1 when this interlock mechanism 60 is provided will be described with reference to the circuit diagram of FIG.

  As shown in the circuit diagram of FIG. 6, an interlock mechanism 60 is installed between the power supply V1 and the resistor R4. When the cover or door of the image forming apparatus 10 is opened, the interlock mechanism 60 cuts off the power supply line to the drive unit 60 to ensure safety and stops energization to stop driving. Is.

  When the door of the image forming apparatus 10 is opened and only the line of the power supply V1 is cut off by the interlock mechanism 60, the base current is supplied to the base of the npn transistor Q2 by the power supply V2 that is not cut off. By supplying the base current, the npn transistor Q2 is turned on, and the electric charge accumulated in the electrolytic capacitor C flows into the collector of the npn transistor Q2 via the resistor R2, and the electrolytic capacitor C is discharged.

  As described above, even when the line of the power source V1 is cut off by the interlock mechanism 60, the electric charge accumulated in the electrolytic capacitor C can be automatically discharged, so that a steep current fluctuation is suppressed. Therefore, it is possible to prevent the control unit 30 from malfunctioning.

  When the power supply V2 line is turned off, a base current flows through the npn transistor Q1 via the resistor R2, and the npn transistor Q1 is turned on. When the npn transistor Q1 is turned on, the electric charge accumulated in the electrolytic capacitor C flows into the collector of the npn transistor Q1 via the resistor R1, and the electrolytic capacitor C is discharged.

  Note that current consumption by the resistor R2 can be suppressed by reducing the resistance value of the resistor R2. When the cover or door of the image forming apparatus 10 is opened, if only the power source V1 is cut off and the power source V2 is turned on by the interlock mechanism 60, the electrolytic capacitor C is prepared in preparation for the resumption of the operation of the image forming apparatus 10. Can be suppressed as much as possible. Further, by reducing the resistance value of the resistor R1, when the main power supply of the image forming apparatus 10 is turned off, the electrolytic capacitor C can be discharged quickly.

[Second Embodiment]
Next, an image forming measure according to a second embodiment of the present invention will be described with reference to FIGS. FIG. 7 is a block diagram illustrating a schematic configuration of an image forming apparatus according to the second embodiment. FIG. 8 is a flowchart for explaining the operation of the image forming apparatus according to the second embodiment. The image forming apparatus according to the second embodiment performs control to shut off the power source V1 when only the power source V2 is shut off due to some abnormality and the power source V1 is not shut off.

(Constitution)
The configuration of the image forming apparatus 70 according to the present embodiment is substantially the same as the configuration of the image forming apparatus 10 according to the first embodiment, except that it has means for shutting off the power supply V1. . As shown in FIG. 7, voltage monitoring means 71 for monitoring the voltage supply from the power supply V2 to the discharge circuit 1 is installed on the line between the power supply V2 and the discharge circuit 1. This voltage monitoring means 71 monitors the interruption of the power supply V2 line. Further, the voltage monitoring unit 71 is connected to the control unit 30 and outputs a monitoring result to the control unit 30. The control unit 30 is provided with a determination unit 72 that receives the result of monitoring by the voltage monitoring unit 71 and determines whether or not the voltage V2 line is cut off. Furthermore, the DC power supply 20 is provided with a power supply output stopping unit 73 that receives the determination result of the determination unit 72 and stops the output of the power supply V1.

  In the present embodiment, the voltage monitoring means 71 is composed of an npn transistor Q3. The npn transistor Q3 has a base connected to the line of the power supply V2, a collector connected to the control unit 30, and an emitter grounded. When the line of the power supply V2 is cut off and the voltage supply from the power supply V2 to the discharge circuit 1 is cut off, no base current is supplied to the base, and the npn transistor Q3 is turned off. As a result, the voltage at the determination means 72 connected to the collector increases.

  On the other hand, when the power supply V2 is not shut off, the voltage is supplied from the power supply V2 to the discharge circuit 1, so that the base current is supplied to the base and the npn transistor Q3 is turned on. As a result, the voltage at the judging means 72 is lowered.

  The judging means 72 judges whether or not the power source V2 is cut off based on this voltage level, and outputs the judgment result to the power output stop means 73. If the voltage in the determination means 72 is high, it is determined that the power supply V2 is cut off. If the voltage is low, it is determined that the voltage is normally supplied from the power supply V2 to the discharge circuit 1.

(Operation)
Next, the operation of the image forming apparatus having the above configuration will be described with reference to the flowchart of FIG. First, the voltage monitoring means 71 monitors the line of the power source V2 (step S01). When the power supply V2 line is cut off and the voltage supply from the power supply V2 to the discharge circuit 1 is cut off, no base current is supplied to the base of the npn transistor Q3 of the voltage monitoring means 71, and the npn transistor Q3 is turned off. Become. As a result, the voltage at the determination means 72 connected to the collector increases. On the other hand, when the line of the power supply V2 is not cut off, the base current is supplied to the base of the npn transistor Q3, and the npn transistor Q3 is turned on. As a result, the voltage at the judging means 72 is lowered.

  Determination means 72 determines whether or not power supply V2 is shut off based on the voltage level (step S02). When the voltage level is high, the determination unit 72 determines that the power supply V2 line is cut off (Yes in step S03), and outputs the determination result to the power supply output stop unit 73. Then, the power output stop means 73 receives the determination result and stops the output of the power supply V1 (step S04). For example, the supply of voltage from an external AC power supply is cut off, or the supply of voltage from the power supply V1 to the discharge circuit 1 is cut off. The interruption of the voltage supply of the power supply V1 may be performed by software or hardware. In the case of software control, the control unit 30 outputs a signal corresponding to the output stop command to the power supply V1. The power supply V1 receives the signal and stops the output of voltage supply. On the other hand, in the case of hardware control, the voltage supply line of the power supply V1 is physically cut off, and the voltage supply from the power supply V1 to the drive unit 40 and the discharge circuit 1 is stopped.

  On the other hand, when the voltage level is low, the determination unit 72 determines that the power supply V2 line is not interrupted (No in step S03). The determination unit 72 outputs the determination result to the power output stop unit 73. The power supply output stopping means 73 does not stop the output of the power supply V1 according to the determination result. Subsequently, the voltage monitoring unit 71 monitors the interruption of the power supply V2 line, and the determination unit 72 determines the monitoring result (step S02).

  As described above, by monitoring the interruption of the power supply V2 line, it is possible to stop the output of the power supply V1 even when the power supply V2 line is interrupted due to some abnormality without being interrupted by the power supply V1. It becomes. When the voltage monitoring means 71 and the power supply output stopping means 73 are not provided and only the power supply V2 line is cut off, the electrolytic capacitor C is continuously discharged via the resistor R1. Since the power source V1 is not shut off, the discharge is continuously performed, heat is continuously generated in the resistor R1, and a load is applied to the resistor R1. In the present embodiment, when the power source V2 is shut off, the output from the power source V1 is forcibly shut off, so that the generation of heat due to the current supplied from the power source V1 can be suppressed.

  In the image forming apparatus 70 according to the present embodiment, the interlock mechanism 60 may be provided in the same manner as the image forming apparatus 10 according to the first embodiment. Further, if the resistance value of the resistor R1 is reduced as in the first embodiment, the value of the current flowing between the collector and emitter of the npn transistor Q1 is increased, and the electrolytic capacitor C can be discharged quickly. . Also, if the resistance value of the resistor R2 is increased, the power consumed by the resistor R2 can be kept low.

1 is a block diagram illustrating a schematic configuration of an image forming apparatus according to a first embodiment of the present invention. 1 is a circuit diagram of a discharge circuit provided in an image forming apparatus according to a first embodiment of the present invention. It is a circuit diagram for demonstrating operation | movement of the discharge circuit which concerns on 1st Embodiment of this invention. It is a circuit diagram for demonstrating operation | movement of the discharge circuit which concerns on 1st Embodiment of this invention. It is a block diagram which shows schematic structure of the image forming apparatus which concerns on another embodiment of this invention. It is a circuit diagram for demonstrating operation | movement of the discharge circuit which concerns on another embodiment of this invention. It is a block diagram which shows schematic structure of the image forming apparatus which concerns on 2nd Embodiment of this invention. 6 is a flowchart for explaining an operation of an image forming apparatus according to a second embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Discharge circuit 10,70 Image formation apparatus 20 DC power supply 30 Control part 40 Drive part 50 Image formation process part 60 Interlock mechanism C Electrolytic capacitor Q1, Q2 npn transistor R1, R2, R3, R4, R5, R6, R7, R8 Resistor V1, V2 Power supply

Claims (5)

An image forming process unit that performs image processing on input image data to form an output image;
A control unit for controlling the operation of the image forming process unit;
A first power source for supplying a voltage to the image forming process unit;
A second power source for supplying a voltage to the control unit;
A capacitor having one end connected to the first power source and the other end grounded;
A first resistor having one end connected to the one end of the capacitor;
A second resistor having one end connected to the one end of the capacitor and the one end of the first resistor;
A first semiconductor switch connected to the first resistor and the second resistor and configured to turn on / off between the first resistor and ground;
A second semiconductor switch connected to the second power source and the second resistor and turned on / off between the second resistor and the ground,
When the voltage supply by the first power source is cut off, the second semiconductor switch is turned on by the voltage of the second power source to discharge the capacitor,
When the voltage supply by the first power supply is cut off and the voltage supply of the second power supply is cut off, the first semiconductor switch is turned on with the voltage charged in the capacitor to turn on the capacitor. An image forming apparatus that discharges. An image forming process unit that performs image processing on input image data to form an output image;
A control unit for controlling the operation of the image forming process unit;
A first power source for supplying a voltage to the image forming process unit;
A second power source for supplying a voltage to the control unit;
A capacitor having one end connected to the first power source and the other end grounded;
An interlock mechanism that is installed between the first power source and the capacitor and shuts off the voltage supply from the first power source to the image forming process unit when the door of the image forming apparatus is opened; ,
A first resistor having one end connected to the one end of the capacitor;
A second resistor having one end connected to the one end of the capacitor and the one end of the first resistor;
A first semiconductor switch connected to the first resistor and the second resistor and configured to turn on / off between the first resistor and ground;
A second semiconductor switch connected to the second power source and the second resistor and turned on / off between the second resistor and the ground,
When the first power supply is shut off by the interlock mechanism, the second semiconductor switch is turned on by the voltage of the second power supply to discharge the capacitor,
When the first power supply is shut off by the interlock mechanism and the second power supply is shut off, the capacitor is discharged by turning on the first semiconductor switch with a voltage charged in the capacitor. An image forming apparatus. The first semiconductor switch includes a first transistor having a collector connected to the other end of the first resistor, a base connected to the other end of the second resistor, and an emitter grounded.
The second semiconductor switch has a collector connected to the other end of the second resistor and a base of the first transistor, a base connected to the second power supply, and an emitter grounded. The image forming apparatus according to claim 1, wherein the image forming apparatus comprises a transistor. Voltage monitoring means for monitoring the voltage supply of the second power supply;
Based on the monitoring result of the voltage monitoring means, when the voltage is not supplied, the power output stop means for cutting off the output of the first power supply,
The image forming apparatus according to claim 1, further comprising: The image forming apparatus according to claim 1, wherein a resistance value of the first resistor is smaller than a resistance value of the second resistor.

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