JP4200690B2 - GaAs wafer manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a GaAs wafer, and more particularly, to a method for reducing the number of micropits measured after wafer mirror polishing.
[0002]
[Prior art]
As a method for producing a GaAs single crystal, a liquid sealing pulling method (LEC method) and a vertical Bridgman method (VB method or VGF method (temperature gradient method)) are mainly employed. A GaAs single crystal is gradually grown from Ga and As melted in the growth furnace, the crystal is taken out from the furnace as it is, cooled, then processed into a wafer, and further mirror polished.
[0003]
GaAs wafers processed from GaAs crystals include doped GaAs wafers doped with impurities during crystal growth and undoped GaAs wafers that are not doped with impurities. Often used for devices.
[0004]
Usually, a mirror-polished GaAs wafer is used as an epitaxial substrate, but the surface of the GaAs wafer has a size of about 0.5 to 0.1 μm after mirror polishing (hereinafter referred to as micropits). Is likely to occur. In general, in the case of a Si-doped conductive wafer, it is difficult to generate micro pits. However, if the carrier concentration is reduced to about 1 × 10 ¹⁷ cm ⁻³ or less by reducing the amount of Si doped, many micro pits are generated. In particular, in the case of an undoped semi-insulating GaAs wafer not doped with Si, micropits are most likely to occur.
[0005]
[Problems to be solved by the invention]
As described above, when the crystal is taken out from the growth furnace, cooled, and mirror-polished after wafer processing, in the case of an undoped semi-insulating GaAs wafer, a large number (thousands or more) of fine pits are generated. The surface of the wafer in which minute pits are generated has a problem when the device is finely processed. If the number of minute pits is large, fine processing cannot be performed, and even if fine processing is possible, the yield is poor.
[0006]
An object of the present invention is to provide a method of manufacturing a GaAs single crystal that can solve the above-described problems of the prior art and reduce the number of micropits generated.
[0007]
[Means for Solving the Problems]
1st invention is the manufacturing method of the non-dope semi-insulating GaAs wafer by LEC method which reduces the number of the micropits on the wafer of the size of 0.1-0.5 micrometer measured after mirror polishing to below predetermined number. In the growth furnace, an As-excess GaAs crystal having an As composition ratio of 0.50005 or more is grown, and after crystal growth, the GaAs crystal is not taken out of the growth furnace and is heated to 1100 ° C. or higher and annealed . And a step of cooling at a cooling rate of 50 ° C./h or higher in a temperature lowering region of 1100 ° C. or lower in the subsequent temperature lowering process. As used herein, the micro pit refers to a defect having a size of 0.1 to 0.5 μm. When a crystal is grown while being controlled so as to be excessive, excess As is dissolved in the crystal. When the GaAs crystal is cooled from the high temperature state as it is after the crystal growth, if the cooling control is performed at a predetermined speed, the excess As dissolved in the crystal is uniformly dispersed. As described above, the number of minute pits on the GaAs mirror wafer can be effectively reduced by controlling the excess of As and controlling the cooling rate in the temperature lowering process.
[0008]
The second invention is a method for producing a non-doped semi-insulating GaAs wafer by the LEC method that reduces the number of micro pits on a wafer having a size of 0.1 to 0.5 μm measured after mirror polishing to a predetermined number or less. A step of growing an As-excess GaAs crystal having an As composition ratio of 0.50005 or more in a growth furnace, and after the crystal growth, the GaAs crystal is taken out of the growth furnace and then heated to 1100 ° C. or higher for annealing. And then cooling at a cooling rate of 50 ° C./h or more in a temperature lowering region of 1100 ° C. or lower in the process of lowering the temperature . Rather than controlling the cooling rate in the process of lowering the temperature as it is after growing the crystal by controlling it to be over As, the temperature is taken out from the furnace and the temperature is lowered (annealed), and the temperature is lowered after the temperature is raised. Control the cooling rate in the process. When annealing is performed, excess As is dissolved in the crystal. If cooling is controlled at a predetermined speed in the process of cooling the annealed GaAs crystal, excess As dissolved in the crystal is uniformly dispersed. Thus, by controlling so as to be excess of As and performing annealing, the number of minute pits on the GaAs mirror wafer can be effectively reduced.
[0009]
A third invention is a method for producing a GaAs wafer according to the second invention, wherein the temperature raising process and the temperature lowering process are performed in an ingot state. Annealing and temperature lowering may be performed in an ingot state. Even in this case, the same effect of reducing the number of minute pits can be obtained.
[0010]
A fourth invention is a method for producing a GaAs wafer according to the second invention, wherein the temperature raising process and the temperature lowering process are performed in a wafer state. Annealing and temperature lowering may be performed in a wafer state. Even in this case, the same effect of reducing the number of minute pits can be obtained.
[0011]
A fifth invention is a method for producing a GaAs wafer according to the second to fourth inventions, wherein the temperature rise is performed in an As atmosphere. Since annealing is performed in an As atmosphere, As can be prevented from evaporating.
[0013]
6th invention WHEREIN: The manufacturing method of the GaAs wafer whose number of micropits on the wafer measured after the said mirror polishing in the 1st thru | or 5th invention is 1,000 pieces / piece or less in conversion of a 4-inch wafer It is. If the number of micro pits on the wafer is 1,000 or less in terms of a 4-inch wafer, there will be no problem during microfabrication of the device.
[0015]
Embodiment
Embodiments of the present invention will be described below.
[0016]
FIG. 4 is a schematic configuration diagram of a single crystal manufacturing apparatus using the LEC method for manufacturing a non-doped GaAs semi-insulating single crystal. The single crystal manufacturing apparatus includes a high-pressure vessel 1 constituting a growth furnace. In the high-pressure vessel 1, a pBN crucible 3 in which Ga, As, which are raw materials, and boron trioxide (B ₂ O ₃ ), which is a sealing agent, is provided. A graphite heater 5 is arranged around the crucible 3 to heat the crucible 3. The crucible 3 is charged with Ga, As, and boron trioxide. Thereafter, the inside of the high-pressure vessel 1 is heated by a heater 5 to a melting point temperature (1238 ° C.) or higher of GaAs, the raw material in the crucible 3 is melted to form a GaAs melt 6, and the melt surface is coated with boron trioxide 4. cover. The seed crystal 2 is lowered and brought into contact with the GaAs melt 6. By adjusting the output of the heater 5, the temperature in the high-pressure vessel 1 is gradually lowered, and the seed crystal 2 is gradually pulled up to gradually raise the seed crystal 2. 10 is directly synthesized and grown, and the grown single crystal is taken out from the high-pressure vessel 1. The crystal is 4 inches (diameter 101.6 mm).
[0017]
As a result of investigating the occurrence of minute pits with the non-doped GaAs semi-insulating single crystal produced by using the above-mentioned LEC method, the grown crystal was heated to 1100 ° C. (annealed), and then relatively It was found that the number of micro pits decreased when cooled to room temperature at a high speed. It was found that there was no effect when the annealing temperature was lower than 1,100 ° C., and that the effect was greater when the cooling rate was faster.
[0018]
1,100 ° C. is a temperature at which excess As in the crystal is dissolved. Furthermore, considering that the effect is greater as the cooling rate is increased, it was speculated that it would be effective to uniformly disperse excess As and then disperse it uniformly.
[0019]
Therefore, an experiment was conducted in which the amount of excess As in the crystal was changed. FIG. 1 shows the experimental results of the number of minute pits when the As composition ratio is changed. The horizontal axis represents the As composition ratio, the vertical axis represents the number of minute pits on the wafer after mirror polishing (single / sheet), and the cooling rate (° C./h) is a parameter.
[0020]
Here, the excess As amount is represented by the As composition ratio. The crystal composition is directly pulled up using the LEC method, and the As composition ratio is changed by appropriately changing the amounts of Ga and As as raw materials to be used. Since the As composition ratio in the crystal after growth is actually difficult to measure, all values of the As composition ratio are calculated from the raw material weight ratio at the time of raw material charging.
[0021]
The cooling rate in the temperature lowering region of 1,100 ° C. or lower was set to two values of 50 ° C./h and 30 ° C./h, and the As composition ratio was changed from 0.4999 to 0.5003. From this experiment, as expected, it was found that the more excess As, the less the number of micropits generated. Further, when the cooling rate is 30 ° C./h, even if the As mixed crystal ratio is excessive, the number of minute pits cannot be reduced to 1,000 or less. However, when the cooling rate is 50 ° C./h, the As composition ratio is 0. It was also found that the number of minute pits can be reduced to 1,000 or less by setting it to 0.505 or more.
[0022]
FIG. 2 shows the results of an experiment conducted by changing the cooling rate after annealing. The horizontal axis is the cooling rate (° C./h) in the temperature drop region of 1,100 ° C. or lower, the vertical axis is the number of micro pits (single / number) on the wafer after mirror polishing and the As composition ratio is 0.50005 did. From this experimental result, it can be seen that the smaller the cooling rate, the smaller the number of minute pits. In particular, it can be seen that when the cooling rate is higher than 50 ° C./h, the number of minute pits is extremely reduced.
[0023]
1 and 2, it can be seen that the fine pit number level is 1,000 pieces / sheet or less when the composition ratio is 0.50005 or more and the cooling rate is 50 ° C./h or more.
[0024]
In the above embodiment, the method of cooling from 1,100 ° C. is such that the crystal taken out is reannealed and then cooled, but the present invention is not limited to this. For example, it may be cooled as it is after crystal growth. Further, the annealing may be in a crystal (ingot) state or a wafer state.
[0025]
From the above description, a method that satisfies the following two points is optimal as a method for obtaining a wafer having a fine pit count of 1,000 / sheet or less, which seems to have no problem in practice.
[0026]
(1) When the temperature is lowered as it is after the crystal growth, or once the crystal is taken out from the growth furnace (ingot state or wafer state), when the temperature is lowered to 1,100 ° C. or higher and then lowered to 1,100 ° C. or lower Cooling at a rate of 50 ° C./h or more in the temperature drop region.
[0027]
(2) The As composition ratio of the GaAs crystal is 0.50005 or more with an excess of As.
[0028]
According to the undoped semi-insulating GaAs wafer manufactured and processed satisfying these two points, even if this is mirror-polished, the number of minute pits on the wafer surface to be measured can be suppressed to 1,000 or less. Accordingly, the unevenness of the wafer surface hardly becomes a problem at the time of microfabrication of the device, and the yield of microfabrication is greatly improved.
[0029]
Although the cooling rate is greater effect the faster if 50 ° C. / h or higher, and is easy to enter the crystal defects such as slips in the crystal and too fast, practically not preferable is 50 to 80 ° C. / h.
[0030]
In addition, since it is difficult to measure the composition ratio of As, a numerical value calculated from the charge amount of the raw material is used in the embodiment. For this reason, there is a possibility that the composition ratio is slightly different from the actual composition ratio. However, the larger the As composition ratio, the greater the effect of reducing the number of minute pits. Even if the measured value is measured, it does not depart from the present invention.
[0031]
If the required number of micro pits on the mirror surface wafer may exceed 1,000 pieces / piece, the above two points may not be satisfied, and the values of As composition ratio and cooling rate described above are relaxed. Can be manufactured and processed.
[0032]
【Example】
(Example)
After putting 10 kg of Ga, 10.754 kg of As, and 1,000 g of B ₂ O ₃ into the pBN crucible, the pressure of the high-pressure vessel was increased to 6 MPa with Ar gas. Then, after heating up to about 900 degreeC and making Ga and As react, it heated up further and made the whole into a melt. After reducing the pressure to 2 MPa and seeding with a seed crystal, the crystal was grown by pulling up at a speed of 10 mm / h. After completion of the growth, it was gradually cooled to room temperature, and then the crystal was taken out from the high-pressure vessel and once cooled to room temperature. The crystal was a non-doped GaAs semi-insulating single crystal of 17 kg with a composition ratio of 0.5001, φ4 inch (diameter 101.6 mm).
[0033]
After cutting both ends of the crystal, grinding the outer periphery, cleaning by etching, in an ingot state, vacuum sealed in a quartz glass container together with As for internal pressure compensation, heated to 1,100 ° C. (annealed), and 10 hours After being held, it was cooled to room temperature at 80 ° C./h, and the crystals were taken out. A wafer was cut out from the crystal, mirror-polished, and the number of minute pits was measured using a mirror inspection apparatus (Turcor Surf Scan 6200). As a result, as shown in FIG. 3B, the number of minute pits was about 250 / sheet.
(Comparative example)
Crystals were grown under the same conditions as in the examples. The wafers were processed and mirror-polished without annealing in the crystalline state, ingot or wafer state, and the number of micropits was measured by the same measurement method. As a result, in the as-grown before annealing, as shown in FIG. 3A, the number of minute pits was about 6,300 pieces / sheet.
[0034]
【The invention's effect】
According to the present invention, since the number of micro pits generated on a mirror surface wafer can be reduced, microfabrication is facilitated, and the yield of devices using this wafer can be improved.
[Brief description of the drawings]
FIG. 1 is a characteristic diagram of the number of micro pits on a specular wafer according to a GaAs wafer manufacturing method of the present invention, with As composition ratios changed using two cooling rates of 50 ° C./h and 30 ° C./h as parameters. It is a figure of the experimental data showing the change of the number of micropits when it was made to do.
FIG. 2 is a characteristic diagram of the number of micro pits on a mirror wafer processed from a crystal having an As composition ratio of 0.50005 according to the present invention, when the cooling rate in the temperature drop region of 1,100 ° C. or lower is changed. It is a figure of the experimental data showing the change of the number of micropits.
FIG. 3 shows the number of micropits on a mirror surface wafer showing an example after annealing in which a crystal having an As composition ratio of 0.5001 and φ4 inch is cooled at 80 ° C./h, and a comparative example without annealing (as grown). FIG.
FIG. 4 is a schematic configuration diagram of a single crystal manufacturing apparatus using the LEC method according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 High pressure vessel 2 Seed crystal 3 Crucible 4 Boron trioxide 5 Heater 6 GaAs melt 10 GaAs single crystal

Claims (6)

A method for producing a non-doped semi-insulating GaAs wafer by the LEC method that reduces the number of micro-pits having a size of 0.1 to 0.5 μm on a wafer measured after mirror polishing to a predetermined number or less,
A step of growing an As-excess GaAs crystal having an As composition ratio of 0.50005 or more in a growth furnace, and after crystal growth, the GaAs crystal is not taken out from the growth furnace, heated to 1100 ° C. or higher, and then cooled. And a step of cooling at a cooling rate of 50 ° C./h or more in a temperature-decreasing region of 1100 ° C. or less. A method for producing a non-doped semi-insulating GaAs wafer by the LEC method that reduces the number of micro-pits having a size of 0.1 to 0.5 μm on a wafer measured after mirror polishing to a predetermined number or less,
A step of growing an As-excess GaAs crystal having an As composition ratio of 0.50005 or more in a growth furnace; and after crystal growth, the GaAs crystal is taken out of the growth furnace and then heated to 1100 ° C. or higher and annealed. And a step of cooling at a cooling rate of 50 ° C./h or more in a temperature-decreasing region of 1100 ° C. or less, and a method for producing a non-doped semi-insulating GaAs wafer.   3. The method of manufacturing a GaAs wafer according to claim 2, wherein the temperature raising process and the temperature lowering process are performed in an ingot state.   3. The method for manufacturing a GaAs wafer according to claim 2, wherein the process of lowering the temperature after the temperature is once increased is performed in a wafer state.   The method for manufacturing a GaAs wafer according to claim 2, wherein the temperature rise is performed in an As atmosphere.   6. The method for manufacturing a GaAs wafer according to claim 1, wherein the number of micro pits on the wafer measured after the mirror polishing is 1,000 or less per 4 inch wafer.

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