JP4200128B2 - Surge absorber - Google Patents

Description

  The present invention relates to a surge absorber for an electric circuit on which a DC power source is superimposed.

  Some surge absorbers for electric circuits on which a DC power source is superimposed use a gas arrester in the line. In a surge absorber using such a gas arrester, when a surge voltage higher than the discharge operation of the gas arrester is applied to the line, the gas arrester performs a discharge operation to absorb the surge. When the gas arrester performs a discharge operation, the arc discharge voltage is low during the discharge operation, and after the surge is extinguished, there is a problem that the discharge continues with the DC power source superimposed on the electric circuit, that is, there is a continuity. A plurality of gas arresters are connected in series so that the arc voltage is equal to or greater than the DC power supply voltage, and the gas arresters connected in series are divided by the capacitor partial pressure. The voltage is applied to the gas arrester for discharge operation, and the surge is sequentially divided into capacitors, the gas arrester is discharged, the entire series connected gas arrester is discharged, and the surge is absorbed. ing. The surge arrester is configured to discharge the gas arrester to absorb the surge and prevent the continuity.

  As an example, the surge absorber described above is disclosed in Patent Document 1.

JP 2002-10484 A

  In the above-described surge absorber comprising a plurality of gas arresters connected in series and one capacitor less than the gas arrester, the gas arrester and the capacitor are connected in series between the gas arrester and the capacitor connected between the lines. This is a circuit, and there is no delay in the operation of the capacitor, and even if the gas arrester discharges reliably with the partial pressure of the capacitor, the discharge operation delay of the gas arrester is eliminated when a very steep lightning surge is applied. Therefore, there is a problem in that a high surge voltage is applied to the line and the connected device is damaged.

  Further, when a surge voltage higher than the initial design is applied, there is a problem that the capacitor is damaged and the safety function is remarkably lowered.

  An object of the present invention is to solve the problems of the conventional surge absorber described above, and to provide a surge absorber that absorbs a surge instantaneously and does not cause a continuation of a gas arrester.

The present invention, in order to achieve the above object, in the surge absorber, the line, a plurality of gas arrester connected in series, the arrester circuit for sequentially discharging operation of the gas arrester, one line and the other line And a varistor circuit formed by connecting a varistor to each other and at the connection point between the other line and the gas arrester, and a varistor is directly connected between the lines in the varistor circuit. It is a thing.

  Since this invention has the structure mentioned above, there can exist the effect described below.

  In the surge absorber of the present invention, as described above, a plurality of gas arresters are connected in series to the line, and the arrester circuit that sequentially discharges the gas arresters, and the discharge of each gas arrester of the gas arrester circuit A varistor circuit having an operation voltage equal to or higher than the start voltage and having a plurality of varistors that are applied to a predetermined gas arrester to perform a discharge operation, and between the lines of the varistor circuit, Since the varistor is connected directly, the surge applied to the line is instantaneously absorbed by the directly connected varistor between the lines, resulting in a low varistor voltage. By sequentially repeating the operation of the varistor and the discharge operation of the gas arrester to discharge, the arc voltage of the gas arrester is finally equal to the line voltage. In the above, it is possible to prevent the continued flow, it is possible to improve the surge absorber.

  In addition, an arrester circuit in which a plurality of gas arresters are connected in series to the line to sequentially discharge the gas arrester, a connection point between one line and the gas arrester, and a connection point between the other line and the gas arrester In addition, a varistor circuit formed by connecting a varistor to each other is disposed, and among the varistor circuits, since the varistor is directly connected between the lines, the varistor directly connected to the line is The surge applied to the line is absorbed instantaneously to make a low varistor voltage, and the gas arrester connected in series with this varistor voltage is discharged to repeat the varistor operation and the discharge operation of the arrester. In addition, the arc voltage of the gas arrester should be equal to or higher than the line voltage to prevent continuation and improve surge absorption. It can be.

  Furthermore, by connecting a plurality of gas arresters in series to the line, the arrester circuit that sequentially discharges the gas arrester, and between the one line and the other line and between the other line and the gas arrester, A varistor circuit formed by connecting a varistor to each other is disposed, and a varistor is directly connected between the lines in the varistor circuit. Therefore, the varistor directly connected to the line is By absorbing the surge applied to the current instantaneously to make the varistor voltage low and discharging the gas arrester connected in series with this varistor voltage, the operation of the varistor and the discharge operation of the arrester are repeated sequentially. The arc voltage of the gas arrester can be made equal to or higher than the line voltage to prevent the continuity and improve surge absorption.

  Examples of the present invention will be described below. However, the present invention is not limited to the examples as long as the gist of the present invention is not exceeded.

  In FIG. 1, 1 and 2 are line terminals, A1 and A2 are gas arresters, and B1 and B2 are varistors. Then, one electrode of the gas arrester A1 and one electrode of the gas arrester A2 are connected in series at the connection point a to form a gas arrester series circuit including the gas arresters A1 and A2, and the other of the gas arresters A1. Are connected to the line terminal 1, and the other electrode of the gas arrester A 2 is connected to the line terminal 2. Further, by connecting the varistor B1 between the line terminal 1 and the line terminal 2, and connecting the varistor B2 between the connection point a between the gas arrester A1 and the gas arrester A2 and the line terminal 2, A varistor circuit composed of varistors B1 and B2 is formed. In this way, the surge absorber S1 is configured by the gas arrester series circuit composed of the gas arresters A1 and A2 and the varistor circuit composed of the varistors B1 and B2. Note that F is a fuse connected between the varistor B1 and the line terminal 1, and sets the short-circuit mode of the varistor B1 to the open mode.

  Next, another embodiment of the surge absorber will be described with reference to FIG. In FIG. 2, the same components as those in FIG. 1 will be described with the same symbols.

  In addition to the gas arresters A1 and A2 in the above-described embodiment, three gas arresters A3, A4, and A5 are connected in series to form a gas arrester series circuit composed of the gas arresters A1 to A5. . B3, B4, and B5 are newly provided varistors in addition to the varistors B1 and B2 in the above-described embodiment.

  A gas arrester series circuit is constituted by a total of five gas arresters A1 to A5, and an electrode of the gas arrester A1 located at one end constituting the gas arrester series circuit is connected to the line terminal 1, The electrode of the gas arrester A5 located at the other end constituting the gas arrester series circuit is connected to the line terminal 2. Moreover, the varistor B <b> 1 is connected between the line terminal 1 and the line terminal 2 as in the above-described embodiment. As described above, a connection point between one electrode of the gas arrester A1 and one electrode of the gas arrester A2 is a connection point a, and the other electrode of the gas arrester A2 and one electrode of the gas arrester A3 The connection point b is the connection point b, the connection point between the other electrode of the gas arrester A3 and one electrode of the gas arrester A4 is the connection point c, and the other electrode of the gas arrester A4 and the gas arrester A5. A connection point with one of the electrodes is defined as a connection point d.

  Similarly to the above-described embodiment, the varistor B2 is connected between the connection point a between the gas arrester A1 and the gas arrester A2 and the line terminal 2, and the connection point b between the gas arrester A2 and the gas arrester A3. A varistor B3 is connected between the line terminals 2, and further, a varistor B4 is connected between a connection point c between the gas arrester A3 and the gas arrester A4 and the line terminal 2, and furthermore, the gas arrester A4 and the gas arrester. A varistor B5 is connected between the connection point d to A5 and the line terminal 2, and thus a varistor circuit composed of varistors B1 to B5 is configured. Note that F is the same fuse as in the above-described embodiment, and makes the short-circuit mode of the varistor B1 an open mode.

  The surge absorber S2 is constituted by the gas arrester series circuit composed of the gas arresters A1 to A5 and the varistor circuit composed of the varistors B1 to B5.

  Next, a further embodiment of the surge absorbing device will be described with reference to FIG. In FIG. 3, the same components as those in FIG. 1 will be described with the same symbols.

  In the embodiment shown in FIG. 1, the varistor B1 is connected between the line terminal 1 and the line terminal 2, but in the embodiment shown in FIG. It is connected between the connection point a between the arrester A1 and the gas arrester A2 and the line terminal 1. The other configuration is the same as that of the embodiment shown in FIG. In this way, the surge absorber S3 is configured.

  Next, still another embodiment of the surge absorber will be described with reference to FIG. This embodiment is a modification of the embodiment shown in FIG. 2 described above. In FIG. 4, the same components as those in FIG. 2 will be described with the same symbols.

  In the embodiment shown in FIG. 2, the varistor B1 is connected between the line terminal 1 and the line terminal 2. However, in the embodiment shown in FIG. A connection point a between one electrode of the arrester A1 and one electrode of the gas arrester A2 and the line terminal 1 are connected. Other configurations are the same as those of the embodiment shown in FIG. In this way, the surge absorber S4 is configured.

  Next, using FIG. 5 in which the above-described surge absorbers S1 to S4 are arranged in an electric circuit in which a DC power source is superimposed between a pair of lines L arranged in parallel, the surge absorbers S1 to S4 are used. Will be described.

  First, the operation of the surge absorber S1 shown in FIG. 1 will be described.

  Now, when a surge enters the line L, the varistor B1 constituting the surge absorbing device S1 disposed between the lines L and L operates to absorb the surge and make the voltage of the varistor voltage low. Next, when the gas arrester A1 performs a discharge operation at the varistor voltage of the varistor B1, and the gas arrester A1 performs a discharge operation, the surge operates the varistor B2 via the gas arrester A1. Then, the gas arrester A2 is discharged by the varistor voltage of the varistor B2, and the surge is processed through the gas arrester A1 and the gas arrester A2. In addition, the arc voltage of the gas arrester A1 and the gas arrester A2 is twice as high as that of a single gas arrester, and is set higher than the power supply voltage after the surge disappears. Become.

  Next, the operation of the surge absorber S2 shown in FIG. 2 will be described.

  Now, when a surge enters the line L, the varistor B1 operates among the varistors B1 to B5 constituting the surge absorbing device S2 disposed between the lines L and L, and the varistor B1 absorbs the surge. Let L be a voltage with a low varistor voltage. Next, when the gas arrester A1 performs a discharge operation and the gas arrester A1 performs a discharge operation with the varistor voltage of the varistor B1, a surge flows through the gas arrester A1 to operate the varistor B2. Then, the gas arrester A2 is discharged by the varistor voltage of the varistor B2, and the surge flows through the gas arrester A2 to operate the varistor B3. Then, the gas arrester A3 is discharged by the varistor voltage of the varistor B3, and the surge flows through the gas arrester A3 to operate the varistor B4. Then, the gas arrester A4 is discharged by the varistor voltage of the varistor B4, and the surge flows through the gas arrester A4 to operate the varistor B5. Then, the gas arrester A5 is discharged by the varistor voltage of the varistor B5, and the surge flows through the gas arrester A5. While the surge is applied, a low voltage current continues to flow through the gas arrester series circuit composed of the gas arresters A1 to A5. However, after the surge disappears, the arc voltage higher than the power supply voltage is set. Flow will be prevented.

  Next, the operation of the surge absorber S3 shown in FIG. 3 will be described.

  Now, when a surge enters the line L, the varistor B1 and varistor B2 constituting the surge absorbing device S3 connected between the lines L and L operate to absorb the surge, and the line L has a low varistor voltage. Use voltage. Next, when the gas arrester A1 performs a discharge operation and the gas arrester A1 performs a discharge operation with the varistor voltage of the varistor B1, the surge flows through the gas arrester A1 to operate the varistor B2. Then, the gas arrester A2 is discharged by the varistor voltage of the varistor B2, and the surge is flowed through the gas arrester A1 and the gas arrester A2. In addition, the arc voltage of the gas arrester A1 and the gas arrester A2 is twice as high as that of the single gas arrester, and after the surge disappears, the arc voltage is set higher than the power supply voltage. Damage to connected devices can be prevented.

  Next, the operation of the surge absorber S4 shown in FIG. 4 will be described.

  Now, when a surge enters the line L, the varistor B1 and varistor B2 constituting the surge absorbing device S4 connected between the lines L and L operate to absorb the surge and cause the line L to have a low varistor voltage. Use voltage. Next, when the gas arrester A1 performs a discharge operation and the gas arrester A1 performs a discharge operation with the varistor voltage of the varistor B1, the surge flows through the gas arrester A1 to operate the varistor B2. Then, the gas arrester A2 is discharged by the varistor voltage of the varistor B2, and the surge flows through the gas arrester A2 to operate the varistor B3. Then, the gas arrester A3 is discharged by the varistor voltage of the varistor B3, and the surge flows through the gas arrester A3 to operate the varistor B4. Then, the gas arrester A4 is discharged by the varistor voltage of the varistor B4, and the surge flows through the gas arrester A4 to operate the varistor B5. Then, the gas arrester A5 is discharged by the varistor voltage of the varistor B5, and the surge that has entered the line L flows from the gas arrester A1 through the gas arrester A5. While a surge is applied, a low voltage current flows through the gas arrester series circuit, that is, the gas arrester A1, the gas arrester A2, the gas arrester A3, the gas arrester A4, and the gas arrester A5. After extinction, the arc voltage becomes the arc voltage of the number of gas arresters of one arc voltage, and since it is set to an arc voltage higher than the power supply voltage, continuous current can be prevented and surge can be handled safely, Damage to connected devices can be prevented.

  The surge absorbing device S3 shown in FIG. 3 and the surge absorbing device S4 shown in FIG. 4 have two varistors connected between the line terminal 1 and the line terminal 2, that is, the varistor B1 and the varistor. Since the connection to B2 is performed and the varistor has two operations, the surge absorber S1 shown in FIG. 1 and the varistor of the surge absorber S2 shown in FIG. 2 have one operation, that is, the operation of the varistor B1. The varistor voltage is twice that of the above, but even if the surge voltage is doubled, there is no problem in absorbing the surge and the connected device or the like is not damaged.

  Hereinafter, more specific examples of the present invention will be described with numerical values.

  The Vt curve shown in FIG. 6 will be described using the surge absorber S4 shown in FIG.

  The discharge start voltages of the gas arresters A1 to A5 are set to 90 v, respectively. Further, the varistor voltages of the varistors B1 to B5 are set to 90 v, respectively.

  Now, when a lightning surge Tb having a surge waveform shown in FIG. To. At this time, the voltage across the varistor B1 is 90v, and the voltage across the varistor B2 is 90v + (4 × (15-30)) v. Then, the gas arrester A1 is discharged with the voltage across the varistor B1, and the lightning surge Tb flows through the line terminal 1 → the gas arrester A1 → the varistor B2 → the line terminal 2 and becomes a low voltage of the surge voltage V2.

  At this time, the voltage across the varistor B2 is 90v + (4 × (15-30)) v, and the voltage across the varistor B2 is between the connection point a between the gas arrester A1 and the gas arrester A2 and the line terminal 2. However, due to the capacitance ratio between the gas arrester A2 and the varistor B3, most of the voltage 90v + (4 × (15-30)) v is applied to the gas arrester A2, and the gas arrester A2 Discharge operation. Then, the lightning surge Tb flows from the line terminal 1 → the gas arrester A1 → the gas arrester A2 → the varistor B3 → the line terminal 2 and becomes a low voltage of the surge voltage V3.

  Further, at this time, the voltage between both ends of the varistor B3 is 90v + (3 × (15-30)) v, and this voltage between both ends is between the connection point b between the gas arrester A2 and the gas arrester A3 and the line terminal 2. However, due to the capacitance ratio between the gas arrester A3 and the varistor B4, most of the voltage 90v + (3 × (15-30)) v is applied to the gas arrester A3, and the gas arrester A3 is discharged. Operate. Then, the lightning surge Tb flows from the line terminal 1 → the gas arrester A 1 → the gas arrester A 2 → the gas arrester A 3 → the varistor B 4 → the line terminal 2, and becomes a low voltage of the surge voltage V 4.

  Further, at this time, the voltage across the varistor B4 is 90v + (2 × (15-30)) v. The voltage across the varistor B4 is connected to the connection point c between the gas arrester A3 and the gas arrester A4 and the line terminal 2. The voltage 90v + (2 × (15 to 30)) v is almost always applied to the gas arrester A4 due to the capacitance ratio between the gas arrester A4 and the varistor B5. Discharges. Then, the lightning surge Tb flows through the line terminal 1 → the gas arrester A1 → the gas arrester A2 → the gas arrester A3 → the gas arrester A4 → the varistor B5 → the line terminal 2 and becomes a voltage having a low surge voltage V5.

  Furthermore, at this time, the voltage across the varistor B5 is 90 V, and this voltage across the varistor B5 is applied between the connection point d of the gas arrester between the gas arrester A4 and the gas arrester A5 and the line terminal 2. Arrester A5 performs a discharging operation. Then, the lightning surge Tb flows through the line terminal 1 → the gas arrester A1 → the gas arrester A2 → the gas arrester A3 → the gas arrester A4 → the gas arrester A5 → the line terminal 2 and becomes a low voltage of the surge voltage V6.

  As described above, the gas arrester series circuit is discharged, and the surge is treated with a voltage with a low sum of arc voltage of the gas arrester (surge voltage V6 in FIG. 6), so that the varistor can be instantaneously operated when a surge enters. The line was operated to change the varistor voltage, and then the gas arrester was discharged to handle the surge, so the varistor's large capacity without arc delay and the arc voltage were arbitrary, and the continuation flow Thus, a surge absorbing device that does not occur can be obtained.

  In the surge absorbers S1 to S4 described above, the case where the number of gas arresters is 2 to 5 and the number of varistors is 2 to 5 is also shown, but the number of gas arresters and varistors is also shown. Is not limited to such a number, and can be arbitrarily selected from a DC power supply voltage, an arc voltage, and the like.

  Further, the surge absorbing device may be installed not only between the line but also between the line and the ground.

FIG. 1 is a circuit configuration diagram of a surge absorber according to the present invention, and in particular, a surge absorber constructed using two gas arresters and two varistors. FIG. 2 is a circuit configuration diagram of another embodiment of the surge absorber according to the present invention, and in particular, a surge absorber constructed using five gas arresters and five varistors. FIG. 3 is a circuit configuration diagram of still another embodiment of the surge absorber according to the present invention. In particular, the surge absorber is constituted by using two each of a gas arrester and a varistor. FIG. 4 is a circuit configuration diagram of still another embodiment of the surge absorbing device of the present invention, and in particular, a surge absorbing device configured using five gas arresters and five varistors. FIG. 5 is a circuit diagram of a surge absorber connected to an electric circuit on which a DC power supply is superimposed. FIG. 6 is a Vt characteristic diagram for explaining a state in which the surge absorbing device absorbs a surge. The vertical axis represents the surge voltage (V) and the horizontal axis represents time (t).

Explanation of symbols

S1 to S4 ... Surge absorbers 1, 2, ... Line terminals A1 to A5 ... Gas arresters B1 to B5 ... ..... Varistor

Claims (1)

A plurality of gas arresters are connected in series to the line, and the arrester circuit that sequentially discharges the gas arrester, and the connection point between the one line and the other line and the connection point between the other line and the gas arrester, respectively. And a varistor circuit formed by connecting varistors, and a varistor is directly connected between lines in the varistor circuit.

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