JP4180708B2

JP4180708B2 - Semiconductor position detector

Info

Publication number: JP4180708B2
Application number: JP29546598A
Authority: JP
Inventors: 辰夫竹下; 正之榊原
Original assignee: Hamamatsu Photonics KK
Current assignee: Hamamatsu Photonics KK
Priority date: 1998-10-16
Filing date: 1998-10-16
Publication date: 2008-11-12
Anticipated expiration: 2018-10-16
Also published as: JP2000124494A

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体位置検出器（ＰＳＤ）に関する。
【０００２】
【従来の技術】
半導体位置検出器（ＰＳＤ）は光の入射位置を検出できる光センサであり、ＬＥＤ等の発光源と組み合わせポジション・センサとして広く応用されている。半導体位置検出器の代表的な用途としては、変位計やレンズシャッターカメラのオートフォーカス等が挙げられる。これらの距離検出方式は、三角測量の原理、すなわち、半導体位置検出器−測定対象物間の距離Ｌと発光源−半導体位置検出器間の距離（基線長）Ｂとの比（Ｌ／Ｂ）が、半導体位置検出器−集光レンズ間距離ｆと光の入射位置Ｘとの比（ｆ／Ｘ）に等しいという原理を応用している。
【０００３】
特開昭６４−７８１１０号公報に記載の半導体位置検出器は、入射光位置に応じて発生した光電流を抵抗分割し、分割された電流をそれぞれ取り出す一対の信号取出電極の外側にホトダイオード領域を具備しており、超至近距離からの入射光の検出を行っている。しかしながら、その位置を検出する場合には、信号取出電極が入射光を遮光するため、正確な位置検出を行うことはできない。さらに、入射光がホトダイオード領域から若干でも幅方向にずれた場合においては、出力を得ることができない。
【０００４】
また、図２２乃至図２４に示される半導体位置検出器も知られている。
【０００５】
図２２は従来の半導体位置検出器の平面図、図２３は図２２に示した半導体位置検出器のＡ−Ａ矢印断面図、図２４は図２２に示した半導体位置検出器のＢ−Ｂ矢印断面図である。半導体基板１上には基幹導電層２、分枝導電層３、信号取出用高濃度層４が形成されており、それぞれの機能層を包囲する外枠層６及び外枠電極７、隔離する隔離層６’が設けられている。裏面電極９を介して高濃度層８と表面層２，３との間に逆バイアス電圧を印加し、この状態で光が入射すると、光の入射に応じて内部で電荷（正孔／電子対）が発生する。発生した電荷は、基幹導電層２の基線長方向に沿った位置、すなわち抵抗値に逆比例するようにその両端に設けられた電極５を介して外部に出力される。
【０００６】
図２５は、スポット光が入射した場合の半導体位置検出器の平面図である。半導体位置検出器にスポット光が入射すると、信号取出電極５が受光領域端部の入射光を遮光するため、その位置検出性能を向上させることが困難であり、検出可能範囲を検出希望範囲まで拡大させることができない。
【０００７】
【発明が解決しようとする課題】
そこで、受光領域を基線長方向に延ばして半導体位置検出器自体を大型化すれば、本来であれば信号取出電極に掛かっていた入射光も検出することができる。しかしながら、基線長方向に単に受光領域を延ばした場合、抵抗分割される半導体導電層が長くなることによって、逆に位置分解能は低下する。本発明はこのような課題に鑑みてなされたものであり、高性能な半導体位置検出器を提供することを目的とする。
【０００８】
【課題を解決するための手段】
上記課題を解決するため、本発明に係る半導体位置検出器は、受光面上の基線長方向の入射光位置に応じて半導体導電層の両端部に設けられた一対の信号取出電極からそれぞれ出力される電流値が可変する半導体位置検出器において、入射光を受光可能なように信号取出電極から基線長方向に対して垂直な幅方向に延びた副半導体領域を備え、副半導体領域は、受光面の基線長方向の両端に位置し、且つ、半導体導電層を介することなく信号取出電極に接続していることを特徴とする。
本発明に係る半導体位置検出器は、受光面上の基板の長手方向の入射光位置に応じて半導体導電層の両端部に設けられた一対の信号取出電極からそれぞれ出力される電流値が可変する半導体位置検出器において、入射光を受光可能なように前記信号取出電極から前記基板の長手方向に対して垂直な幅方向に延びた副半導体領域を備え、副半導体領域は、受光面の前記長手方向の両端に位置し、且つ、半導体導電層を介することなく信号取出電極に接続していることを特徴とする。
【０００９】
本発明の半導体位置検出器によれば、副半導体領域が信号取出電極から基線長方向（基板の長手方向）に対して垂直な幅方向に延びているので、本来の受光面と副半導体領域が隣接することとなり、半導体導電層或いは副半導体領域に入射した光に応じて発生した電流を信号取出電極から取り出すことによって、この受光面の外側に照射された入射光の位置も入射光位置変化に対して出力電流値が連続するように検出することができる。また、副半導体領域は、半導体導電層を介することなく信号取出電極と接続しているため、位置検出のための抵抗分割への寄与はなく、その不純物濃度は任意で良いと共に位置分解能の低下を抑制することができる。
【００１０】
さらに、副半導体領域の幅方向の長さは、受光面の電流の出力に寄与する幅方向の長さに略等しいことから、入射光が幅方向に欠けることもなく、正確な位置検出出力を得ることができる。
【００１１】
また、受光面は長方形であって、一対の信号取出電極は、それぞれ受光面の対角線上に配置される一対の電極パッドに接続されていることが好ましい。この対角配置を用いることにより、半導体位置検出器の組立工程において、電極パッドの向きを確認する必要がなくなるため、組立効率を向上させることができる。
【００１２】
【発明の実施の形態】
以下、実施の形態に係る半導体位置検出器について説明する。同一要素又は同一機能を有する要素には同一符号を用いるものとし、重複する説明は省略する。
【００１３】
（第１実施形態）
図１は第１実施形態に係る半導体位置検出器の平面図、図２は図１に示した半導体位置検出器のＡ−Ａ矢印断面図、図３は図１に示した半導体位置検出器のＢ−Ｂ矢印断面図である。なお、説明に用いる半導体位置検出器の断面図は、その端面を示す。
【００１４】
本実施形態に係る半導体位置検出器は、低濃度ｎ型Ｓｉからなる半導体基板１と、半導体基板１の裏面に形成された高濃度ｎ型Ｓｉからなる裏面側ｎ型半導体層８とを備えている。半導体基板１の表面は長方形である。
【００１５】
以下の説明では、裏面側ｎ型半導体層８からｎ型半導体基板１へ向かう方向を上方向とし、ｎ型半導体基板１の長方形表面の長辺の伸延方向を長さ方向（長手方向）Ｘ、短辺の伸延方向を幅方向Ｙ、長さ方向Ｘ及び幅方向Ｙ双方に垂直な方向を深さ方向（厚さ方向）Ｚとする。すなわち、方向Ｘ、Ｙ及びＺは互いに直交している。
【００１６】
本半導体位置検出器は、半導体基板１内に形成され、長さ方向Ｘに沿って延びた基幹導電層２を備えている。基幹導電層２はｐ型Ｓｉからなり、基幹導電層２の抵抗率は半導体基板１の抵抗率よりも低い。基幹導電層２は、実質的に均一な不純物濃度、すなわち抵抗率ρを有しており、ｎ型半導体基板１の表面から厚さ方向Ｚに沿って実質的に同一の深さまで延びている。
【００１７】
本半導体位置検出器は、基幹導電層２から受光面に沿ってそれぞれ延びた複数のｐ型半導体の導電層からなる分枝導電層３を備えている。分枝導電層３の不純物濃度は基幹導電層２の不純物濃度と略同一であり、分枝導電層３の幅方向Ｙに沿った長さは入射光スポットの直径よりも長い。
【００１８】
なお、分枝導電層３は、基幹導電層２の不純物濃度よりも高濃度のｐ型Ｓｉからなることとしてもよい。すなわち、分枝導電層３の抵抗率は基幹導電層２の抵抗率よりも低い。この場合、基幹導電層２は、複数のｐ型の抵抗領域が不純物濃度の異なる分枝導電層の一端部を介在して長さ方向Ｘに沿って連続してなる。
【００１９】
このように、分枝導電層３の検出精度への影響を低減させるために、その不純物濃度を高くし、抵抗率を低下させることが望ましいが、本実施形態においては、分枝導電層３と基幹導電層２の抵抗率は、略同一であることとし、これらを同一工程において製造して、製造時間の短縮を図ることとした。
【００２０】
本半導体位置検出器は、基幹導電層２の両端にそれぞれ隣接し、半導体基板１内に形成された一対の副半導体領域１１を備えている。副半導体領域１１は、ｐ型Ｓｉからなり、半導体基板１の表面から厚み方向Ｚに沿って基幹導電層２の深さと略同一の位置まで延びている。
【００２１】
副半導体領域の抵抗率は任意で良いため、本実施形態における副半導体領域は分枝導電層３及び基幹導電層２と略同一の抵抗率とし、これらを同一工程において製造することが可能である。
【００２２】
本半導体位置検出器は、半導体基板１の長方形表面の外周部に形成された外枠半導体層６を備える。外枠半導体層６は高濃度ｎ型Ｓｉである。外枠半導体層６は、半導体基板１の長方形表面の外縁領域内に形成されてロの字形をなし、基幹導電層２、分枝導電層３、及び副半導体領域１１の形成された基板表面領域を包囲し、ｎ型半導体基板１の表面から厚み方向Ｚに沿って所定の深さまで延びている。
【００２３】
本半導体位置検出器は、半導体基板１内に形成された分枝導電層隔離用半導体層６’を備える。分枝導電層隔離用半導体層６’は、高濃度ｎ型Ｓｉである。分枝導電層隔離用半導体層６’は、ロの字形の外枠半導体層６の長辺の内側から幅方向Ｙに沿って基幹導電層２方向に延びた複数のｎ型の分枝領域からなる。各分枝領域は、厚み方向Ｚに沿ってｎ型半導体基板１の表面から所定深さまで延びている。このｎ型の分枝領域は、ｐ型の分枝導電層３よりも深く、分枝導電層３間及び分枝導電層３と副半導体領域１１との間に介在し、それらを電気的に隔離している。すなわち、分枝領域は、分枝導電層３の隣接するもの同士間及び分枝導電層３と副半導体領域１１との間を長さ方向Ｘに沿って流れる電流を阻止している。
【００２４】
本半導体位置検出器は、ｎ型半導体基板１の長方形表面を覆うパッシベーション膜（絶縁膜）１０を備える。なお、図１及び以下の実施形態に係る半導体位置検出器の平面図においてはパッシベーション膜１０の記載を省略する。パッシベーション膜１０は、信号取出電極用の一対の微小開口（スルーホール）を基幹導電層２の長さ方向両端部及び副半導体領域１１部に有し、外枠電極用のロの字形開口を外周部に有する。
【００２５】
信号取出電極５は、パッシベーション膜１０の信号取出電極用の一対の微小開口をそれぞれ介して、基幹導電層２端部及び副半導体領域１１にオーミック接触している。
【００２６】
本半導体位置検出器では、副半導体領域１１が入射光を受光可能なように基幹導電層２の外側に隣接して設けられているため、従来であれば信号取出電極５によって遮光されていた入射光も、副半導体領域１１の幅方向に延びた領域で受光することができる。
【００２７】
基幹導電層２及び分枝導電層３に入射光スポットが照射された時には、それらにより収集されたキャリアは基幹導電層２の抵抗分割比に反比例するように基幹導電層２両端を介してそれぞれの信号取出電極５から出力される。
【００２８】
また、副半導体領域１１上に入射光スポットが照射された時には、副半導体領域１１により収集されたキャリアは基幹導電層２を介することなく直接接続された信号取出電極５から出力される。
【００２９】
すなわち、副半導体領域１１が信号取出電極５から基線長方向Ｘに対して垂直な幅方向Ｙに延びているので、本来の受光面と副半導体領域１１が隣接することとなり、分枝導電層３或いは副半導体領域１１に入射した光に応じて発生した電流を信号取出電極５から取り出すことによって、この受光面の外側に照射された入射光の位置も入射光位置変化に対して出力電流値が連続するように検出することができる。
【００３０】
また、副半導体領域１１は、直接、信号取出電極５と接続しているため、位置検出のための抵抗分割への寄与はないため不純物濃度に関係なく、位置分解能の低下を抑制することができると共に、副半導体領域１１の幅方向の長さは、受光面の電流の出力に寄与する幅方向Ｙの長さ、つまり分枝導電層３の長さに略等しいため入射光が幅方向に欠けることもない。
【００３１】
本半導体位置検出器は、パッシベーション膜１０の外枠電極用の開口を介して、ｎ型の外枠半導体層６上に形成された外枠電極７を備える。外枠電極７は、外枠半導体層６とオーミック接触している。外枠電極７は、半導体基板１外周部への光の入射を阻止する。また、外枠電極７と信号取出電極５との間に所定の電圧を印加することもできる。
【００３２】
本半導体位置検出器は、裏面側ｎ型半導体層８の下面に形成された下面電極９を備える。下面電極９は、裏面側ｎ型半導体層８とオーミック接触している。
【００３３】
一対の信号取出電極５と下面電極９との間に、ｐ型分枝導電層３及びｎ型半導体基板１から構成されるｐｎ接合ダイオードに逆バイアス電圧が印加されるような電圧を与えた状態で、半導体導電層２，３，１１の形成されたｎ型半導体基板１の表面領域で規定される受光面に入射光がスポット光として入射すると、この入射光に応じて半導体位置検出器内部で電子正孔対（電荷）が発生し、拡散及び半導体位置検出器内部の電界にしたがってその一方は分枝導電層３あるいは副半導体領域１１に流れ込む。
【００３４】
分枝導電層３に流れ込んだ電荷は、分枝導電層３を伝導して基幹導電層２の所定位置に流れ込み、基幹導電層２の長さ方向Ｘの位置に応じて、基幹導電層２の両端までの抵抗値に反比例するようにその電荷量が分配され、分配された電荷はそれぞれ基幹導電層２の両端及び副半導体領域１１を介してそれぞれの信号取出電極５から取り出される。副半導体領域１１に流れ込んだ電荷は基幹導電層２を介することなく信号取出電極５から取り出される。半導体導電層２，３或いは副半導体領域１１に入射した光に応じて発生した電流を、双方の信号取出電極５から取り出すことによって、入射光位置を検出することができる。
【００３５】
すなわち、各信号取出電極５から出力される信号電流の電流値の割合は、入射光位置に応じて変化するため、これから入射光位置を特定することができる。
【００３６】
図２６は、図２５に示した通常の半導体位置検出器（従来例とする）の等価回路（図２６（ａ））、及び上記実施形態に係る半導体位置検出器の等価回路（図２６（ｂ））を示す。同図中のＰは電流源、Ｄは理想的ダイオード、Ｃｊは接合容量、Ｒｓｈは並列抵抗、Ｒｐは基幹導電層による抵抗値を示す。なお、信号取出電極によって入射光が遮られない基線長方向の限界位置をＸＬ、−ＸＬとする。同図に示すように、実施形態に係る半導体位置検出器は、副半導体領域１１に光が入射した場合においても、その位置を検出することができるので、従来に比して入射光の位置検出範囲を拡大することができる。
【００３７】
図２７は、入射光スポット位置Ｘに対する電極５から出力される信号電流Ｉ１，Ｉ２の関係を示すグラフ（図２７（ａ））、及び入射光スポット位置Ｘに対する位置検出誤差の関係を示すグラフ（図２７（ｂ））である。従来例においては、位置ＸＬ又は−ＸＬよりも外側に光が入射した場合には、入射光スポットの欠けによって信号電流が著しく低下する。一方、本実施形態においては、副半導体領域１１が欠けの位置に相当する入射光を収集するように機能するため、このようなことが抑制される。また、本実施形態においては、この領域における位置検出誤差も従来例に比較して低減されている。
【００３８】
以上、説明したように、本実施の形態に係る半導体位置検出器は、受光面上の基線長方向Ｘの入射光位置に応じて半導体導電層２の両端部に設けられた一対の信号取出電極５からそれぞれ出力される電流値が可変する半導体位置検出器において、入射光を受光可能なように信号取出電極５から基線長方向に対して垂直な幅方向Ｙに延びた副半導体領域１１を基幹導電層２の外側に備え、副半導体領域１１の幅方向Ｙの長さは、受光面の電流の出力に寄与する幅方向Ｙ、つまり分枝導電層３の長さに略等しい。なお、副半導体領域１１は、前記両端部の一方のみに設けられることとしてもよい。
【００３９】
なお、従来の半導体位置検出器の受光領域を、基線長方向（Ｘ）に沿って単に延ばした場合、抵抗分割される半導体導電層が長くなることによって、逆に位置分解能は低下するが、本実施の形態においては、副半導体領域１１は、信号取出電極５と直接接続しているため、位置検出のための抵抗分割への寄与がなく、位置分解能の低下を抑制することができる。
【００４０】
（第２実施形態）
図４は第２実施形態に係る半導体位置検出器の平面図、図５は図４に示した半導体位置検出器のＡ−Ａ矢印断面図、図６は図４に示した半導体位置検出器のＢ−Ｂ矢印断面図である。
【００４１】
本実施形態は、上記半導体導電層２，３に代えて半導体導電層１２を用いた点のみが第１実施形態の半導体位置検出器と異なる。半導体導電層１２は、受光面内の位置検出（基線長）方向（Ｘ）に対して斜めに交差するようなジグザグ形状を有している。入射光に応じて発生するキャリアは分枝導電層等の間接的な光収集手段を介在することなく半導体導電層１２上に収集されるので、直接的な位置検出を行うことができる。なお、隔離層６’は、上記実施形態と同様に導電層１２の離隔した各部位間をＸ方向に平行に流れる電流を阻止している。
【００４２】
本実施形態における副半導体領域１１の幅方向の長さは前記半導体層１２の幅方向頂点間の長さに略等しい。
【００４３】
（第３実施形態）
図７は第３実施形態に係る半導体位置検出器の平面図、図８は図７に示した半導体位置検出器のＡ−Ａ矢印断面図、図９は図７に示した半導体位置検出器のＢ−Ｂ矢印断面図である。
【００４４】
本形態の半導体位置検出器は、第２実施形態の半導体位置検出器と比較して、その半導体導電層１２の形状のみを変えて半導体導電層１３としたものである。
【００４５】
すなわち、本半導体位置検出器においては、半導体導電層１３は、受光面内の位置検出方向（Ｘ）に対して直交して延びる複数の直線部分と、この直線部分の隣接するもの同士の片端のみを位置検出方向に沿って交互に接続する接続部分とからなる形状を有している。本実施形態においても、入射光に応じて発生するキャリアは分枝導電層等の間接的な光収集手段を介在することなく半導体導電層１３にて収集される。
【００４６】
本実施形態における副半導体領域１１の幅方向の長さは前記半導体層１３の幅方向の長さに略等しい。
【００４７】
（第４実施形態）
図１０は第４実施形態に係る半導体位置検出器の平面図、図１１は図１０に示した半導体位置検出器のＡ−Ａ矢印断面図、図１２は図１０に示した半導体位置検出器のＢ−Ｂ矢印断面図である。
【００４８】
本実施形態は、第１実施形態における半導体導電層２，３の形状を変え、基幹導電層２が幅方向中心を通るフィッシュボーン形状とし、基幹導電層２と副半導体領域１１を一体化し、基幹導電層２の両端部に設けられた微小開口（スルーホール）を介し前記基幹導電層２の端部及び副半導体領域１１とオーミック接触した電極５からパッシベーション膜１０の上面を這って延びた信号取出用配線膜５’を更に設けた点のみが第１実施形態の半導体位置検出器と異なる。一対の信号取出用配線膜５’の端部は一対の電極パッドを構成し、これらの電極パッドは長方形受光面の対角線上に位置する。この対角配置を用いることにより、半導体位置検出器の組立工程において、電極パッドの向きを確認する必要がなくなるため、組立効率を向上させることができる。
【００４９】
（第５実施形態）
図１３は第５実施形態に係る半導体位置検出器の平面図、図１４は図１３に示した半導体位置検出器のＡ−Ａ矢印断面図、図１５は図１３に示した半導体位置検出器のＢ−Ｂ矢印断面図である。
【００５０】
本実施形態は、第２実施形態における半導体層１２と副半導体領域１１を一体化し、微小開口（スルーホール）を介し前記半導体層１２端部及び副半導体領域１１とオーミック接触した一方の信号取出電極５からパッシベーション膜１０の上面を這って延びた信号取出用配線膜５’を更に設けた点のみが第２実施形態の半導体位置検出器と異なる。この一方の信号取出用配線膜５’の端部は電極パッドを構成し、他方の信号取出電極５は、これ自体が電極パッドを構成する。したがって、本実施形態においても、これらの電極パッドが対角配置されており、組立効率を向上させることができる。
【００５１】
（第６実施形態）
図１６は第６実施形態に係る半導体位置検出器の平面図、図１７は図１６に示した半導体位置検出器のＡ−Ａ矢印断面図、図１８は図１６に示した半導体位置検出器のＢ−Ｂ矢印断面図である。
【００５２】
本実施形態は、第３実施形態における半導体層１３と副半導体領域１１を一体化し、微小開口（スルーホール）を開始、前記半導体層１３及び副半導体領域１１とオーミック接触した端部の一方の信号取出電極５からパッシベーション膜１０の上面を這って延びた信号取出用配線膜５’を更に設けた点のみが第３実施形態の半導体位置検出器と異なる。この一方の信号取出用配線膜５’の端部は電極パッドを構成し、他方の信号取出電極５は、これ自体が電極パッドを構成する。したがって、本実施形態においても、これらの電極パッドが対角配置されており、組立効率を向上させることができる。
【００５３】
（第７実施形態）
図１９は第７実施形態に係る半導体位置検出器の平面図、図２０は図１９に示した半導体位置検出器のＡ−Ａ矢印断面図、図２１は図１９に示した半導体位置検出器のＢ−Ｂ矢印断面図である。
【００５４】
本形態の半導体位置検出器は、第２実施形態の半導体位置検出器と比較して、その半導体導電層１２の形状のみを変えて半導体導電層１４とし、半導体導電層１４と副半導体領域１１を一体化したものである。
【００５５】
すなわち、本半導体位置検出器においては、半導体導電層１４は、受光面内の位置検出方向（Ｘ）に沿ってストライプ状に延びた複数の直線部分からなる。また、本検出器は半導体基板１内に形成された半導体導電層隔離用半導体層１５を備える。半導体導電層隔離用半導体層１５は高濃度ｎ型Ｓｉであり、半導体導電層１４間に介在し、それらの隣接するもの同士間を流れる電流を阻止している。
【００５６】
信号取出電極５は、パッシベーション膜１０のスルーホールを介して各半導体導電層１４端部及び副半導体領域とオーミック接触しており、それぞれの信号取出電極５の端部は電極パッドを構成する。
【００５７】
【発明の効果】
以上、説明したように、本発明に係る半導体位置検出器は、半導体導電層に隣接した所定の副半導体領域を具備することにより半導体導電層端部での信号取出電極による入射光欠けを防止し、位置分解能を低下させることなく高精度に位置検出を行うことができる。また、前記副半導体領域の抵抗率は任意で良いため、前記半導体導電層と同時形成が可能であり安価である。
【図面の簡単な説明】
【図１】第１実施形態に係る半導体位置検出器の平面図。
【図２】図１に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図３】図１に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図４】第２実施形態に係る半導体位置検出器の平面図。
【図５】図４に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図６】図４に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図７】第３実施形態に係る半導体位置検出器の平面図。
【図８】図７に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図９】図７に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図１０】第４実施形態に係る半導体位置検出器の平面図。
【図１１】図１０に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図１２】図１０に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図１３】第５実施形態に係る半導体位置検出器の平面図。
【図１４】図１３に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図１５】図１３に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図１６】第６実施形態に係る半導体位置検出器の平面図。
【図１７】図１６に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図１８】図１６に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図１９】第７実施形態に係る半導体位置検出器の平面図。
【図２０】図１９に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図２１】図１９に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図２２】通常の半導体位置検出器の平面図。
【図２３】図２２に示した半導体位置検出器のＡ−Ａ矢印断面図。
【図２４】図２２に示した半導体位置検出器のＢ−Ｂ矢印断面図。
【図２５】スポット光が入射した場合の半導体位置検出器の平面図。
【図２６】図２５に示した通常の半導体位置検出器の等価回路図（図２６（ａ））、及び実施形態に係る半導体位置検出器の等価回路図（図２６（ｂ））。
【図２７】入射光スポット位置Ｘに対する電極５から出力される信号電流Ｉ１，Ｉ２の関係を示すグラフ（図２７（ａ））、及び入射光スポット位置Ｘに対する位置検出誤差の関係を示すグラフ（図２７（ｂ））。
【符号の説明】
２…半導体導電層、１１…副半導体領域。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor position detector (PSD).
[0002]
[Prior art]
A semiconductor position detector (PSD) is an optical sensor that can detect the incident position of light, and is widely applied as a position sensor in combination with a light emitting source such as an LED. Typical applications of the semiconductor position detector include a displacement meter, an autofocus of a lens shutter camera, and the like. These distance detection methods are based on the principle of triangulation, that is, the ratio (L / B) between the distance L between the semiconductor position detector and the object to be measured and the distance (base length) B between the light source and the semiconductor position detector. Is applied to the ratio (f / X) of the distance f between the semiconductor position detector and the condenser lens and the incident position X of light.
[0003]
In the semiconductor position detector described in Japanese Patent Application Laid-Open No. 64-78110, a photocurrent generated according to an incident light position is resistance-divided, and a photodiode region is formed outside a pair of signal extraction electrodes that respectively extract the divided currents. It is equipped and detects incident light from a very close range. However, when the position is detected, the signal extraction electrode blocks the incident light, so that accurate position detection cannot be performed. Further, when the incident light slightly deviates from the photodiode region in the width direction, no output can be obtained.
[0004]
A semiconductor position detector shown in FIGS. 22 to 24 is also known.
[0005]
22 is a plan view of a conventional semiconductor position detector, FIG. 23 is a cross-sectional view of the semiconductor position detector taken along the line AA of FIG. 22, and FIG. 24 is a BB arrow of the semiconductor position detector shown in FIG. It is sectional drawing. On the semiconductor substrate 1, there are formed a main conductive layer 2, a branch conductive layer 3, and a high concentration layer 4 for signal extraction, and an outer frame layer 6 and an outer frame electrode 7 that surround each functional layer, and an isolation that separates them. A layer 6 'is provided. When a reverse bias voltage is applied between the high-concentration layer 8 and the surface layers 2 and 3 through the back electrode 9 and light is incident in this state, charges (hole / electron pairs) are internally generated according to the incident light. ) Occurs. The generated charges are output to the outside through the electrodes 5 provided at both ends so as to be inversely proportional to the position along the base line length direction of the basic conductive layer 2, that is, the resistance value.
[0006]
FIG. 25 is a plan view of the semiconductor position detector when spot light is incident. When spot light enters the semiconductor position detector, it is difficult to improve the position detection performance because the signal extraction electrode 5 blocks the incident light at the end of the light receiving area, and the detectable range is expanded to the desired detection range. I can't let you.
[0007]
[Problems to be solved by the invention]
Therefore, if the light receiving region is extended in the base line length direction and the semiconductor position detector itself is enlarged, incident light originally applied to the signal extraction electrode can be detected. However, when the light receiving region is simply extended in the base line length direction, the position resolution is lowered due to an increase in the length of the semiconductor conductive layer subjected to resistance division. The present invention has been made in view of such problems, and an object thereof is to provide a high-performance semiconductor position detector.
[0008]
[Means for Solving the Problems]
In order to solve the above problems, the semiconductor position detector according to the present invention is output from a pair of signal extraction electrodes provided at both ends of the semiconductor conductive layer in accordance with the incident light position in the base line length direction on the light receiving surface. A semiconductor position detector with a variable current value includes a sub-semiconductor region extending in a width direction perpendicular to the base line length direction from the signal extraction electrode so that incident light can be received. It is characterized by being connected to the signal extraction electrode without passing through the semiconductor conductive layer and located at both ends in the baseline length direction .
In the semiconductor position detector according to the present invention, the current values output from the pair of signal extraction electrodes provided at both ends of the semiconductor conductive layer are variable according to the incident light position in the longitudinal direction of the substrate on the light receiving surface. In the semiconductor position detector, a sub-semiconductor region extending in a width direction perpendicular to the longitudinal direction of the substrate from the signal extraction electrode so as to receive incident light is provided , and the sub-semiconductor region is formed in the longitudinal direction of the light-receiving surface. It is located at both ends in the direction and is connected to the signal extraction electrode without passing through the semiconductor conductive layer .
[0009]
According to the semiconductor position detector of the present invention, since the sub semiconductor region extends in the width direction perpendicular to the base line length direction (longitudinal direction of the substrate) from the signal extraction electrode, the original light receiving surface and the sub semiconductor region are The position of the incident light irradiated to the outside of the light receiving surface is also changed by changing the position of the incident light by taking out the current generated according to the light incident on the semiconductor conductive layer or the sub semiconductor region from the signal extraction electrode. On the other hand, it can detect so that an output current value may continue. In addition, since the sub-semiconductor region is connected to the signal extraction electrode without passing through the semiconductor conductive layer, there is no contribution to the resistance division for position detection, the impurity concentration may be arbitrary, and the position resolution is reduced. Can be suppressed.
[0010]
Furthermore, since the length in the width direction of the sub-semiconductor region is substantially equal to the length in the width direction that contributes to the output of the current on the light receiving surface, the incident light is not lost in the width direction and accurate position detection output is achieved. Obtainable.
[0011]
The light receiving surface is preferably rectangular, and the pair of signal extraction electrodes are preferably connected to a pair of electrode pads disposed on the diagonal line of the light receiving surface, respectively. By using this diagonal arrangement, it is not necessary to confirm the orientation of the electrode pads in the assembly process of the semiconductor position detector, so that the assembly efficiency can be improved.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the semiconductor position detector according to the embodiment will be described. The same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.
[0013]
(First embodiment)
1 is a plan view of the semiconductor position detector according to the first embodiment, FIG. 2 is a cross-sectional view of the semiconductor position detector shown in FIG. 1 taken along the line AA, and FIG. 3 is a view of the semiconductor position detector shown in FIG. It is BB arrow sectional drawing. Note that the cross-sectional view of the semiconductor position detector used for the description shows the end face.
[0014]
The semiconductor position detector according to this embodiment includes a semiconductor substrate 1 made of low-concentration n-type Si and a back-side n-type semiconductor layer 8 made of high-concentration n-type Si formed on the back surface of the semiconductor substrate 1. Yes. The surface of the semiconductor substrate 1 is rectangular.
[0015]
In the following description, the direction from the back surface side n-type semiconductor layer 8 toward the n-type semiconductor substrate 1 is the upward direction, and the extending direction of the long side of the rectangular surface of the n-type semiconductor substrate 1 is the length direction (longitudinal direction) X, The extending direction of the short side is the width direction Y, and the direction perpendicular to both the length direction X and the width direction Y is the depth direction (thickness direction) Z. That is, the directions X, Y, and Z are orthogonal to each other.
[0016]
The semiconductor position detector includes a core conductive layer 2 formed in the semiconductor substrate 1 and extending along the length direction X. The basic conductive layer 2 is made of p-type Si, and the resistivity of the basic conductive layer 2 is lower than the resistivity of the semiconductor substrate 1. The basic conductive layer 2 has a substantially uniform impurity concentration, that is, a resistivity ρ, and extends from the surface of the n-type semiconductor substrate 1 along the thickness direction Z to substantially the same depth.
[0017]
The semiconductor position detector includes a branched conductive layer 3 made of a plurality of p-type semiconductor conductive layers respectively extending from the basic conductive layer 2 along the light receiving surface. The impurity concentration of the branched conductive layer 3 is substantially the same as the impurity concentration of the basic conductive layer 2, and the length along the width direction Y of the branched conductive layer 3 is longer than the diameter of the incident light spot.
[0018]
The branched conductive layer 3 may be made of p-type Si having a higher concentration than the impurity concentration of the basic conductive layer 2. That is, the resistivity of the branched conductive layer 3 is lower than the resistivity of the basic conductive layer 2. In this case, the basic conductive layer 2 is formed of a plurality of p-type resistance regions that are continuous along the length direction X with one end of the branched conductive layer having different impurity concentrations interposed therebetween.
[0019]
Thus, in order to reduce the influence on the detection accuracy of the branched conductive layer 3, it is desirable to increase its impurity concentration and lower the resistivity. However, in this embodiment, the branched conductive layer 3 and The resistivity of the basic conductive layer 2 is substantially the same, and these are manufactured in the same process to shorten the manufacturing time.
[0020]
The semiconductor position detector includes a pair of sub-semiconductor regions 11 formed in the semiconductor substrate 1 adjacent to both ends of the basic conductive layer 2. The sub-semiconductor region 11 is made of p-type Si and extends from the surface of the semiconductor substrate 1 along the thickness direction Z to a position substantially the same as the depth of the basic conductive layer 2.
[0021]
Since the resistivity of the sub-semiconductor region may be arbitrary, the sub-semiconductor region in the present embodiment has substantially the same resistivity as that of the branch conductive layer 3 and the core conductive layer 2 and can be manufactured in the same process. .
[0022]
The semiconductor position detector includes an outer frame semiconductor layer 6 formed on the outer peripheral portion of the rectangular surface of the semiconductor substrate 1. The outer frame semiconductor layer 6 is high-concentration n-type Si. The outer frame semiconductor layer 6 is formed in the outer edge region of the rectangular surface of the semiconductor substrate 1 to form a square shape, and the substrate surface region in which the basic conductive layer 2, the branched conductive layer 3, and the sub semiconductor region 11 are formed. And extends from the surface of the n-type semiconductor substrate 1 along the thickness direction Z to a predetermined depth.
[0023]
The present semiconductor position detector includes a branched conductive layer isolating semiconductor layer 6 ′ formed in the semiconductor substrate 1. The branched conductive layer isolating semiconductor layer 6 ′ is high-concentration n-type Si. The branch conductive layer isolating semiconductor layer 6 ′ is formed from a plurality of n-type branch regions extending in the direction of the core conductive layer 2 along the width direction Y from the inside of the long side of the rectangular outer frame semiconductor layer 6. Become. Each branch region extends along the thickness direction Z from the surface of the n-type semiconductor substrate 1 to a predetermined depth. The n-type branch region is deeper than the p-type branch conductive layer 3 and is interposed between the branch conductive layers 3 and between the branch conductive layer 3 and the sub-semiconductor region 11. Isolated. That is, the branch region prevents current flowing along the length direction X between adjacent ones of the branch conductive layer 3 and between the branch conductive layer 3 and the sub semiconductor region 11.
[0024]
The semiconductor position detector includes a passivation film (insulating film) 10 that covers the rectangular surface of the n-type semiconductor substrate 1. In FIG. 1 and the plan view of the semiconductor position detector according to the following embodiment, the description of the passivation film 10 is omitted. The passivation film 10 has a pair of minute openings (through holes) for signal extraction electrodes at both ends in the lengthwise direction of the basic conductive layer 2 and the sub-semiconductor region 11 part, and has a rectangular opening for the outer frame electrode on the outer periphery. Have in part.
[0025]
The signal extraction electrode 5 is in ohmic contact with the end portion of the basic conductive layer 2 and the sub semiconductor region 11 through a pair of minute openings for signal extraction electrodes of the passivation film 10.
[0026]
In this semiconductor position detector, the sub-semiconductor region 11 is provided adjacent to the outside of the basic conductive layer 2 so as to be able to receive incident light. Light can also be received by a region extending in the width direction of the sub semiconductor region 11.
[0027]
When the main conductive layer 2 and the branched conductive layer 3 are irradiated with incident light spots, the carriers collected by them are respectively passed through both ends of the basic conductive layer 2 so as to be inversely proportional to the resistance division ratio of the basic conductive layer 2. The signal is output from the signal extraction electrode 5.
[0028]
Further, when the incident light spot is irradiated onto the sub semiconductor region 11, the carriers collected by the sub semiconductor region 11 are output from the signal extraction electrode 5 directly connected without passing through the basic conductive layer 2.
[0029]
That is, since the sub semiconductor region 11 extends from the signal extraction electrode 5 in the width direction Y perpendicular to the base line length direction X, the original light receiving surface and the sub semiconductor region 11 are adjacent to each other, and the branched conductive layer 3 Alternatively, by extracting the current generated according to the light incident on the sub-semiconductor region 11 from the signal extraction electrode 5, the position of the incident light irradiated to the outside of the light receiving surface also has an output current value with respect to the incident light position change. It can be detected to be continuous.
[0030]
Further, since the sub-semiconductor region 11 is directly connected to the signal extraction electrode 5, it does not contribute to the resistance division for position detection, so that a decrease in position resolution can be suppressed regardless of the impurity concentration. At the same time, since the length in the width direction of the sub-semiconductor region 11 is substantially equal to the length in the width direction Y that contributes to the output of the current on the light receiving surface, that is, the length of the branched conductive layer 3, the incident light lacks in the width direction. There is nothing.
[0031]
This semiconductor position detector includes an outer frame electrode 7 formed on the n-type outer frame semiconductor layer 6 through an opening for the outer frame electrode of the passivation film 10. The outer frame electrode 7 is in ohmic contact with the outer frame semiconductor layer 6. The outer frame electrode 7 prevents light from entering the outer periphery of the semiconductor substrate 1. In addition, a predetermined voltage can be applied between the outer frame electrode 7 and the signal extraction electrode 5.
[0032]
The semiconductor position detector includes a lower surface electrode 9 formed on the lower surface of the back surface side n-type semiconductor layer 8. The bottom electrode 9 is in ohmic contact with the back side n-type semiconductor layer 8.
[0033]
A state in which a voltage is applied between the pair of signal extraction electrodes 5 and the lower surface electrode 9 so that a reverse bias voltage is applied to a pn junction diode composed of the p-type branched conductive layer 3 and the n-type semiconductor substrate 1 When incident light is incident as a spot light on the light receiving surface defined by the surface region of the n-type semiconductor substrate 1 on which the semiconductor conductive layers 2, 3, and 11 are formed, in the semiconductor position detector according to the incident light. Electron hole pairs (charges) are generated, and one of them flows into the branched conductive layer 3 or the sub-semiconductor region 11 according to the diffusion and the electric field inside the semiconductor position detector.
[0034]
The electric charge flowing into the branched conductive layer 3 is conducted through the branched conductive layer 3 and flows into a predetermined position of the basic conductive layer 2. Depending on the position in the length direction X of the basic conductive layer 2, The amount of charge is distributed so as to be inversely proportional to the resistance value to both ends, and the distributed charge is extracted from each signal extraction electrode 5 via both ends of the basic conductive layer 2 and the sub semiconductor region 11. The electric charge flowing into the sub semiconductor region 11 is taken out from the signal extraction electrode 5 without going through the basic conductive layer 2. By extracting the current generated according to the light incident on the semiconductor conductive layers 2 and 3 or the sub-semiconductor region 11 from both signal extraction electrodes 5, the incident light position can be detected.
[0035]
That is, since the ratio of the current value of the signal current output from each signal extraction electrode 5 changes according to the incident light position, the incident light position can be specified from this.
[0036]
26 shows an equivalent circuit (FIG. 26A) of the normal semiconductor position detector (conventional example) shown in FIG. 25, and an equivalent circuit of the semiconductor position detector according to the above embodiment (FIG. 26B). )). In the figure, P is a current source, D is an ideal diode, Cj is a junction capacitance, Rsh is a parallel resistance, and Rp is a resistance value due to the core conductive layer. Note that the limit positions in the baseline length direction where the incident light is not blocked by the signal extraction electrode are XL and -XL. As shown in the figure, since the semiconductor position detector according to the embodiment can detect the position even when light is incident on the sub-semiconductor region 11, the position detection of the incident light compared to the conventional case. The range can be expanded.
[0037]
27 is a graph showing the relationship between the signal currents I1 and I2 output from the electrode 5 with respect to the incident light spot position X (FIG. 27A), and a graph showing the relationship between the position detection error with respect to the incident light spot position X (FIG. FIG. 27 (b)). In the conventional example, when light is incident on the outside of the position XL or -XL, the signal current is significantly reduced due to the lack of the incident light spot. On the other hand, in the present embodiment, since the sub semiconductor region 11 functions to collect incident light corresponding to the position of the chip, such a situation is suppressed. In this embodiment, the position detection error in this region is also reduced compared to the conventional example.
[0038]
As described above, the semiconductor position detector according to the present embodiment has a pair of signal extraction electrodes provided at both ends of the semiconductor conductive layer 2 in accordance with the incident light position in the base line length direction X on the light receiving surface. In the semiconductor position detector in which the current value output from 5 is variable, the sub-semiconductor region 11 extending in the width direction Y perpendicular to the baseline length direction from the signal extraction electrode 5 so as to be able to receive incident light is fundamental. The length in the width direction Y of the sub-semiconductor region 11 provided outside the conductive layer 2 is substantially equal to the width direction Y contributing to the output of current on the light receiving surface, that is, the length of the branched conductive layer 3. Note that the sub-semiconductor region 11 may be provided in only one of the both end portions.
[0039]
In addition, when the light receiving region of the conventional semiconductor position detector is simply extended along the baseline length direction (X), the position resolution is reduced due to an increase in the length of the semiconductor conductive layer divided by resistance. In the embodiment, since the sub-semiconductor region 11 is directly connected to the signal extraction electrode 5, there is no contribution to resistance division for position detection, and a decrease in position resolution can be suppressed.
[0040]
(Second Embodiment)
4 is a plan view of the semiconductor position detector according to the second embodiment, FIG. 5 is a cross-sectional view taken along the line AA of the semiconductor position detector shown in FIG. 4, and FIG. 6 is a view of the semiconductor position detector shown in FIG. It is BB arrow sectional drawing.
[0041]
This embodiment is different from the semiconductor position detector of the first embodiment only in that the semiconductor conductive layer 12 is used instead of the semiconductor conductive layers 2 and 3. The semiconductor conductive layer 12 has a zigzag shape that obliquely intersects the position detection (base line length) direction (X) in the light receiving surface. Carriers generated in response to incident light are collected on the semiconductor conductive layer 12 without an indirect light collecting means such as a branched conductive layer, so that direct position detection can be performed. It should be noted that the isolation layer 6 ′ prevents a current that flows parallel to the X direction between the separated portions of the conductive layer 12 as in the above embodiment.
[0042]
In the present embodiment, the length in the width direction of the sub semiconductor region 11 is substantially equal to the length between the vertices in the width direction of the semiconductor layer 12.
[0043]
(Third embodiment)
7 is a plan view of the semiconductor position detector according to the third embodiment, FIG. 8 is a cross-sectional view of the semiconductor position detector shown in FIG. 7 taken along the line AA, and FIG. 9 is a view of the semiconductor position detector shown in FIG. It is BB arrow sectional drawing.
[0044]
The semiconductor position detector of the present embodiment is a semiconductor conductive layer 13 that is different from the semiconductor position detector of the second embodiment only in the shape of the semiconductor conductive layer 12.
[0045]
That is, in this semiconductor position detector, the semiconductor conductive layer 13 is formed only at one end of a plurality of linear portions extending perpendicular to the position detection direction (X) in the light receiving surface and adjacent ones of the linear portions. Are connected to each other along the position detection direction. Also in the present embodiment, carriers generated in response to incident light are collected by the semiconductor conductive layer 13 without intervening light collecting means such as a branched conductive layer.
[0046]
In the present embodiment, the length in the width direction of the sub semiconductor region 11 is substantially equal to the length in the width direction of the semiconductor layer 13.
[0047]
(Fourth embodiment)
FIG. 10 is a plan view of the semiconductor position detector according to the fourth embodiment, FIG. 11 is a cross-sectional view of the semiconductor position detector shown in FIG. 10 taken along the line AA, and FIG. 12 is the semiconductor position detector shown in FIG. It is BB arrow sectional drawing.
[0048]
In the present embodiment, the shape of the semiconductor conductive layers 2 and 3 in the first embodiment is changed so that the basic conductive layer 2 has a fishbone shape passing through the center in the width direction, and the basic conductive layer 2 and the sub-semiconductor region 11 are integrated. Signal extraction extending across the upper surface of the passivation film 10 from the electrode 5 in ohmic contact with the end portion of the basic conductive layer 2 and the sub-semiconductor region 11 through minute openings (through holes) provided at both ends of the conductive layer 2 The semiconductor position detector of the first embodiment is different from the semiconductor position detector of the first embodiment only in that a wiring film 5 ′ is further provided. The ends of the pair of signal extraction wiring films 5 'constitute a pair of electrode pads, and these electrode pads are located on the diagonal line of the rectangular light receiving surface. By using this diagonal arrangement, it is not necessary to confirm the orientation of the electrode pads in the assembly process of the semiconductor position detector, so that the assembly efficiency can be improved.
[0049]
(Fifth embodiment)
13 is a plan view of a semiconductor position detector according to the fifth embodiment, FIG. 14 is a cross-sectional view of the semiconductor position detector shown in FIG. 13 taken along the line AA, and FIG. 15 is a view of the semiconductor position detector shown in FIG. It is BB arrow sectional drawing.
[0050]
In this embodiment, the semiconductor layer 12 and the sub-semiconductor region 11 in the second embodiment are integrated, and one signal extraction electrode in ohmic contact with the end of the semiconductor layer 12 and the sub-semiconductor region 11 through a minute opening (through hole). 5 differs from the semiconductor position detector of the second embodiment only in that a signal extraction wiring film 5 ′ extending from 5 to the upper surface of the passivation film 10 is further provided. The end portion of the one signal extraction wiring film 5 ′ constitutes an electrode pad, and the other signal extraction electrode 5 itself constitutes an electrode pad. Therefore, also in this embodiment, these electrode pads are diagonally arranged, and assembly efficiency can be improved.
[0051]
(Sixth embodiment)
16 is a plan view of a semiconductor position detector according to the sixth embodiment, FIG. 17 is a cross-sectional view of the semiconductor position detector shown in FIG. 16 taken along the line AA, and FIG. 18 is a view of the semiconductor position detector shown in FIG. It is BB arrow sectional drawing.
[0052]
In the present embodiment, the semiconductor layer 13 and the sub-semiconductor region 11 in the third embodiment are integrated, a minute opening (through hole) is started, and one signal at an end portion in ohmic contact with the semiconductor layer 13 and the sub-semiconductor region 11 The only difference from the semiconductor position detector of the third embodiment is that a signal extraction wiring film 5 ′ extending from the extraction electrode 5 across the upper surface of the passivation film 10 is further provided. The end portion of the one signal extraction wiring film 5 ′ constitutes an electrode pad, and the other signal extraction electrode 5 itself constitutes an electrode pad. Therefore, also in this embodiment, these electrode pads are diagonally arranged, and assembly efficiency can be improved.
[0053]
(Seventh embodiment)
19 is a plan view of a semiconductor position detector according to the seventh embodiment, FIG. 20 is a cross-sectional view of the semiconductor position detector shown in FIG. 19 taken along the line AA, and FIG. 21 is a view of the semiconductor position detector shown in FIG. It is BB arrow sectional drawing.
[0054]
The semiconductor position detector of this embodiment is different from the semiconductor position detector of the second embodiment in that only the shape of the semiconductor conductive layer 12 is changed to a semiconductor conductive layer 14, and the semiconductor conductive layer 14 and the sub semiconductor region 11 are changed. It is an integrated one.
[0055]
That is, in this semiconductor position detector, the semiconductor conductive layer 14 is composed of a plurality of linear portions extending in a stripe shape along the position detection direction (X) in the light receiving surface. In addition, the detector includes a semiconductor layer 15 for semiconductor conductive layer isolation formed in the semiconductor substrate 1. The semiconductor conductive layer isolating semiconductor layer 15 is high-concentration n-type Si, and is interposed between the semiconductor conductive layers 14 to block current flowing between those adjacent to each other.
[0056]
The signal extraction electrodes 5 are in ohmic contact with the end portions of the semiconductor conductive layers 14 and the sub semiconductor regions through the through holes of the passivation film 10, and the end portions of the respective signal extraction electrodes 5 constitute electrode pads.
[0057]
【The invention's effect】
As described above, the semiconductor position detector according to the present invention has a predetermined sub-semiconductor region adjacent to the semiconductor conductive layer, thereby preventing incident light from being lost due to the signal extraction electrode at the end of the semiconductor conductive layer. Therefore, position detection can be performed with high accuracy without lowering the position resolution. Further, since the resistivity of the sub semiconductor region may be arbitrary, it can be formed simultaneously with the semiconductor conductive layer and is inexpensive.
[Brief description of the drawings]
FIG. 1 is a plan view of a semiconductor position detector according to a first embodiment.
FIG. 2 is a cross-sectional view of the semiconductor position detector shown in FIG.
3 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 4 is a plan view of a semiconductor position detector according to a second embodiment.
5 is a cross-sectional view of the semiconductor position detector shown in FIG.
6 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 7 is a plan view of a semiconductor position detector according to a third embodiment.
8 is a cross-sectional view of the semiconductor position detector shown in FIG.
9 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 10 is a plan view of a semiconductor position detector according to a fourth embodiment.
11 is a cross-sectional view of the semiconductor position detector shown in FIG.
12 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 13 is a plan view of a semiconductor position detector according to a fifth embodiment.
14 is a cross-sectional view of the semiconductor position detector shown in FIG.
15 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 16 is a plan view of a semiconductor position detector according to a sixth embodiment.
17 is a cross-sectional view of the semiconductor position detector shown in FIG.
18 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 19 is a plan view of a semiconductor position detector according to a seventh embodiment.
20 is a cross-sectional view of the semiconductor position detector shown in FIG.
21 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 22 is a plan view of a normal semiconductor position detector.
23 is a cross-sectional view of the semiconductor position detector shown in FIG. 22 taken along the line AA.
24 is a cross-sectional view of the semiconductor position detector shown in FIG.
FIG. 25 is a plan view of a semiconductor position detector when spot light is incident.
26 is an equivalent circuit diagram (FIG. 26A) of the normal semiconductor position detector shown in FIG. 25, and an equivalent circuit diagram of the semiconductor position detector according to the embodiment (FIG. 26B).
FIG. 27 is a graph (FIG. 27A) showing a relationship between signal currents I1 and I2 output from the electrode 5 with respect to the incident light spot position X, and a graph showing a relationship between position detection errors with respect to the incident light spot position X; FIG. 27 (b)).
[Explanation of symbols]
2 ... Semiconductor conductive layer, 11 ... Sub-semiconductor region.

Claims

Incident light can be received in a semiconductor position detector that varies the current value output from a pair of signal extraction electrodes provided at both ends of the semiconductor conductive layer according to the incident light position in the base line length direction on the light receiving surface. And a sub-semiconductor region extending from the signal extraction electrode in a width direction perpendicular to the base-line length direction, the sub-semiconductor regions being located at both ends of the light-receiving surface in the base-line length direction, and The semiconductor position detector is connected to the signal extraction electrode without passing through the semiconductor conductive layer .

A semiconductor position detector that varies the current value output from a pair of signal extraction electrodes provided at both ends of the semiconductor conductive layer according to the position of the incident light in the longitudinal direction of the substrate on the light receiving surface. A sub-semiconductor region extending in the width direction perpendicular to the longitudinal direction of the substrate from the signal extraction electrode as possible, the sub-semiconductor region being located at both ends of the light-receiving surface in the longitudinal direction; and The semiconductor position detector is connected to the signal extraction electrode without passing through the semiconductor conductive layer .

3. The semiconductor position detector according to claim 1, wherein a length in the width direction of the sub semiconductor region is substantially equal to a length in the width direction of the light receiving surface that contributes to the output of the current. .

The said light-receiving surface is a rectangle, The said pair of signal extraction electrodes are each connected to a pair of electrode pad arrange | positioned on the diagonal of the said light-receiving surface, The Claim 1 or 2 characterized by the above-mentioned. Semiconductor position detector.