JP4179294B2 - Radio wave receiver - Google Patents

Description

The present invention relates to a radio wave receiving apparatus that detects a received signal and outputs a detected signal.

  Currently, in each country (for example, Germany, UK, Switzerland, Japan, etc.), long-wave standard radio waves containing time information, that is, time codes are transmitted. In Japan (Japan), long-wave standard radio waves of 40 kHz and 60 kHz in which the time code is amplitude-modulated are transmitted from two transmitting stations (Fukushima Prefecture and Saga Prefecture). The time code is transmitted in a 60-second frame every time an accurate minute digit is updated, that is, every minute.

  In recent years, so-called radio timepieces have been put into practical use that receive such time-code standard radio waves and thereby correct the current time. A radio-controlled timepiece receives a standard radio wave via a built-in antenna, decodes the time code by performing amplitude and detection, and corrects the current time.

  By the way, the reception signal actually received by the radio clock is a signal in which various signals (noise) are mixed and superimposed on the standard radio wave transmitted from the transmission station in the transmission process from the transmission station to the radio clock. For this reason, it is common to use a filter to remove noise. However, since the filter has a predetermined pass band, noise components in the vicinity of the frequency that is originally desired to pass are also allowed to pass. End up. In addition, the narrower the pass band of the filter, the longer the delay time is generated, which affects subsequent signal processing and the like.

Therefore, a technique disclosed in Patent Document 1 is known as a technique for reducing noise and reducing delay time as much as possible. According to this technique, a signal obtained by multiplying a signal obtained by delaying the phase of the intermediate frequency signal by 90 degrees and a carrier signal having the same frequency and the same phase as the carrier wave and further delaying the multiplied signal by 90 degrees By adding the signals obtained by multiplying the frequency signal and the carrier signal, it is possible to obtain a reproduction signal in which the noise component is canceled.
JP 2004-140510 A

  However, even with the technique according to Patent Document 1, there may occur a case where the noise component cannot be canceled reliably. FIG. 10A shows a signal characteristic in which the phase of the I signal (In Phase) in the received signal is changed by the phase shift means, and the phase of the Q signal (Quadrature) in the received signal is changed by the other phase shift means. FIG. 6 is a diagram schematically showing the signal characteristics. According to FIG. 10A, the I signal and the Q signal can have a phase difference of about 90 ° within the frequency frq1 to frq2. FIG. 10B is a diagram schematically showing a noise spectrum for a carrier signal. In the figure, a solid line represents a carrier wave in a received signal, and a dotted line represents noise. According to FIG. 10B, the sign of the spectrum of the noise is inverted with respect to the frequency axis before and after the frequency of the carrier wave.

  As shown in FIG. 10A, the received signal has a characteristic that the phase is delayed as the frequency increases. Here, according to the technique of Patent Document 1, a circuit design is made with reference to the frequency of the carrier wave and taking into account the phase delay with respect to the frequency. However, the frequency of noise extracted from the received signal is not necessarily the frequency of the carrier wave. As shown in FIG. 10B, the signs of the noise spectrum are inverted when the frequency is higher than the frequency of the carrier wave and when the frequency is lower than the frequency of the carrier wave. In other words, when the extracted noise is added to cancel the noise component included in the received signal, it may be canceled, but conversely, noise may be further superimposed.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to more reliably cancel noise mixed and superimposed on a received signal.

In order to solve the above problem, the radio wave receiver according to claim 1 is:
Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
First differentiating means for differentiating the first phase-shifted signal output by the first phase-shifting means and outputting it as a first differential signal;
Second differential means for differentiating the second phase shift signal output by the second phase shift means and outputting it as a second differential signal;
The addition is performed by determining whether the phase of the first differential signal output by the first differential means and the phase of the second differential signal output by the second differential signal are in-phase or anti-phase. Discriminating which of the addition signal output by the means and the subtraction signal output by the subtraction means is a signal from which the noise has been canceled, and outputting the detected signal from which the noise has been canceled as a detection signal Output means;
It is characterized by having.

The radio wave receiver of the invention according to claim 2 is:
Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
First differentiating means for differentiating the first phase-shifted signal output by the first phase-shifting means and outputting it as a first differential signal;
Second differential means for differentiating the second phase shift signal output by the second phase shift means and outputting it as a second differential signal;
Multiplying means for multiplying the first differential signal output by the first differentiating means by the second differential signal output by the second differential signal and outputting as a differential multiplication signal;
By comparing the differential multiplication signal output by the multiplication means with a predetermined voltage, it is determined whether the phase of the first differential signal and the phase of the second differential signal are in-phase or anti-phase, It is determined which of the addition signal output by the addition means and the subtraction signal output by the subtraction means is a signal from which noise has been canceled, and the determined noise-cancelled signal is output as a detection signal. Discriminating output means,
It is characterized by having.

The radio wave receiver of the invention according to claim 3 is:
Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
An addition signal overall level determination unit that determines the signal level of the entire addition signal from the addition signal output by the addition unit, and outputs the addition signal overall level signal;
A subtraction signal overall level determination means for determining a signal level of the entire subtraction signal from the subtraction signal output by the subtraction means, and outputting as a subtraction signal overall level signal;
By determining the magnitude relationship between the added signal overall level signal output by the added signal overall level determining unit and the subtracted signal overall level signal output by the subtracted signal overall level determining unit, the added signal is output by the adding unit. Discrimination output means for discriminating which signal of the addition signal and the subtraction signal output by the subtraction means is a signal from which noise has been canceled, and outputting the determined noise-cancelled signal as a detection signal;
It is characterized by having.

The radio wave receiver of the invention according to claim 4 is:
Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
A high level for comparing one of the addition signal output by the adding means and the subtraction signal output by the subtracting means with a high level threshold value that is predetermined above the maximum voltage of the ideal detection signal Threshold comparison means;
A low level threshold comparing means for comparing the one signal with a low level threshold set in advance below the lowest voltage of the ideal detection signal;
Based on the comparison result of the high level threshold value comparison means and the low level threshold value comparison means, any signal of the addition signal output by the addition means and the subtraction signal output by the subtraction means is a signal from which noise has been canceled. Discriminating output means for outputting a signal in which the determined noise is canceled as a detection signal;
It is characterized by having.

According to the first aspect of the present invention, in the radio wave receiver, the carrier signal phase is shifted by 90 degrees, and the carrier phase multiplied signal obtained by multiplying the carrier signal to block the high frequency component is shifted by (A + 90) degrees. And a first phase shift signal obtained by shifting the multiplication signal obtained by multiplying the reception signal and the carrier signal and blocking the high frequency component by A degrees. Then, an addition signal obtained by adding the first phase shift signal and the second phase shift signal and a subtraction signal obtained by subtracting the other from one of the first phase shift signal and the second phase shift signal are generated. And determining whether the phase of the first differential signal obtained by differentiating the first phase-shifted signal and the phase of the second differential signal obtained by differentiating the second phase-shifted signal are in-phase or anti-phase. And the subtraction signal are discriminated as noise-cancelled signals, and the discriminated signals are output as detection signals. Therefore, it is possible to obtain a detection signal in which the noise mixed and superimposed on the reception signal is canceled reliably regardless of whether the noise frequency exceeds or falls below the carrier frequency of the reception signal.

According to the second aspect of the present invention, in the radio wave receiver, the phase of the carrier signal is shifted by 90 degrees, and the carrier phase multiplied signal obtained by multiplying the carrier signal and blocking the high frequency component is shifted by (A + 90) degrees. And a first phase shift signal obtained by shifting the multiplication signal obtained by multiplying the reception signal and the carrier signal and blocking the high frequency component by A degrees. Then, an addition signal obtained by adding the first phase shift signal and the second phase shift signal and a subtraction signal obtained by subtracting the other from one of the first phase shift signal and the second phase shift signal are generated. The differential signal obtained by multiplying the first differential signal obtained by differentiating the first phase-shifted signal and the second differential signal obtained by differentiating the second phase-shifted signal is compared with the predetermined voltage, It is determined which signal of the subtraction signal is a signal from which noise has been canceled, and the determined signal is output as a detection signal. Therefore, it is possible to obtain a detection signal in which the noise mixed and superimposed on the reception signal is canceled reliably regardless of whether the noise frequency exceeds or falls below the carrier frequency of the reception signal.

According to the third aspect of the present invention, in the radio wave receiver, the carrier signal phase is shifted by 90 degrees, and the carrier signal multiplied by the carrier signal to block the high frequency component is shifted by (A + 90) degrees. And a first phase shift signal obtained by shifting the multiplication signal obtained by multiplying the reception signal and the carrier signal and blocking the high frequency component by A degrees. Then, an addition signal obtained by adding the first phase shift signal and the second phase shift signal and a subtraction signal obtained by subtracting the other from one of the first phase shift signal and the second phase shift signal are generated. By determining the magnitude relationship between the added signal overall level signal, which is the signal level signal of the entire added signal, and the subtracted signal overall level signal, which is the signal level signal of the entire subtracted signal, Which signal is a signal from which noise has been canceled is determined, and the determined signal is output as a detection signal. That is, of the addition signal and the subtraction signal, the level of the entire signal on which noise is mixed / superposed is higher than the level of the other signal in the peak value or effective value, for example. For this reason, it is possible to determine which signal is a signal from which noise has been canceled, based on the magnitude relationship between the levels of the entire signals of the addition signal and the subtraction signal. Therefore, it is possible to obtain a detection signal in which the noise mixed and superimposed on the reception signal is canceled reliably regardless of whether the noise frequency exceeds or falls below the carrier frequency of the reception signal.

According to the fourth aspect of the present invention, in the radio wave receiver, the carrier signal phase shifted by 90 degrees, and the carrier signal multiplied by the carrier signal to block the high frequency component is shifted by (A + 90) degrees. And a first phase shift signal obtained by shifting the multiplication signal obtained by multiplying the reception signal and the carrier signal and blocking the high frequency component by A degrees. Then, an addition signal obtained by adding the first phase shift signal and the second phase shift signal and a subtraction signal obtained by subtracting the other from one of the first phase shift signal and the second phase shift signal are generated. A high level threshold value that is predetermined above the maximum voltage of the ideal detection signal, or a low value that is predetermined below the minimum voltage of the ideal detection signal. The level threshold value is compared, and based on the comparison result, it is determined which of the addition signal and the subtraction signal is a signal from which noise has been canceled, and the determined signal is output as a detection signal. That is, of the addition signal and the subtraction signal, the level of the signal with noise mixed or superimposed exceeds the maximum level of the ideal detection signal or falls below the minimum level depending on the noise, and the noise is canceled. The level of the other signal generated does not exceed the maximum level of the ideal detection signal, nor does it fall below the minimum level. For this reason, by comparing either one of the addition signal and the subtraction signal with the high level threshold value or the low level threshold value, it is possible to determine which of the addition signal and the subtraction signal is a signal from which noise has been canceled. Therefore, it is possible to obtain a detection signal in which the noise mixed and superimposed on the reception signal is canceled reliably regardless of whether the noise frequency exceeds or falls below the carrier frequency of the reception signal.

  The preferred embodiments of the present invention will be described below with reference to the drawings, but the application of the present invention is not limited thereto.

[First Embodiment]
First, the first embodiment will be described.

<Radio watch>
FIG. 1 is a block diagram showing an internal configuration of the radio timepiece 1 in the first embodiment. According to the figure, the radio timepiece 1 includes a CPU (Central Processing Unit) 100, an input unit 200, a display unit 300, a ROM (Read Only Memory) 400, a RAM (Random Access Memory) 500, and reception control. Unit 600, time code generation unit 700, timing circuit unit 800, and oscillation circuit unit 820. Each unit except for the oscillation circuit unit 820 is connected by a bus B, and the oscillation circuit unit 820 is connected to the timing circuit unit 800.

  The CPU 100 reads out a program stored in the ROM 400 in accordance with a predetermined timing or an operation signal input from the input unit 200, develops it in the RAM 500, and instructs each unit constituting the radio timepiece 1 based on the program. Perform data transfer. Specifically, for example, the reception control unit 600 is controlled at predetermined time intervals to execute standard radio wave reception processing, and the time measuring circuit unit 800 counts time based on the standard time code input from the time code generation unit 700. Correct the current time data.

  The input unit 200 includes switches for executing various functions of the radio timepiece 1, and outputs corresponding operation signals to the CPU 100 when these switches are operated. The display unit 300 is configured with a small liquid crystal display or the like, and displays the current time and the like based on a display signal input from the CPU 100.

  The ROM 400 stores system programs and application programs for the radio timepiece 1, programs and data for realizing the present embodiment, and the like. The RAM 500 is used as a work area for the CPU 100, and temporarily stores programs, data, and the like read from the ROM 400.

  The reception control unit 600 includes a radio wave receiving device 620. The radio wave receiver 620 cuts unnecessary frequency components of the long wave standard radio wave received by the receiving antenna, extracts the corresponding frequency signal, converts it to an electric signal, and outputs it to the time code generator 700.

  The time code generator 700 converts the electrical signal input from the radio wave receiver 620 into a digital signal, and generates a standard time code including data necessary for a clock function such as a standard time code, an integration code, and a day code. It outputs to CPU100.

  The clock circuit unit 800 counts the signal input from the oscillation circuit unit 820, clocks the current time, and outputs the current time data to the CPU 100. The oscillation circuit unit 820 always outputs a clock signal having a constant frequency.

<Radio wave receiver>
FIG. 2 is a block diagram showing a circuit configuration of the superheterodyne radio wave receiving device 620 according to this embodiment. According to the figure, the radio wave receiver 620 includes a receiving antenna ANT1, an RF amplifier circuit 11, filter circuits 12, 15, and 17, a frequency conversion circuit 13, a local oscillation circuit 14, an IF amplifier circuit 16, An AGC circuit 18 and a detection circuit 20A are provided.

  The reception antenna ANT1 is configured by, for example, a bar antenna, receives a longwave standard radio wave having a predetermined frequency including a time code, converts the received longwave standard radio wave into an electrical signal, and outputs the electrical signal.

  The RF amplifier circuit 11 amplifies (or attenuates) the signal input from the receiving antenna ANT1 according to the control signal input from the AGC circuit 18 and outputs the amplified signal.

  The filter circuit 12 is composed of a band-pass filter or the like, and allows a signal input from the RF amplifier circuit 11 to pass a frequency in a predetermined mid-range, cuts off a frequency component outside the range, and outputs the signal.

  The frequency conversion circuit 13 synthesizes the signal input from the filter circuit 12 and the local oscillation frequency signal (local oscillation signal) input from the local oscillation circuit 14 and converts them to an intermediate frequency signal (intermediate frequency signal). And output. The local oscillation circuit 14 generates a local oscillation signal and outputs it to the frequency conversion circuit 13.

  The filter circuit 15 allows the intermediate frequency signal input from the frequency conversion circuit 13 to pass a frequency in a predetermined mid-range, cuts out the frequency component outside the range, and outputs the signal.

  The IF amplifier circuit 16 amplifies (or attenuates) the signal input from the filter circuit 15 in accordance with the control signal input from the AGC circuit 18 and outputs the amplified signal.

  The filter circuit 17 allows a signal input from the IF amplifier circuit 16 to pass through a predetermined mid-range frequency, blocks out-of-range frequency components, and outputs the signal S.

  The AGC circuit 18 outputs a control signal for adjusting the amplification degree of the RF amplifier circuit 11 and the IF amplifier circuit 16 according to the strength of the signal S input from the filter circuit 17.

  The detection circuit 20A includes a carrier extraction circuit 30 and a signal regeneration circuit 40A, detects the signal S input from the filter circuit 17, and outputs the detection signal as a signal P. The signal P output from the detection circuit 20A is input to the time code generation unit 700 and used for correcting the current time.

<Detection circuit>
FIG. 3 is a block diagram showing a circuit configuration of the detection circuit 20A. According to the figure, the detection circuit 20A includes a carrier extraction circuit 30 and a signal reproduction circuit 40A. The carrier extraction circuit 30 includes a carrier reproduction circuit 31, a phase shifter 32, a multiplication circuit 33, and LPFs 34 and 35.

  The carrier recovery circuit 31 is configured by a PLL circuit or the like, and generates and outputs a carrier signal having the same frequency and the same phase as the carrier (carrier wave) of the received signal based on the signal c input from the LPF 35.

  The phase shifter 32 delays (shifts) the phase of the signal input from the carrier reproduction circuit 31 and outputs the delayed signal.

  The multiplier circuit 33 multiplies the signal S input from the filter circuit 17 and the signal input from the phase shifter 32, and outputs the result as a signal a.

  The LPF 34 passes a frequency in a predetermined low frequency range with respect to the signal a input from the multiplication circuit 33, blocks out frequency components outside the range, and outputs the signal b.

  The LPF 35 passes a frequency in a predetermined low frequency range with respect to the signal b input from the LPF 34, cuts off a frequency component outside the range, and outputs it as a signal c.

  The signal reproduction circuit 40A includes a multiplication circuit 41, an LPF 42, a phase shift circuit 43, an adder 44, a subtracter 45, and a discrimination output circuit 50A.

  The multiplier circuit 41 multiplies the signal S input from the filter circuit 17 and the signal input from the carrier recovery circuit 31 and outputs the result as a signal d. The LPF 42 passes a frequency in a predetermined range with respect to the signal d input from the multiplication circuit 41, blocks out-of-range frequency components, and outputs the signal e.

  The phase shift circuit 43 includes a phase shifter 43a and a phase shifter 43b. The phase shift circuit 43 is realized by a known broadband phase shift circuit. As a specific example, for example, one input signal proposed by Bedrosian has a different A degree (α [rad]) phase and an (A + 90) degree ((α + π / 2) [rad]) phase. For example, a circuit that outputs different signals may be used.

  The phase shifter 43a delays the phase of the signal e input from the LPF 42 by α [rad] and outputs it as a signal f. The phase shifter 43b delays the phase of the signal b input from the LPF 34 by (π / 2 + α) [rad] and outputs it as a signal g. Therefore, the signal g is a signal whose phase is delayed by π [rad] (that is, 180 degrees) with respect to the signal f.

  Here, the phase “α” shifted by each of the phase shifters 43a and 43b is, for example, the phase shifters 43a and 43b as shown in the phase change (A °) of the I signal and the Q signal shown in FIG. This is due to the phase characteristics of each. 10A, the phase difference between the phase phs4 of the I signal and the phase phs2 of the Q signal at the frequency frq1 is 90 °, and the phase difference between the phase phs3 of the I signal and the phase phs1 of the Q signal at the frequency frp2 is 90 °.゜. It can be seen that the phase difference between the I signal and the Q signal is 90 ° in the range of the frequencies frq1 to frq2. That is, the signal characteristic obtained by changing the phase of the I signal in the received signal by the phase shift means and the signal obtained by changing the phase of the Q signal in the received signal by the other phase shift means are about 90 ° in a certain range of frequencies. Have a phase difference. As shown in FIG. 10A, the desired reception signal (reception signal) has a characteristic that the phase is delayed as the frequency increases. “Α” corresponds to a delayed phase with respect to the detection output signal of the carrier wave of the desired reception signal generated in order to maintain a 90 ° phase difference from these phase characteristics. The phase shift circuit 43 is a broadband phase circuit. Therefore, a signal in a certain frequency range including the frequency can be surely shifted by 90 degrees. For this reason, it is possible to shift a signal including noise that is not necessarily the frequency of the carrier wave by 90 degrees for each approximate noise.

  The adder 44 adds the signal f input from the phase shifter 43a and the signal g input from the phase shifter 43b, and outputs the result as a signal h1. The subtracter 45 subtracts the signal g input from the phase shifter 43b from the signal f input from the phase shifter 43a, and outputs the result as a signal h2.

  The discrimination output circuit 50A includes differentiating circuits 51, 53, LPFs 52, 54, 59, a multiplier 55, a comparator 56, and a switch 58A. The discrimination output circuit 50A receives the signal h1 input from the adder 44 and the subtractor 45. It is determined which signal of the input signal h2 is a signal whose noise has been canceled, and the determined signal is output.

  The differentiating circuit 51 time-differentiates the signal f input from the phase shifter 43a and outputs it as a signal i. The LPF 52 passes a frequency in a predetermined low frequency range with respect to the signal i input from the differentiating circuit 51, cuts off a frequency component outside the range, and outputs it as a signal j.

  The differentiating circuit 53 time-differentiates the signal g input from the phase shifter 43b and outputs it as a signal k. The LPF 54 passes a frequency in a predetermined low frequency range with respect to the signal k input from the differentiating circuit 53, blocks out-of-range frequency components, and outputs the signal l.

  The multiplier 55 multiplies the signal j input from the LPF 52 and the signal l input from the LPF 54 and outputs the result as a signal m.

  The comparator 56 compares the level of the signal m input from the multiplier 55 with the predetermined level V1, and outputs a signal n corresponding to the comparison result. Specifically, if the level of the signal m is greater than the predetermined level V1, a high level signal is output as the signal n, and if not, a low level signal is output as the signal n.

  The switch 58A is connected to the terminal 58a or the terminal 58b according to the signal n input from the comparator 56, and outputs the signal h1 or the signal h2 as the signal h. Specifically, when the signal n is a high level signal, the signal n is connected to the terminal 58b and the signal h2 is output as the signal h. When the signal n is a low level signal, the signal n is connected to the terminal 58a and the signal h1 is output as the signal h.

  The LPF 59 passes a frequency in a predetermined low frequency range with respect to the signal h input from the switch 58A, cuts off a frequency component outside the range, and outputs it as a signal P. This signal P becomes an output signal from the detection circuit 20A.

上式（１）において、Δωは受信希望信号の搬送波との周波数の差であり、φは受信希望信号との位相差である。 Subsequently, the operation of each part constituting the detection circuit 20A will be described using logical expressions of the respective signals.
The signal S input from the filter circuit 17 includes a reception desired signal (a signal having a frequency that is originally desired to be received. Here, it is a long wave standard radio wave) and noise. The frequency of the carrier wave of the desired signal to be received is ω, and the signal wave is “Asin ω”. Here, although the amplitude A is a time function, it changes in a very long cycle with respect to a desired reception signal which is a long wave standard radio wave, and has a modulation factor of 10% or 100%. For this reason, the amplitude A can be regarded as a substantially constant. Therefore, the signal S can be expressed by combining the amplitude component A of the desired signal to be received and the noise amplitude component B as shown in the following equation (1).

In the above equation (1), Δω is a frequency difference from the carrier wave of the desired reception signal, and φ is a phase difference from the desired reception signal.

  First, generation of a carrier signal in the carrier extraction circuit 30 will be described. In the carrier extraction circuit 30, the signal output from the carrier reproduction circuit 31 is “sin (ωt + δ)”. Here, δ is a phase difference (phase shift) from the reception desired signal. Then, since the signal output from the phase shifter 32 is a signal obtained by advancing the phase ω of this signal by “π / 2 (90 degrees)”, it becomes “cos (ωt + δ)”.

The multiplication circuit 33 multiplies the signal “cos (ωt + δ)” output from the phase shifter 32 and the signal S, and outputs the result as a signal a. Therefore, the signal a is given by the following equation (2).

The signal a passes through the LPF 34, and a high frequency component is cut off, and is output as a signal b represented by the following equation (3).

  Since the signal b generally changes slowly, the control voltage corresponding to the phase difference between the signal S and the signal output from the carrier reproduction circuit 31 is passed through the LPF 35 as the signal c. Is output. Then, the signal b is fed back to the carrier recovery circuit 31 and phase correction is performed, whereby the phase shift of “δ” in the signal output from the carrier recovery circuit 31 is corrected and converges to “sin ωt”. That is, the signal output from the carrier reproduction circuit 31 is a signal (carrier signal) having the same frequency and the same phase as the received signal. The signal output from the phase shifter 32 is “cos ωt”.

Next, generation of a detection signal in the detection circuit 20A will be described.
In the carrier extraction circuit 30, the multiplication circuit 33 multiplies the signal S by the “cosωt” signal input from the phase shifter 32 and outputs the result as a signal a. Therefore, the signal a is expressed by the following equation (4).

This signal a passes through the LPF 34, and a high frequency component is cut off, and is output as a signal b expressed by the following equation (5).

In the signal reproduction circuit 40A, the multiplication circuit 41 multiplies the signal S and the “sin ωt” signal input from the carrier reproduction circuit 31 and outputs the result as a signal d. Therefore, the signal d is expressed by the following equation (6).

The signal d passes through the LPF 42, and a high frequency component is cut off, and is output as a signal e expressed by the following equation (7).

Then, the phase shifter 43a advances the phase of the signal e by (−α) [rad] and outputs it as a signal f. Therefore, the signal f is expressed by the following equation (8).

即ち、この信号ｇは、信号ｆに対して逆相となっている。 The phase shifter 43b advances the phase of the signal b by (−π / 2−α) [rad] and outputs it as a signal g. Therefore, the signal g is expressed by the following equation (9).

That is, the signal g has a phase opposite to that of the signal f.

The adder 44 adds the signal f and the signal g and outputs the result as a signal h1. Therefore, the signal h1 is expressed by the following equation (10).

The subtracter 45 subtracts the signal g from the signal f and outputs it as a signal h2. Therefore, the signal h2 is expressed by the following equation (11).

The differentiating circuit 51 differentiates the signal f with respect to time t and outputs it as a signal i. Therefore, the signal i is expressed by the following equation (12).

  The signal i passes through the LPF 52, so that a high frequency component is cut off and becomes a signal j.

The differentiating circuit 53 differentiates the signal g with respect to time t and outputs it as a signal k. Therefore, the signal k is expressed by the following equation (13).

  The signal k passes through the LPF 54, and the high frequency component is cut off to become a signal l.

The multiplier 55 multiplies the signal j and the signal l and outputs the result as the signal m. Therefore, the signal m is expressed by the following equation (14).

  By the way, if the noise is a single frequency, the frequency of the noise is considered to be higher (larger) or lower (smaller) than the carrier frequency of the desired signal to be received. Specifically, when Δω> 0, for example, when the frequency of the noise is higher than the frequency of the carrier wave of the desired reception signal, the above-described equations (1) to (14) are established. However, when the frequency of noise is smaller than the frequency of the carrier wave of the desired reception signal, “Δω” needs to be set to “−Δω”.

That is, the signal e is expressed by the following equation (15) in which “Δω” is set to “−Δω” in the equation (7).

And the signal f is represented by following Formula (16).

The signal b is represented by the following equation (17) in which “Δω” is set to “−Δω” in the equation (5).

The signal g is expressed by the following equation (18).

Furthermore, the signal h1 obtained by adding the signal f and the signal g is expressed by the following equation (19).

A signal h2 obtained by subtracting the signal g from the signal f is expressed by the following equation (20).

A signal i obtained by differentiating the signal f with respect to time t is expressed by the following equation (21).

A signal k obtained by differentiating the signal g with respect to time t is expressed by the following equation (22).

And the signal m is represented by following Formula (23).

  As described above, when the frequency of the noise is higher than the carrier frequency of the desired reception signal, as shown in the equations (10) and (11), the signal h1 is a signal reproduced from the desired reception signal, that is, the noise. The signal h2 is canceled, and the signal h2 is a signal in which noise is mixed and superimposed on the desired reception signal. On the other hand, when the noise frequency is lower than the carrier frequency of the desired reception signal, the signal h1 is a signal in which noise is mixed and superimposed on the desired reception signal, as shown in equations (19) and (20). The signal h2 is a signal obtained by reproducing the desired reception signal, that is, a signal from which noise has been canceled.

  The discrimination output circuit 50A discriminates which of the signals h1 and h2 is a signal from which noise has been canceled, selects the signal from which noise has been canceled, and outputs it as a signal P.

  Specifically, when the frequency of the noise is higher than the frequency of the carrier wave of the desired signal to be received, as shown in the equations (12) and (13), the signal j and the signal l are out of phase, and the equation (14 ), The level of the signal m obtained by multiplying the signal j and the signal l is always “negative”. Accordingly, the signal n output from the comparator 56 is a low level signal, the switch 58A is connected to the terminal 58a, and the signal h1 that reproduces only the desired reception signal (noise canceled) is output as the signal h. .

  On the other hand, when the frequency of the noise is lower than the frequency of the carrier wave of the desired signal to be received, the signal j and the signal l are in phase as shown in the equations (21) and (22) and shown in the equation (23). Thus, the level of the signal m obtained by multiplying the signal j and the signal l is always “positive”. Therefore, by setting the voltage level V1 applied to the negative terminal of the comparator 56 to be smaller than the bias voltage level generated in the circuit, the signal n becomes a high level signal. The switch 58A is connected to the terminal 58b, and a signal h2 obtained by reproducing only the desired reception signal (noise canceled) is output as the signal h.

  As described above, the determination output circuit 50A determines whether the signal j and the signal l are in phase with each other by determining whether the signal m is positive or negative (polarity). Or whether the signal has been canceled out of noise.

<Action and effect>
As described above, according to the first embodiment, in the signal regeneration circuit 40A of the detection circuit 20A, the signal f obtained by delaying the signal e obtained by multiplying the received signal S and the carrier signal by A degrees (α [rad]); A signal g obtained by delaying the signal b obtained by multiplying the signal S by the signal obtained by advancing the carrier signal by 90 degrees by (90 + A) degrees ((π / 2 + α) [rad]) is generated. Next, a signal h1 obtained by adding the signal f and the signal g and a signal h2 obtained by subtracting the signal g from the signal f are generated. Then, the level of the signal m obtained by multiplying the signal i obtained by differentiating the signal h1 and the signal l obtained by differentiating the signal h2 is compared with the predetermined voltage V1 by the discrimination output circuit 50A. Whether the signal is canceled or not is output.

  That is, when the frequency of noise is higher than the frequency of the carrier wave of the desired signal to be received, as shown in equations (12) and (13), the signal j and the signal l are out of phase, as shown in equation (14). As described above, the level of the signal m obtained by multiplying the signal j and the signal l is “negative”. On the other hand, when the frequency of the noise is lower than the frequency of the carrier wave of the desired signal to be received, the signal j and the signal l are in phase as shown in the equations (21) and (22) and shown in the equation (23). Thus, the level of the signal m obtained by multiplying the signal j and the signal l is “positive”.

  For this reason, by determining whether the amplitude of the signal m is positive or negative, it is determined whether the signal j and the signal l are in phase with each other, and either of the signals h1 and h2 is a signal from which noise has been canceled. Can be determined. Therefore, it is possible to obtain a detection signal (signal P) in which the noise is reliably canceled regardless of whether the noise frequency is higher or lower than the carrier frequency of the desired reception signal.

[Second Embodiment]
Next, a second embodiment will be described. The second embodiment is an embodiment in which the detection circuit 20A (see FIG. 3) is replaced with the detection circuit 20B shown in FIG. 4 in the first embodiment described above. For this reason, in the second embodiment, the same components as those in the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.

<Detection circuit>
FIG. 4 is a block diagram showing the circuit configuration of the detection circuit 20B in the second embodiment. According to the figure, the detection circuit 20B includes a carrier extraction circuit 30 and a signal regeneration circuit 40B.

  The signal reproduction circuit 40B includes a multiplication circuit 41, an LPF 42, a phase shift circuit 43, an adder 44, a subtracter 45, and a discrimination output circuit 50B. The discrimination output circuit 50B includes detectors 60 and 62, LPFs 59, 61, and 63, a comparator 64, and a switch 58B.

  The detector 60 detects the signal h1 input from the adder 44 by squaring or the like and outputs it as a signal q1. The LPF 61 passes a frequency in a predetermined low frequency range with respect to the signal q1 input from the detector 60, cuts off a frequency component outside the range, and outputs it as a signal q2. That is, the signal q2 corresponds to the signal level of the entire signal h1.

The detector 62 detects the signal g input from the subtractor 45 by squaring or the like and outputs it as a signal r1.
The LPF 63 allows a signal r1 input from the detector 62 to pass a frequency in a predetermined low frequency range, blocks out-of-range frequency components, and outputs the signal r2. That is, the signal r2 corresponds to the signal level of the entire signal h2.

  The comparator 64 compares the levels of the signal q2 input from the LPF 61 and the signal r2 input from the LPF 63, and outputs a signal u corresponding to the comparison result. Specifically, when the level of the signal r2 is higher than the level of the signal q2, a high level signal is output as the signal u, and otherwise, a low level signal is output as the signal u.

  The switch 58B is connected to the terminal 58a or the terminal 58b according to the signal u, and outputs the signal h1 or the signal h2 as the signal h. Specifically, when the signal u is at a high level, the signal u1 is connected to the terminal 58a and the signal h1 is output as the signal h. When the signal u is at the low level, the signal u is connected to the terminal 58b and the signal h2 is output as the signal h.

  Here, as in the first embodiment described above, assuming that the noise is a single frequency, the frequency of the noise is higher (larger) and lower (smaller) than the frequency of the carrier wave of the desired reception signal. You could think so.

  That is, when the frequency of noise is higher than the frequency of the carrier wave of the desired reception signal, the signal h1 is expressed by the equation (10), and the signal h2 is expressed by the equation (11). That is, the signal h1 is a signal obtained by reproducing the desired reception signal, that is, a signal in which noise is canceled, and the signal h2 is a signal in which noise is mixed and superimposed on the desired reception signal. On the other hand, when the frequency of the noise is lower than the frequency of the carrier wave of the desired reception signal, the signal h1 is represented by the equation (19), and the signal h2 is represented by the equation (20). That is, the signal h1 is a signal in which noise is mixed and superimposed on the desired reception signal, and the signal h2 is a signal obtained by reproducing the desired reception signal, that is, a signal in which noise is canceled.

  The discrimination output circuit 50B discriminates which of the signals h1 and h2 is a signal from which noise has been canceled, selects the signal from which noise has been canceled, and outputs it as a signal P.

  The principle of signal discrimination by the discrimination output circuit 50B will be described with reference to the waveform diagram shown in FIG. This figure shows a case where the frequency of the noise is lower than the frequency of the carrier wave of the desired reception signal. In this case, as shown in the upper part of FIG. 5A, the signal h1 has a waveform in which noise is mixed and superimposed on a reproduction signal that is a square wave. As shown in the lower part of FIG. 6A, the signal q1 that is the detection signal of the signal h1 has a waveform indicated by a solid line, and the signal q2 that has passed through the LPF 61 has a waveform indicated by a dotted line.

  Further, as shown in the upper part of FIG. 5B, the signal h2 is a square wave obtained by reproducing the desired reception signal. As shown in the lower part of FIG. 5B, the level of the signal r1 that is the detection signal of the signal h2 and the signal r2 that has been passed through the LPF 63 are substantially constant as indicated by the solid line. It becomes a waveform. In detail, the level slightly varies at the time of the amplitude change of the reception desired signal.

  When comparing the signal q2 corresponding to the level of each of the signals h1 and h2 with the signal r2, the signal r2 is larger by the amount of noise that is mixed and superimposed. For this reason, by comparing the levels of the signal q2 and the signal r2 by the comparator 64, it is possible to determine which of the signals h1 and h2 the noise is mixed and superimposed.

  Also, when the noise frequency is higher than the carrier frequency of the desired signal to receive, although not shown, it is the reverse of the above case. That is, the upper signal h1 in FIG. 9A corresponds to the signal h2, and the upper signal h2 in FIG.

  That is, when the frequency of the noise is higher than the frequency of the carrier wave of the desired signal to be received, the signal r2 corresponding to the signal level of the entire signal h2 has a higher level than the signal q2 corresponding to the signal level of the entire signal h1 ( large). Therefore, the signal u output from the comparator 64 is a high level signal. The switch 58B is connected to the terminal 1, and a noise-canceled signal h1 that reproduces only the desired reception signal is output as the signal h.

  On the other hand, when the frequency of the noise is lower than the frequency of the carrier wave of the desired signal to be received, the signal r2 corresponding to the signal level of the entire signal h2 has a lower level than the signal q2 corresponding to the signal level of the entire signal h1 ( small). Accordingly, the signal u output from the comparator 64 is a low level signal. The switch 58B is connected to the terminal 58b, and a signal h2 in which only the desired signal is reproduced and noise is canceled is output as the signal h.

  In this way, the determination output circuit 50B determines which of the signals h1 and h2 is a signal from which noise has been canceled by determining the magnitude of the signal q2 and the signal r2.

<Action and effect>
As described above, according to the second embodiment, in the signal reproduction circuit 40B of the detection circuit 20B, the signal f obtained by delaying the signal e obtained by multiplying the received signal S and the carrier signal by A degrees (α [rad]); A signal g obtained by delaying the signal b obtained by multiplying the signal S by the signal obtained by advancing the carrier signal by 90 degrees by (90 + A) degrees ((π / 2 + α) [rad]) is generated. Next, a signal h1 obtained by adding the signal f and the signal g and a signal h2 obtained by subtracting the signal g from the signal f are generated. The comparator 56 compares the signal q2 corresponding to the signal level of the entire signal h1 detected by the discrimination output circuit 50B with the signal r2 corresponding to the signal level of the entire signal h2 detected from the signal h2. Then, based on the comparison result, it is determined and output which of the signals h1 and h2 is a signal from which noise has been canceled.

  That is, of the signals h1 and h2, the level of the signal in which noise is mixed and superimposed is higher by the amount of the noise. Therefore, by comparing the levels of the signal q2 and the signal r2, it is possible to determine which of the signals h1 and h2 is a signal from which noise has been canceled. Therefore, it is possible to obtain a detection signal (signal P) in which the noise is reliably canceled regardless of whether the noise frequency is higher or lower than the carrier frequency of the desired reception signal.

[Third Embodiment]
Next, a third embodiment will be described. The third embodiment is an embodiment in which the detection circuit 20A (see FIG. 3) is replaced with a detection circuit 20C shown in FIG. 6 in the first embodiment described above. For this reason, in the third embodiment, the same components as those in the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.

  FIG. 6 is a block diagram showing a circuit configuration of the detection circuit 20C in the third embodiment. According to the figure, the detection circuit 20C includes a carrier extraction circuit 30 and a signal reproduction circuit 40C.

  The signal regeneration circuit 40C includes a multiplication circuit 41, an LPF 42, a phase shift circuit 43, an adder 44, a subtracter 45, and a discrimination output circuit 50C. The discrimination output circuit 50C includes comparators 66, 68, 71, LPFs 59, 67, 69, an adder 70, and a switch 58C.

  The comparator 66 compares the signal h1 input from the adder 44 with the predetermined level V4, and outputs a signal w1 corresponding to the comparison result. Specifically, when the level of the signal h1 is higher than the level V4, a high level signal is output as the signal w1, and when not, a low level signal is output as the signal w1. Here, the level V4 is for detecting that the level of the signal h1 exceeds a predetermined high level threshold, and is set higher than the signal level at the modulation level of 100%, which is the highest level of the desired signal to be received. Has been.

  The LPF 67 passes a frequency in a predetermined low frequency range with respect to the signal w1 input from the comparator 66, cuts off a frequency component outside the range, and outputs it as a signal w2.

  The comparator 68 compares the signal h1 input from the adder 44 with the predetermined level V5, and outputs a signal x1 corresponding to the comparison result. Specifically, when the level of the signal h1 is lower than the level V5, a high level signal is output as the signal x1, and when not, a low level signal is output as the signal x1. Here, the level V5 is for detecting that the level of the signal h1 has fallen below a predetermined low level threshold, and is set smaller than the signal level at the modulation level of 10% which is the lowest level of the desired signal to be received. Has been.

  The LPF 69 allows a signal x1 input from the comparator 68 to pass a frequency in a predetermined low frequency range, blocks out-of-range frequency components, and outputs the signal x2.

  The adder 70 adds the signal w2 input from the LPF 67 and the signal x2 input from the LPF 69, and outputs the result as a signal y.

  The comparator 71 compares the signal y input from the adder 70 with a predetermined level V6, and outputs a signal z corresponding to the comparison result. Here, the level V6 is for detecting that the signal y is at the high level, and is set to be lower than the high level of the signal y and higher than the low level of the signal y. That is, when the level of the signal y is higher than V6, that is, the high level, the comparator 71 outputs a high level signal as the signal z, and otherwise, when the level is the low level, the comparator 71 outputs the low level signal. Output as signal z.

  The switch 58C is connected to the terminal 58a or the terminal 58b according to the signal z input from the comparator 71, and outputs the signal h1 or the signal h2 as the signal h. Specifically, when the signal z is at a high level, the signal z is connected to the terminal 58b and the signal h2 is output as the signal h. When the signal z is at the low level, the signal z is connected to the terminal 58a and the signal h1 is output as the signal h.

  Here, as in the first embodiment described above, assuming that the noise has a single frequency, the frequency of the noise can be higher or lower than the frequency of the carrier wave of the desired reception signal.

  That is, when the frequency of noise is higher than the frequency of the carrier wave of the desired reception signal, the signal h1 is expressed by the equation (10), and the signal h2 is expressed by the equation (11). That is, the signal h1 is a signal obtained by reproducing the desired reception signal, that is, a signal in which noise is canceled, and the signal h2 is a signal in which noise is mixed and superimposed on the desired reception signal. On the other hand, when the noise frequency is lower than the desired reception signal, the signal h1 is expressed by the equation (19), and the signal h2 is expressed by the equation (20). That is, the signal h1 is a signal obtained by reproducing the desired reception signal, that is, a signal in which noise is canceled, and the signal h2 is a signal in which noise is mixed and superimposed on the desired reception signal.

  The discrimination output circuit 50C discriminates which of the signals h1 and h2 is a signal from which noise has been canceled, selects the signal from which the noise has been canceled, and outputs it as a signal P.

  The principle of signal discrimination by the discrimination output circuit 50C will be described with reference to the waveform diagram shown in FIG. This figure shows a case where the frequency of the noise is lower than the frequency of the carrier wave of the desired reception signal. In this case, as shown in the figure, the signal h1 is a signal in which noise is mixed and superimposed on a reproduction signal that is a square wave. When the level of the signal h1 is compared with levels V4 and V5, which are predetermined thresholds, the portion corresponding to 100% modulation exceeds the level V4 in the waveform of the signal h1, and the modulation is 10%. In the portion corresponding to, the level is below V5.

  Also, when the noise frequency is higher than the carrier frequency of the desired signal to receive, although not shown, it is the reverse of the above case. That is, since the signal h1 is a square wave that is a reproduction signal, the level of the signal h1 does not exceed the level V4 and does not fall below the level V5.

  For this reason, by comparing the level of the signal h1 with the levels V4 and V5 by the comparators 66 and 68, it is possible to determine which of the signals h1 and h2 the noise is mixed and superimposed.

  That is, when the frequency of noise is higher than the frequency of the carrier wave of the desired reception signal, the signal h1 is a signal from which noise has been canceled, so that the signals w1 and x1 output from the comparators 66 and 68 are both low. The signals w2 and x2 are both low level signals. Therefore, the signal y is a low level signal, and the signal z is a low level signal. The switch 58C is connected to the terminal 1, and a signal h1 obtained by reproducing only the desired reception signal (noise is canceled) is output as the signal h.

  On the other hand, when the frequency of the noise is lower than the frequency of the carrier wave of the desired signal to be received, the signal h1 is a signal in which noise is mixed and superimposed, so that the signals w2 and x2 output from the comparators 66 and 68 are The signal alternately and repeatedly repeats a high level and a low level. When the frequency at which the level of the signal h1 exceeds the level V4 and the frequency at which the level of the signal h1 falls below the level V5 increases to some extent, the levels of the signals w2 and x2 rise, and when the level of the signal y exceeds the level V6, the comparator 71 The output signal z becomes High level. Then, the switch 58C is connected to the terminal 58b, and the signal h2 that reproduces only the desired reception signal (noise is canceled) is output as the signal h.

<Action and effect>
As described above, according to the third embodiment, in the signal regeneration circuit 40C of the detection circuit 20C, the signal f obtained by delaying the signal e obtained by multiplying the received signal S and the carrier signal by A degrees (α [rad]); A signal g obtained by delaying the signal b obtained by multiplying the signal S by the signal obtained by advancing the carrier signal by 90 degrees by (90 + A) degrees ((π / 2 + α) [rad]) is generated. Next, a signal h1 obtained by adding the signal f and the signal g and a signal h2 obtained by subtracting the signal g from the signal f are generated. Then, the discrimination output circuit 50C compares the level of the signal h1 with each of the level V4 that is the high level threshold and the level V5 that is the low level threshold, and based on the comparison result, any of the signals h1 and h2 is compared. It is determined and output whether the signal is a signal from which noise has been canceled. Therefore, it is possible to obtain a detection signal (signal P) in which the noise is reliably canceled regardless of whether the noise frequency is higher or lower than the carrier frequency of the desired reception signal.

[Modification]
The application of the present invention is not limited to the above-described three embodiments, and can be changed as appropriate without departing from the spirit of the present invention.

(A) The radio wave receiver 620 is a straight type In each of the above-described embodiments, the superheterodyne type radio wave receiver 620 is used, but a straight type may be used.

  FIG. 8 is a block diagram showing a circuit configuration of a straight-type radio wave receiver 630. In the figure, the same components as those of the above-described superheterodyne radio wave receiving apparatus 620 (see FIG. 2) are denoted by the same reference numerals. According to FIG. 8, the straight-type radio wave receiver 630 includes a receiving antenna ANT1, an RF amplifier circuit 11, a filter circuit 12, and a detection circuit 20A. In this case, the signal S1 output from the filter circuit 12 is input to the detection circuit 20A.

(B) Application to a repeater In the above-described embodiment, the case where the present invention is applied to a radio-controlled timepiece has been described. However, the present invention may be applied to a repeater. A repeater is a device that is installed, for example, in a room such as a steel house where it is difficult for radio waves to reach inside, receives longwave standard radio waves, obtains accurate time information, and transmits this time information. The radio timepiece in the room receives the time information transmitted from the repeater and corrects the time.

  FIG. 9 is a block diagram showing an internal configuration of the repeater 2 to which the present invention is applied. In the figure, the same components as those of the above-described radio timepiece 1 (see FIG. 2) are given the same reference numerals. According to FIG. 9, the repeater 2 includes a CPU 100, an input unit 200, a display unit 300, a ROM 400, a RAM 500, a reception control unit 600, a time code generation unit 700, a timing circuit unit 800, an oscillation A circuit unit 820 and a transmission unit 900 are provided.

  The transmission unit 900 includes a transmission antenna, generates a relay time code based on the current time data timed by the timing circuit unit 800, adds a carrier wave to the relay time code to generate a relay radio wave, and transmits the relay time code via the transmission antenna. Send. The carrier wave at this time may be the same as the long wave standard radio wave, or may be a radio wave dedicated as a relay radio wave. In the case where the long wave standard radio wave is the same, the radio wave clock installed in the room or the like may be a normal radio wave clock. In addition, when a dedicated radio wave is used as the relay radio wave, the radio-controlled timepiece needs a means for receiving the relay radio wave.

The internal block diagram of a radio-controlled timepiece. The circuit block diagram of a radio wave receiver. The circuit block diagram of the detection circuit in 1st Embodiment. The circuit block diagram of the detection circuit in 2nd Embodiment. The wave form diagram of each signal of the detection circuit in 2nd Embodiment. The circuit block diagram of the detection circuit in 3rd Embodiment. The wave form diagram of each signal of the detection circuit in 3rd Embodiment. The circuit block diagram of the radio wave receiver of a straight system. The internal block diagram of a repeater. The schematic diagram of the phase characteristic (a) and spectrum (b) of a received signal and noise.

Explanation of symbols

1 Radio clock 100 CPU
200 Input unit 300 Display unit 400 ROM
500 RAM
600 reception control unit 620 radio wave reception device ANT1 reception antenna 11 RF amplification circuit 12, 15, 17 filter circuit 13 frequency conversion circuit 14 local oscillation circuit 16 IF amplification circuit 18 AGC circuit 20A, 20B, 20C detection circuit 30 carrier extraction circuit
31 Carrier regeneration circuit
32 Phase shifter
33 Multiplier circuit
34,35 LPF
40A, 40B, 40C Signal regeneration circuit
41 Multiplier circuit
42 LPF
43 Phase shift circuit
43a, 43b Phase shifter
44 Adder
45 Subtractor
50A, 50B, 50C discrimination output circuit
51, 53 Differentiation circuit
52, 54, 59, 61, 63, 67, 69 LPF
55 multiplier
56, 64, 66, 68, 71 Comparator
58A, 58B, 58C switch
58a, 58b terminal
60, 62 detector
70 Adder 700 Time Code Generation Unit 800 Timekeeping Circuit Unit 820 Oscillation Circuit Unit 2 Repeater 900 Transmitting Unit

Claims (4)

Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
First differentiating means for differentiating the first phase-shifted signal output by the first phase-shifting means and outputting it as a first differential signal;
Second differential means for differentiating the second phase shift signal output by the second phase shift means and outputting it as a second differential signal;
The addition is performed by determining whether the phase of the first differential signal output by the first differential means and the phase of the second differential signal output by the second differential signal are in-phase or anti-phase. Discriminating which of the addition signal output by the means and the subtraction signal output by the subtraction means is a signal from which the noise has been canceled, and outputting the detected signal from which the noise has been canceled as a detection signal Output means;
A radio wave receiving apparatus comprising: Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
First differentiating means for differentiating the first phase-shifted signal output by the first phase-shifting means and outputting it as a first differential signal;
Second differential means for differentiating the second phase shift signal output by the second phase shift means and outputting it as a second differential signal;
Multiplying means for multiplying the first differential signal output by the first differentiating means by the second differential signal output by the second differential signal and outputting as a differential multiplication signal;
By comparing the differential multiplication signal output by the multiplication means with a predetermined voltage, it is determined whether the phase of the first differential signal and the phase of the second differential signal are in-phase or anti-phase, It is determined which of the addition signal output by the addition means and the subtraction signal output by the subtraction means is a signal from which noise has been canceled, and the determined noise-cancelled signal is output as a detection signal. Discriminating output means,
A radio wave receiving apparatus comprising: Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
An addition signal overall level determination unit that determines the signal level of the entire addition signal from the addition signal output by the addition unit, and outputs the addition signal overall level signal;
A subtraction signal overall level determination means for determining a signal level of the entire subtraction signal from the subtraction signal output by the subtraction means, and outputting as a subtraction signal overall level signal;
By determining the magnitude relationship between the added signal overall level signal output by the added signal overall level determining unit and the subtracted signal overall level signal output by the subtracted signal overall level determining unit, the added signal is output by the adding unit. Discrimination output means for discriminating which signal of the addition signal and the subtraction signal output by the subtraction means is a signal from which noise has been canceled, and outputting the determined noise-cancelled signal as a detection signal;
A radio wave receiving apparatus comprising: Carrier signal generating means for generating a carrier signal having the same frequency and the same phase as the carrier wave of the received signal from the received signal received by the antenna;
Carrier phase multiplication means for shifting the phase of the generated carrier signal by 90 degrees, multiplying the received signal and outputting as a carrier phase multiplication product signal;
A first low-pass filter that cuts off a high-frequency component of the carrier phase multiplication signal output by the carrier phase multiplication unit;
Second phase shifting means for shifting the phase of the carrier phase shift multiplication signal via the first low-pass filter by (90 + A) degrees and outputting it as a second phase shift signal;
Multiplication means for multiplying the received signal and the carrier signal and outputting as a multiplied signal;
A second low-pass filter for blocking high-frequency components of the multiplication signal output by the multiplication means;
A first phase shifting means for shifting the phase shift of the multiplication signal through the second low-pass filter by A degrees and outputting it as a first phase shift signal;
Adding means for adding the first phase shift signal output by the first phase shift means and the second phase shift signal output by the second phase shift means to output as an addition signal;
Subtracting means for subtracting the other from either one of the first phase shifting signal output by the first phase shifting means and the second phase shifting signal output by the second phase shifting means and outputting as a subtraction signal When,
A high level for comparing one of the addition signal output by the addition means and the subtraction signal output by the subtraction means with a high level threshold value that is predetermined above the maximum voltage of the ideal detection signal Threshold comparison means;
A low level threshold comparing means for comparing the one signal with a low level threshold set in advance below a minimum voltage of the ideal detection signal;
Based on the comparison result of the high level threshold value comparison means and the low level threshold value comparison means, any signal of the addition signal output by the addition means and the subtraction signal output by the subtraction means is a signal from which noise has been canceled. Discriminating output means for outputting the signal with the determined noise canceled as a detection signal;
A radio wave receiving apparatus comprising:

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