JP4177216B2 - Switching circuit and voltage measurement circuit - Google Patents

Description

  The present invention relates to a switching circuit and a voltage measurement circuit, and more particularly, to a switching circuit that connects both ends of unit cells connected in series to a capacitor and a voltage measurement circuit including the switching circuit.

  As the conventional switching circuit described above, for example, a flying capacitor circuit as shown in FIG. 5 has been proposed (for example, Patent Documents 1 and 2). As shown in the figure, the flying capacitor circuit includes one capacitor C for a plurality of unit cells V1 to Vn connected in series, and both ends of the unit cells V1 to Vn are sequentially connected to both ends of the capacitor C. A plurality of change-over switches S1 to Sn + 1 are provided for connection. In FIG. 5, the unit cells V1 to Vn are each composed of one battery.

(N + 1) changeover switches S1 to Sn + 1 are provided for n unit cells V1 to Vn. That is, for example, the minus side of the unit cell V1 and the plus side of the unit cell V2 connected to the minus side of the unit cell V1 are connected to the capacitor C via the common selector switch S2. ing. Thereby, as shown in FIG. 6, compared with the case where two switches S1 to S2n are provided on both sides of each of the unit cells V1 to Vn (for example, Patent Document 3), the switching provided to both ends of the unit cells V1 to Vn. The number of switches can be reduced.
Japanese Patent Laid-Open No. 11-248755 JP 2002-156392 A JP-A-11-248757

  As shown in FIG. 5, in the conventional flying capacitor circuit, for example, when the changeover switches S1 and S2 are turned on and the unit cell V1 is connected to the capacitor C, the current in the arrow Y2 direction is supplied to the common changeover switch S2. Flowing. On the other hand, when the changeover switches S2 and S3 are turned on and the unit cell V2 is connected to the capacitor C, a current in the direction of the arrow Y1 flows.

  That is, as a common change-over switch, a bidirectional switch is required, and a switch with polarity such as a transistor switch (current flows from a collector to an emitter in an NPN transistor) cannot be used as a change-over switch.

  In addition, as a change-over switch, for example, as shown in FIG. 7, it is conceivable to use a field effect transistor (hereinafter referred to as FET) which is a switch having no polarity. In this case, there is no problem with the operation when the FETs Q1 to Qn + 1 are on. However, even if the FETs Q1 to Qn + 1 are turned off to isolate the unit cells V1 to Vn from the capacitor C, it cannot be said that the FETs Q1 to Qn + 1 are completely insulated by a parasitic diode between the source and drain of the FETs Q1 to Qn + 1. . For this reason, a current flows in a direction opposite to the flowing direction when the power is turned on, and there is a problem that it is impossible to accumulate charges in the capacitor C according to the voltage across the unit cells V1 to Vn.

  For example, when the FETs Q1 and Q2 are turned on, a closed loop circuit indicated by an arrow Y3 is formed, the capacitor C is charged by the unit cell V1, and the voltage across the capacitor C becomes equal to the voltage across the unit cell V1.

  However, at this time, even if the FET Q3 is OFF, a closed loop circuit indicated by an arrow Y4 is formed by a parasitic diode generated between the source and drain of the FET Q3, and a reverse voltage is applied to the unit cell V2. That is, since the charge accumulated in the capacitor C is discharged to the unit cell V2, there is a problem that it is impossible to accumulate the charge according to the voltage across the unit cell V1 of the capacitor C.

  Therefore, conventionally, a relay switch has been used as the changeover switch. However, the relay switch is inferior to the FET in terms of cost, size, durability, response speed, and the like.

  Therefore, the present invention pays attention to the above-described problems, and even if a field effect transistor is used as a switch for connecting a capacitor and a unit cell, switching between the capacitor and the unit cell can be achieved at the time of OFF. It is an object to provide a circuit and a voltage measurement circuit.

  In order to solve the above-mentioned problems, the invention according to claim 1 is characterized in that a plurality of capacitors provided in a one-to-one correspondence with the unit cells of a battery pack configured by connecting a plurality of unit cells made of batteries in series. And both ends of the unit cell are connected to the corresponding capacitor, and the forward direction of the parasitic diode generated between the source and the drain is connected so as to be directed from the capacitor to the unit cell. A first semiconductor switch and a switch for connecting a low voltage side of each capacitor to the ground, and the two unit cells connected to the negative side of one unit cell and the negative side of the unit cell The plus side of the circuit lies in a switching circuit that is connected to the capacitor via the common first semiconductor switch.

  According to the first aspect of the present invention, the capacitor is provided in one-to-one correspondence with the unit cell. The first semiconductor switch is provided to connect both ends of the unit cell to the corresponding capacitor. Furthermore, the forward direction of the parasitic diode generated between the source and the drain is connected so as to go from the capacitor to the unit cell. A changeover switch connects the low voltage side of each capacitor to ground.

  Therefore, in the case of a switching circuit in which the negative side of one unit cell and the positive side of the second unit cell are connected to a capacitor via a common switch, bidirectional current flows through the common switch. Therefore, if the first semiconductor switch is used as a switch, a current can flow in both directions. In addition, by providing a capacitor in a one-to-one correspondence with the unit cell, a reverse voltage is applied by the capacitor to the unit cell on the lower voltage side than the predetermined unit cell when both ends of the predetermined unit cell are connected to both ends of the capacitor. It will not be done. Further, when the first semiconductor switch between the unit cell and the capacitor is turned off, if the low voltage side of the capacitor is connected to the ground, the potential of the capacitor becomes lower than the potential of the unit cell, and the forward direction of the parasitic diode is changed from the capacitor to the unit. Even if it is facing the cell, no current flows in the forward direction.

  A second aspect of the present invention is the switching circuit according to the first aspect, wherein a logic circuit that outputs a control signal instructing on / off of the first semiconductor switch, and a level shift of the control signal, the semiconductor switch And a level shift circuit for outputting to the gate of the switching circuit.

  According to the invention described in claim 2, the logic circuit outputs a control signal instructing on / off of the first semiconductor switch. The level shift circuit shifts the level of the control signal and outputs it to the gate of the first semiconductor switch. Therefore, if the control signal is level-shifted by the level shift circuit, it is possible to control on / off of the first semiconductor switch in which a high voltage is applied to the source by using the control signal output from the low-voltage logic circuit. There is no need to use an expensive photo MOS or the like.

  The invention according to claim 3 is the switching circuit according to claim 1 or 2, wherein the semiconductor switch connected to the positive side of the unit cell on the highest voltage side among the first semiconductor switches is Pch. . The other semiconductor switches are Nch. It exists in the switching circuit characterized by being.

  According to the third aspect of the present invention, the semiconductor switch connected to the positive side of the unit cell on the highest voltage side among the first semiconductor switches is Pch. The other semiconductor switches are Nch. It is. Therefore, Pch. If the semiconductor switch is not used, an inexpensive Nch. Except for the semiconductor switch connected to the positive terminal of the unit cell on the highest voltage side that cannot be turned on. FETs can be used.

  Invention of Claim 4 is provided between the switching circuit of any one of Claims 1-3, the measurement means which measures the both-ends voltage of the said capacitor | condenser, the said capacitor | condenser-said measurement means, and source | sauce- A second semiconductor switch connected so that a forward direction of a parasitic diode generated between the drains is directed from the measuring means to the capacitor; and a voltage application for applying a predetermined voltage to one end of the measuring means of the second semiconductor switch And a voltage measuring circuit including the means.

  According to the invention of claim 4, the measuring means measures the voltage across the capacitor. A second semiconductor switch is provided between the capacitor and the measuring means. The voltage applying means is provided between the capacitor and the measuring means, and is connected so that the forward direction of the parasitic diode generated between the source and the drain is directed from the measuring means to the capacitor. Therefore, if the voltage application means causes the potential on the measurement means side of the second semiconductor switch to fall below the potential on the capacitor side, even if the forward direction of the parasitic diode of the second semiconductor switch is directed from the measurement means to the capacitor, Current stops flowing.

  As described above, according to the first aspect of the present invention, in the case of a switching circuit in which the negative side of one unit cell and the positive side of two unit cells are connected to a capacitor via a common switch, Bidirectional current flows through the common switch. Therefore, if the first semiconductor switch is used as a switch, a current can flow in both directions. In addition, by providing a capacitor in a one-to-one correspondence with the unit cell, a reverse voltage is applied by the capacitor to the unit cell on the lower voltage side than the predetermined unit cell when both ends of the predetermined unit cell are connected to both ends of the capacitor. It will not be done. Further, when the first semiconductor switch between the unit cell and the capacitor is turned off, if the low voltage side of the capacitor is connected to the ground, the potential of the capacitor becomes lower than the potential of the unit cell, and the forward direction of the parasitic diode is changed from the capacitor to the unit. Even if it is suitable for the cell, current does not flow in the forward direction, so even if a semiconductor switch is used as a switch to connect the capacitor to the unit cell, switching that can insulate the capacitor from the unit cell when off A circuit can be obtained.

  According to the second aspect of the present invention, when the control signal is level-shifted by the level shift circuit, the first semiconductor switch in which a high voltage is applied to the source using the control signal output from the low-voltage logic circuit. Since it is not necessary to use an expensive photo MOS or the like, a switching circuit with reduced costs can be obtained.

  According to the third aspect of the present invention, Pch. If the semiconductor switch is not used, an inexpensive Nch. Except for the semiconductor switch connected to the positive terminal of the unit cell on the highest voltage side that cannot be turned on. Since a FET can be used, a switching circuit with reduced costs can be obtained.

  According to the fourth aspect of the present invention, when the potential on the measuring means side of the second semiconductor switch is lower than the potential on the capacitor side by the voltage applying means, the forward direction of the parasitic diode of the second semiconductor switch is directed from the measuring means to the capacitor. Even if it is, even if a semiconductor switch is used as a switch for connecting the capacitor and the measurement means, a voltage measurement circuit that can insulate the capacitor from the measurement means when off is provided. Obtainable.

  Hereinafter, a switching circuit and a voltage measurement circuit of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of a voltage measuring circuit incorporating a flying capacitor circuit as a switching circuit of the present invention.

  As shown in the figure, the voltage measurement circuit is provided in a one-to-one correspondence with each unit cell V1 to Vn in an assembled battery configured by connecting n unit cells V1 to Vn each including two batteries in series. Field effect transistors (hereinafter referred to as “n” capacitors C1 to Cn and the unit cells V1 to Vn) are connected to the corresponding capacitors C1 to Cn via resistors R11 to R1 (n + 1). FET) Q11 to Q1 (n + 1). The FETs Q11 to Q1 (n + 1) correspond to the first semiconductor switch in the claims. As described above, by using the FET as a switch for connecting the both ends of the unit cells V1 to Vn and the capacitors C1 to Cn, it becomes possible to flow a current bidirectionally when the switch is turned on.

  The FETs Q11 to Q1n are connected so that the forward direction of the parasitic diode generated between the source and drain is directed from the capacitors C1 to Cn to the unit cells V1 to Vn. On the other hand, in the FET Q1 (n + 1) that connects the negative side of the unit cell Vn on the lowest voltage side and the capacitor Cn, the anode of the parasitic diode generated between the source and drain is connected to the ground via the resistor R1 (n + 1). ing.

  Further, the FETs Q12 to Q1n except for the FET Q11 connected to the plus side of the unit cell V1 on the highest voltage side are Nch. It consists of FET. Next, details of the drive circuits of the above-described FETs Q12 to Q1n will be described with reference to FIG. FIG. 2 is a diagram showing a drive circuit for an arbitrary FET Qm among the FETs Q12 to Q1n. As shown in the figure, the gate of the FET Qm is connected between the collector of the transistor Tr1 and the resistor Rb. The emitter of the transistor Tr1 is connected to the plus side of the unit cell Vm-1 via resistors Ra and R1 (m-1), and is connected to the base via a resistor Rc. On the other hand, the resistor Rb is connected to the negative side of the unit cell Vm.

  The base of the transistor Tr1 is connected to the collector of the transistor Tr2 via the resistors Rd and Re. The emitter of this transistor Tr2 is connected to the ground. On the other hand, the base is connected to a later-described logic circuit via a resistor Rf, and is connected to an emitter via a resistor Rg.

  Thereby, for example, when a 5V control signal is supplied from the 5V logic circuit to the base of the transistor Tr2, the transistor Tr2 is turned on. When the transistor Tr2 is turned on, a current flows in the order of the resistors R1 (m−1), Ra, Rc, Rd, and Re. At this time, the voltage generated in the resistor Rc applies a bias between the emitter and base of the transistor Tr1, so that the transistor Tr1 is also turned on.

  When the transistor Tr1 is turned on, a voltage obtained by dividing the total value of the voltage across the unit cell Vm and the unit cell Vm-1 by the resistors R1 (m-1), Ra, and the resistor Rb is applied to the gate of the FET Qm. Is done. As a result, a bias voltage higher than that of the source is applied to the gate of the FET Qm, and the FET Qm is turned on. As is apparent from the above, the resistors Ra to Rg and the transistors Tr1 and Tr2 function as a level shift circuit that shifts the level of the 5V control signal and applies it to the gate of the FET Qm.

  On the other hand, the FET Q11 connected to the plus side of the unit cell V1 on the highest voltage side is Pch. It consists of FET. Next, details of the drive circuit of the FET Q11 will be described with reference to FIG. The gate of the FET Q11 described above is connected between one end of the resistor Rh and one end of the resistor Ri. The other end of the resistor Rh is connected to the unit cell V1 via the resistor R11. On the other hand, the other end of the resistor Ri is connected to the ground via the collector-emitter of the transistor Tr3. The base of the transistor Tr3 is connected to a logic circuit (not shown) through a resistor Rj and is connected to the emitter through a resistor Rk.

  Thus, when a 5V control signal is supplied from the 5V logic circuit to the base of the transistor Tr3, the transistor Tr3 is turned on. When the transistor Tr3 is turned on, a voltage obtained by dividing the positive voltage of the unit cell V1 by the resistor R11, the resistor Rh, and the resistor Ri is applied to the gate of the FET Q11. As a result, a bias voltage lower than that of the source is applied to the gate of the FET Q11, and the FET Q11 is turned on. As is apparent from the above, the resistors Rh to Rk and the transistor Tr3 function as a level shift circuit that shifts the level of the 5V control signal and applies it to the gate of the FET Q11.

  Now, of both ends of each of the capacitors C1 to Cn-1, one end connected to the plus side of the corresponding unit cell V1 to Vn is a high voltage side, and the other end connected to the minus side is a low voltage side. As shown in FIG. 1, the low-voltage side of each capacitor C1 to Cn-1 is connected to the ground via resistors R21 to R2 (n-1) and FETs Q21 to Q2 (n-1), respectively. In the FETs Q21 to Q2 (n−1), the anode of the parasitic diode generated between the source and the drain is connected to the ground. The FETs Q21 to Q2 (n-1) correspond to switches in the claims.

  On the other hand, the high voltage side of each of the capacitors C1 to Cn is connected to the measurement circuit 10 via FETs Q31 to Q3n. The FETs Q31 to Q3n are connected such that the forward direction of the parasitic diode generated between the source and the drain is directed from the measurement circuit 10 to the capacitors C1 to Cn. Further, a predetermined voltage is applied to one end of the FETs Q31 to Q3n on the measurement circuit 10 side by constant voltage circuits 21 to 2n as voltage applying means. The above-described FETs Q31 to Q3n correspond to the second semiconductor switch in the claims. Further, the capacitors C1 to Cn, the FETs Q11 to Q1 (n + 1), and Q21 to Q2 (n-1) constitute a flying capacitor circuit (= switching circuit).

  Next, the configuration of the measurement circuit 10 described above will be described below with reference to FIG. As shown in the figure, the measurement circuit 10 includes a multiplexer 11 that selects and outputs one of the high-voltage side potentials of the capacitors C1 to Cn, an amplifier 12 that amplifies the output from the multiplexer 11, and an amplifier 12 And an analog / digital converter (hereinafter referred to as an A / D converter) 13 for converting the output into a digital signal.

Further, the measurement circuit 10 controls the multiplexer 11 and the A / D converter 12 described above, and a logic circuit 14 that performs on / off control of each of the FETs Q11 to Q1 (n + 1), Q21 to Q2 (n-1), and Q31 to Q3n. Is further provided. The logic circuit 14 is connected to a microcomputer (not shown) (hereinafter referred to as μCOM), and an enable signal is supplied from the μCOM via the photocoupler 15. The logic circuit 14 supplies the output of the A / D converter 13 to the μCOM via the photocoupler 16.

  The operation of the voltage measuring circuit incorporating the above-described flying capacitor circuit will be described below. First, when an enable signal is input via the photocoupler 15, the logic circuit 14 turns on the FETs Q11 and Q12 to connect both ends of the unit cell V1 to both ends of the capacitor C1. As a result, the voltage across the capacitor C1 becomes equal to the voltage across the unit cell V1.

  Next, the logic circuit 14 turns off the FETs Q11 and Q12 to disconnect the unit cell V1 from the capacitor C1. Further, the FET Q21 is turned on, and the low voltage side of the capacitor C1 is connected to the ground. Due to this connection to the ground, the low-voltage side potential of the capacitor C1 is lowered from the negative-side potential of the unit cell V1, and the high-voltage side potential of the capacitor C1 is lowered from the positive-side potential of the unit cell V1.

  Specifically, for example, the positive potential of the unit cell V1 is 250V and the negative potential is 238V. At this time, when the FETs Q11 and Q12 are turned on, the high voltage side of the capacitor C1 becomes 250V equal to the positive potential of the unit cell V1, and the low voltage side of the capacitor C1 becomes 238V equal to the negative potential of the unit cell V1. The voltage across the capacitor C1 is 12V, which is equal to the voltage across the unit cell V1.

  Thereafter, when the FETs Q11 and Q12 are turned off and the low voltage side of the capacitor C1 is connected to the ground, the low voltage side of the capacitor C1 drops from 238V to 0V, and the high voltage side of the capacitor C1 changes from 250V to 12V. In this state, since the potential on the high voltage side of the capacitor C1 is lower than the potential on the positive side of the unit cell V1 as described above, no current flows in the forward direction of the parasitic diode of the FET Q11. Further, since the potential on the low voltage side of the capacitor C1 is lower than the potential on the negative side of the unit cell V1, no current flows in the forward direction of the parasitic diode of the FET Q11. Therefore, even when an FET is used as a switch for connecting the capacitor C1 and the unit cell V1, the capacitor C1 and the unit cell V1 can be insulated when turned off.

  Next, the logic circuit 14 turns on the FET Q31 while keeping the FET Q21 in the on state. By turning on the FET Q31, the voltage across the capacitor C1, that is, the potential on the high voltage side of the capacitor C1 equal to the voltage across the unit cell V1, is supplied to the measurement circuit 10. The high-voltage side potential of the capacitor C1 supplied to the measurement circuit 10 first passes through the multiplexer 11 and is amplified by the amplifier circuit 12, and then supplied to the A / D converter 13 and converted into a digital signal.

  The high-voltage side potential of the capacitor C <b> 1 converted into a digital signal by the A / D converter 13 is supplied to the logic circuit 14. The logic circuit 14 supplies the digital value of the high voltage side potential of the capacitor C1 to μCOM (not shown) via the photocoupler 16. μCOM grasps the voltage across the unit cell V1 based on the high voltage side potential of the supplied capacitor C1.

  Thereafter, the logic circuit 14 turns off the FET Q21 and disconnects the connection between the low voltage side of the capacitor C1 and the ground. Further, the FET Q31 is turned off, and the connection between the high voltage side of the capacitor C1 and the measurement circuit 10 is disconnected. At this time, the constant voltage circuit 21 applies a voltage lower than the voltage across the unit cell V1 to the measurement circuit 10 side of the FET Q31. For this reason, the potential on the measurement circuit 10 side becomes lower than the potential on the capacitor C1 side of the FET Q31, so that current does not flow in the forward direction of the parasitic diode of the FET Q31, and insulation can be achieved. Therefore, even when an FET is used as a switch for connecting the capacitor C1 and the measurement circuit 10, it is possible to insulate the capacitor C1 and the measurement circuit 10 when they are off.

  Thereafter, the logic circuit 14 supplies the voltage across the unit cells V2 to Vn to the measurement circuit 10 via the corresponding capacitors C2 to Cn in the same manner for the unit cells V2 to Vn.

  Further, by providing the capacitors C1 to Cn in a one-to-one correspondence with the unit cells V1 to Vn, when both ends of an arbitrary unit cell Vm are connected to both ends of the capacitor Cm, the unit cell located on the lower voltage side than the arbitrary unit cell Vm. A reverse voltage is not applied to Vm + 1 by the capacitor Cm.

  Further, according to the voltage measurement circuit described above, the control signal is level-shifted by the level shift circuit and applied to the gates of the FETs Q11 to Q1 (n + 1). This level shift circuit can control on / off of FETs Q11 to Q1 (n + 1) whose sources are connected to a high voltage by using a control signal output from a 5V logic circuit, and uses an expensive photo MOS or the like. There is no need, and the cost can be reduced.

  By the way, since the FET Q11 is connected to the positive side of the unit cell V1 having the highest voltage, a voltage higher than that of the source cannot be applied to the gate. FET cannot be used. Therefore, as in the voltage measurement circuit described above, the FET Q11 connected to the plus side of the unit cell V1 on the highest voltage side is replaced with an expensive Pch. FETs, and other FETs Q12 to Q1 (n + 1) are Nch. If the FET is used, the cost can be reduced.

  Further, as shown in FIG. 1, the FET Q1 (n + 1) and the FETs Q21 to Q2 (n-1), one end of which is connected to the ground, have a parasitic diode anode connected to the ground side. As a result, the cathode potential of the parasitic diode does not become higher than the anode potential, and no current flows through the parasitic diode when the parasitic diode is off.

  In the above-described embodiment, the FET is used as a switch for connecting the low voltage side of the capacitors C1 to Cn and the ground. However, since a current can flow only in one direction, a switch such as a transistor is used. It is also possible.

  In the above-described embodiment, the field effect transistor is used as the first or second semiconductor switch. However, the present invention is not limited to this, and for example, a bipolar transistor, IGBT, GTO, or photo MOS switch may be used. .

It is a circuit diagram which shows one Embodiment of the voltage measurement circuit incorporating the flying capacitor circuit as a switching circuit of this invention. It is a figure which shows the drive circuit of arbitrary FETQm among FETQ12-Q1n. It is a figure which shows the drive circuit of FETQ11. It is a figure which shows the detail of the measurement circuit 10 shown in FIG. It is a circuit diagram which shows an example of the flying capacitor circuit as a conventional switching circuit. It is a circuit diagram which shows an example of the flying capacitor circuit as a conventional switching circuit. It is a figure which shows an example at the time of using FETQ1-Qn + 1 as changeover switch S1-Sn + 1 shown in FIG.

Explanation of symbols

V1 to Vn Unit cell C1 to Cn Capacitor Q11 to Q1 (n + 1) FET (first semiconductor switch)
Q21-Q2 (n-1) FET (switch)
Q31-Q3n FET (second semiconductor switch)
14 logic circuit 10 measuring circuit 21 to 2n constant voltage circuit (voltage applying means)

Claims (4)

A plurality of capacitors provided in a one-to-one correspondence with the unit cells of the assembled battery configured by connecting a plurality of unit cells composed of batteries in series;
The first unit is provided to connect both ends of the unit cell to the corresponding capacitor, and is connected so that the forward direction of the parasitic diode generated between the source and the drain is directed from the capacitor to the unit cell. A semiconductor switch;
A switch for connecting the low voltage side of each capacitor to the ground,
The negative side of one unit cell and the positive side of the second unit cell connected to the negative side of the unit cell are connected to the capacitor via the common first semiconductor switch. A characteristic switching circuit. The switching circuit according to claim 1,
A logic circuit that outputs a control signal instructing on / off of the first semiconductor switch;
A level shift circuit for level-shifting the control signal and outputting it to the gate of the semiconductor switch. The switching circuit according to claim 1 or 2,
Among the first semiconductor switches, the semiconductor switch connected to the positive side of the unit cell on the highest voltage side is Pch. The other semiconductor switches are Nch. A switching circuit characterized by A switching circuit according to any one of claims 1 to 3,
Measuring means for measuring the voltage across the capacitor;
A second semiconductor switch provided between the capacitor and the measuring unit and connected so that a forward direction of a parasitic diode generated between the source and the drain is directed from the measuring unit to the capacitor;
A voltage measuring circuit comprising: a voltage applying unit that applies a predetermined voltage to one end of the measuring unit of the second semiconductor switch.

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