JP4128498B2 - Semiconductor evaluation equipment - Google Patents

Description

  The present invention relates to a semiconductor evaluation apparatus and a semiconductor evaluation method for evaluating the film quality of an insulating film constituting a semiconductor device using an electron beam, and more particularly to a technique for extracting an evaluation index related to the capacity and resistance of an insulating film.

  A semiconductor integrated circuit is composed of a transistor formed on a semiconductor wafer, or a capacitor and a resistor, and the current drive capability, capacitance value, and resistance value of the transistor are optimized and designed from the viewpoint of circuit operation. In the case of MOS type transistors, the quality of the gate oxide film, which is a kind of insulating film, has a significant effect on reliability and capacitance. And requested by both manufacturers.

  By the way, conventionally, when the electrical film quality evaluation of the above-described insulating film is performed, the electrical characteristics are measured by physically and mechanically connecting an external measuring device to the semiconductor device formed on the wafer. It was common. FIG. 18 is a diagram for explaining a conventional film quality evaluation method for a semiconductor device, in which 1801 is a back electrode, 1802 is a semiconductor substrate, 1803 is a silicon oxide film interface layer, 1804 is a field oxide film, and 1805 is an insulating film ( Gate oxide film), 1806 is polycrystalline silicon, and 1807 is titanium silicide. Among these, the polycrystalline silicon 1806 and the titanium silicide 1807 constitute an electrode formed on the field insulating film 1804 so as to be isolated in an arbitrary shape.

Further, 1808 is a metal probe, 1809 is a voltmeter, 1810 is an ammeter, and 1811 is a DC power source, and these constitute an inspection apparatus.
In the inspection apparatus having such a configuration, a voltage less than the withstand voltage of the insulating film 1805 is applied by the DC power source 1811, the metal short hand 1808 is brought into contact with the electrodes (1806, 1807), and the insulation of the insulating film 1805 is measured with a voltmeter. It is measured by 1809 or ammeter 1810.

Japanese Patent Application Laid-Open No. 9-186211, “Electron Beam Inspection Device”, irradiates a semiconductor device formed on a wafer with an electron beam, detects secondary charged particles generated from the device, and detects this. An apparatus for detecting a minute defect based on the secondary charged particle image is disclosed.
JP-A-9-186211

  However, according to the conventional technique shown in FIG. 18 described above, the metal probe 1080 of the inspection apparatus is physically and mechanically brought into contact with the electrode (1806, 1807) on the semiconductor apparatus. (1806, 1807) will cause considerable damage and may cause a loss of reliability. Therefore, there is a problem that the film quality of the actual device cannot be directly evaluated during the semiconductor device manufacturing process, but must be indirectly evaluated using TEG or the like.

  Further, according to the technique disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 9-186211, since secondary charged particles are used as detection signals, S / N is essentially low and detection accuracy is insufficient. Further, in this prior art, since the basic principle is that an electron irradiates an electron beam that is equivalently transmitted through an insulating film, for example, when an electrode made of a metal or a semiconductor thin film is formed on the insulating film, Evaluation of film quality becomes impossible due to the constraints of electron beam irradiation conditions. Therefore, for example, as has been a problem in a series of manufacturing processes of semiconductor integrated circuits in recent years, the gate insulating film element damage induced in the plasma processing process cannot be measured during the manufacturing process.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide insulation that constitutes a semiconductor device without physically and mechanically contacting the measurement device with the semiconductor device formed on the semiconductor wafer. An object of the present invention is to provide a semiconductor evaluation method and a semiconductor evaluation apparatus for accurately evaluating the electrical quality of a film or a junction.

In order to solve the above-described problems, a semiconductor evaluation apparatus according to the present invention includes an electron beam irradiation means for irradiating an electron beam to a desired position on a semiconductor device, and a current generated in a semiconductor substrate constituting the semiconductor device. A current measuring means for measuring, a synchronizing signal generating means for generating a synchronizing signal for synchronizing the irradiation timing of the electron beam to the semiconductor device and the measuring timing of the current by the current measuring means, and synchronized with the synchronizing signal An irradiation switching unit that switches an irradiation amount of the electron beam to the semiconductor device, a measurement result recording unit that records a measurement result by the current measurement unit as a function of time in synchronization with the synchronization signal, and the measurement result evaluation to evaluate the membrane or junction constituting the semiconductor device from the relationship between the current shown recorded in the recording means and the measurement time And a processing section.

According to the present invention, in the semiconductor evaluation apparatus, the evaluation processing unit calculates, as an evaluation index, a time constant calculated from a relationship between current and time indicated by the measurement result recorded in the measurement result recording unit. It is characterized by that.
In the semiconductor evaluation apparatus according to the present invention, the evaluation processing unit calculates a resistance value from the time constant.
According to the present invention, in the semiconductor evaluation apparatus, the evaluation processing unit inputs data capacity for inputting a designed capacitance value of a capacitive element formed by the semiconductor device , the designed capacitance value, and the time constant. ; and a numerical arithmetic processor for calculating the resistance value of the film or the joint and a, and outputs a resistance value of the film or bonding unit as the evaluation index.

  In the semiconductor evaluation apparatus, the resistance value is based on a defect included in the film or the junction.
  Further, the present invention provides the semiconductor evaluation apparatus, wherein the evaluation processing unit performs a logarithmic calculation process on the substrate current value of the measurement result, calculates a linear approximation formula for the result of the logarithmic calculation process, The resistance value is calculated by extracting a slope of a linear approximation formula.
  The present invention is also characterized in that the semiconductor evaluation apparatus further comprises display means for displaying an evaluation result by the evaluation processing unit.

Further, the film quality evaluation method according to the present invention includes : ( a) a first step of irradiating a predetermined position on a semiconductor device with an electron beam generated by an electron beam generating unit; and (b) a current measuring unit including the semiconductor a second step of measuring a current generated in the semiconductor substrate of the device in synchronization with the electron beam irradiation timing, and records the measurement result recording means as a function of the measurement result time by (c) prior Symbol current measuring means A third step; ( d ) a fourth step in which the evaluation processing unit evaluates a film or a junction constituting the semiconductor device from the relationship between the measurement result recorded in the measurement result recording means and time; ( E ) including a fifth step of displaying an evaluation result by the evaluation processing unit.

According to the present invention, it is possible to evaluate an equivalent resistance value, an equivalent capacitance value, a defect density, and the like of an insulating film that could not be conventionally quantitatively evaluated in-line for various semiconductor devices having the insulating film. Further, in the past, measurement was performed by mechanically bringing an inspection device into contact with a semiconductor device as an object to be measured, but according to the present invention, measurement is performed in a non-contact manner using electron beam irradiation. Therefore, even a semiconductor device vulnerable to mechanical damage can be measured without damage. Therefore, the semiconductor device to be measured can be evaluated during the manufacturing process without affecting the reliability, and the subsequent manufacturing process can be continued after the measurement is completed. Further, conventionally, measurement was performed using the secondary charged particle image at the time of electron beam irradiation, but according to the present invention, the quantitative evaluation index is calculated based on the time transition of the substrate current signal. It is possible to evaluate a semiconductor device structure. For example, in-line evaluation of plasma-induced gate oxide film damage, which is a problem in the wiring forming process after the gate insulating film element forming process, is also possible. For this reason, it becomes possible to analyze the risk factor of the semiconductor manufacturing process in more detail and in a short time.
Therefore, according to the present invention, the electrical quality of the insulating film and the joints constituting the semiconductor device can be accurately adjusted without physically and mechanically contacting the measurement device with the semiconductor device formed on the semiconductor wafer. It becomes possible to evaluate.

Hereinafter, a semiconductor evaluation apparatus and a semiconductor evaluation method according to the present invention will be specifically described with reference to the drawings. In this embodiment, the quality of an insulating film such as a gate oxide film constituting a semiconductor device is evaluated.
FIG. 1 is a configuration diagram of a semiconductor evaluation apparatus according to the present invention. In this figure, an emitter 101 serving as an electron beam source, a GUN alignment lens 102, first to third anodes 117 to 119, a direct current high voltage power source (not shown), and a power source (not shown) for energizing and heating the filament are desired. An electron beam generating means for generating an electron beam of energy is configured. In this embodiment, a Schottky mission type emitter made of Zr—W (zirconium / tungsten) is used as the emitter. The first to third anodes 117 to 119 are for adjusting the acceleration energy and current amount of the electron beam.

  The converging lens 103, the objective lens 107, the focus lens 108, and the astigmatism correction lens 109 constitute electron beam converging means for converging the electron beam generated by the electron beam generating means on the semiconductor device formed on the semiconductor wafer 110. To do. In this embodiment, a magnetic convergence lens is used, but an electrostatic convergence lens may be used. By this electron beam converging means, the electron beam is adjusted to a desired shape and size.

  The deflection electrode 106 and the stage 112 constitute electron beam irradiation position control means for controlling the irradiation position of the electron beam converged by the electron beam focusing means. In this embodiment, an electrostatic electrode is used, but a magnetic electrode may be used. The deflection electrode 106 is means for electrically controlling the irradiation position of the electron beam. The deflection electrode 106 controls the electron beam trajectory passing through the deflection electrode 106 by an electrostatic field or electromagnetic field generated by the deflection electrode 106, so that a desired position on the semiconductor wafer 110 can be obtained. The pattern is irradiated with an electron beam.

  The stage 112 mounts the semiconductor wafer (semiconductor substrate) 110, and a semiconductor device shown in FIG. 2 to be described later is formed on the semiconductor wafer 110. An insulating film to be evaluated that forms the semiconductor device is previously formed. Is formed. By moving the stage 112 mechanically, it is possible to irradiate the converged electron beam to a desired position on the surface of the semiconductor wafer 110. When evaluating the film quality of the insulating film constituting the semiconductor device, the electron beam is irradiated only to a desired region on the semiconductor wafer 110. In the case of the semiconductor device shown in FIG. An electron beam is irradiated into the electrode region.

The synchronization signal generation means 115 generates a synchronization signal for synchronizing the irradiation timing of the electron beam onto the semiconductor device formed on the semiconductor wafer 110 and the measurement timing of the current by the current measurement means. In the example, a measurement start signal or a measurement end signal is output as the synchronization signal to the irradiation switching means or the substrate current signal means based on the clock signal.
The blanking electrode 104 and the irradiation switching control circuit 114 constitute irradiation switching means for switching the electron beam irradiation amount to the semiconductor wafer 110 in synchronization with the synchronization signal. The irradiation switching control circuit 114 outputs a current signal to the blanking electrode 104 according to the signal generated by the synchronization signal generating means 115, and controls the electron beam trajectory passing between the blanking electrodes. Thereby, the irradiation of the electron beam onto the semiconductor wafer 110 is switched to the non-irradiation, and the irradiation amount of the electron beam onto the semiconductor wafer 110 is switched.

  The irradiation switching unit starts irradiation of the electron beam onto the semiconductor wafer 110 according to a measurement start signal which is a kind of synchronization signal output from the synchronization signal generation unit 115, and the same synchronization signal output from the synchronization signal generation unit 115. In accordance with a measurement end signal which is a kind of the above, the irradiation of the electron beam to the semiconductor element is ended. While the semiconductor device formed on the semiconductor wafer 110 is irradiated with the electron beam, the current value by the electron beam is a constant value, and the stability is desirably ± 1% or less. Further, it is desirable that the switching between irradiation and non-irradiation of the electron beam is executed in a time of 0.1 sec or less.

  The substrate current detection electrode 111 and the current-voltage converter 113 constitute current measuring means for measuring the substrate current generated in the semiconductor wafer 110 (semiconductor substrate). The substrate current detection electrode 111 is made of a conductive component such as conductive silicone rubber or conductive plastic, and detects the substrate current signal when the component contacts the back surface of the semiconductor wafer 110. The current-voltage converter 113 has a function of converting the current signal output from the substrate current detection electrode 111 into a voltage signal, and includes, for example, an OP amplifier and a resistor.

  The AD converter 116 and the recording device 121 constitute measurement result recording means for recording the measurement result by the current measurement means as a function of time in synchronization with the synchronization signal. The AD converter 116 has a function of converting the analog voltage signal output from the current-voltage converter 113 into a digital signal, and performs sampling measurement in the time domain in accordance with the clock signal generated by the synchronization signal generating unit 115. At this time, the current measuring means samples and measures the substrate current signal with a time resolution of 0.1 sec or less, for example.

  The semiconductor evaluation apparatus is equipped with an MCP 105 and detects secondary electron signals generated from the semiconductor wafer 110 irradiated with the electron beam. Pattern position information on the semiconductor wafer 110 is acquired from the secondary electron signal, and an adjustment signal for the electron beam irradiation position is output to the deflection electrode 106 or the stage 112 based on the pattern position information. In the present embodiment, the MCP is exemplified as the secondary electron signal detection means, but a scintillator may be used as the secondary electron signal detection means. In the case of MCP, it is installed in an electron lens through which an electron beam passes as shown in FIG. 1, but in the case of a scintillator, it is installed outside the electron lens.

  Reference numeral 120 denotes numerical arithmetic processing means (evaluation processing means), which evaluates the film quality of the insulating film of the semiconductor device from the relationship between the current and time indicated by the measurement result recorded in the measurement signal recording means. That is, the numerical arithmetic processing means 120 performs numerical arithmetic processing on a data series composed of time information and substrate current values output as measurement results from the current measuring means, and an insulating film formed on the semiconductor wafer 110 A film quality quantitative evaluation index, which is an evaluation index of film quality, is output. Further, the numerical calculation processing means (evaluation processing unit) includes a data input means for inputting a designed capacitance value of the capacitive element formed by the insulating film, and the insulating film from the designed capacitance value and the time constant. And a numerical operation processing unit for calculating the resistance value. Reference numeral 122 denotes a display device that displays an evaluation result obtained by the numerical operation processing 120.

FIG. 2 shows two views of a top surface and a cross section of a semiconductor device formed on the semiconductor wafer 110 as an example of an evaluation target. In the figure, 201 is a back electrode, 202 is a semiconductor substrate, 203 is a silicon oxide film interface layer (SiO 2 thin film with a film thickness of 1.1 nm), 204 is a field oxide film (film thickness of 450 nm), and 205 is a high dielectric constant gate. An insulating film (4.5 nm thick HfO thin film), 206 is polycrystalline silicon (200 nm thick polysilicon thin film), and 207 is titanium silicide (45 nm thick TiSi2 thin film). These other crystalline silicon 206 and titanium silicide 207 form, for example, a gate electrode of a MOS transistor, and the silicon oxide film interface layer 203 and the high dielectric constant gate insulating film 205 form a gate insulating film. In this embodiment, a quantitative evaluation index of the film quality of a gate insulating film composed of a silicon oxide film interface layer (SiO 2 thin film with a thickness of 1.1 nm) 203 and a high dielectric constant gate insulating film (HfO thin film with a thickness of 4.5 nm) 205 is measured. It shall be. Hereinafter, in the present embodiment, the term “insulating film” simply means the gate insulating film. Note that HfO ₂ / Al ₂ O ₃ may be used as the material of this insulating film, and HfSiON, HfO ₂ , HfAlO, HfO ₂ Al ₂ O ₃ , SiN / Al ₂ O ₃ , and HfSiO may also be used. .

Next, the operation (semiconductor evaluation method) of the semiconductor evaluation apparatus according to the embodiment of the present invention configured as described above will be described.
FIG. 3 is a flowchart of the semiconductor evaluation method according to the present invention. First, in S301, the electron beam converging means converges the electron beam generated by the electron beam generating means, and the irradiation position control means controls the relative position between the semiconductor wafer 110 and the irradiation position of the converged electron beam.
Subsequently, in S302, the synchronization signal generation unit 115 generates and outputs a measurement start signal (predetermined synchronization signal) to the irradiation switching unit and the current measurement unit.

  Subsequently, in S303, the measurement start signal is received from the synchronization signal generation means 115, and the irradiation switching means starts irradiating the electron beam to the semiconductor device on the semiconductor wafer 110, and in synchronization with this measurement start signal, The irradiation amount of the electron beam is switched from an “unirradiated state” (a state where the electron beam is shielded) to an “irradiated state” (a state where the electron beam is irradiated onto the semiconductor wafer). The switching from the “unirradiated state” to the “irradiated state” of the electron beam at this time is executed in a time of 0.1 sec or less, for example. Irradiation of the electron beam to the semiconductor device is performed on the rectangular region R1 of titanium silicide forming the electrode shown in FIG. At this time, for example, 30 pA is measured by the current measuring means when the irradiation energy is 3 keV. When this electron beam is incident on an electrode made of polycrystalline silicon 206 and titanium silicide 207, the potential of this electrode changes. As a result, a transient substrate current is induced in the semiconductor substrate 202 through the gate insulating film composed of the silicon oxide film interface layer 203 and the high dielectric constant gate insulating film 205. The degree of the substrate current depends on the electrical characteristics (mainly the resistance component and the capacitance component) of the gate insulating film.

  Subsequently, in S304, in response to the measurement start signal, the current measurement means starts sampling measurement of the substrate current signal generated in the semiconductor substrate 202 in the time domain. At this time, the current measuring means samples and measures the substrate current signal with a time resolution of 0.1 sec or less, for example. 4 receives the same measurement start signal as the timing chart (upper stage) of the current amount of the electron beam when the irradiation switching means starts irradiating the semiconductor element 110 with the irradiation switching means in response to the measurement start signal. The timing chart of the clock signal when the current measuring means starts sampling measurement of the substrate current signal in the time domain (middle stage) and the measured substrate current value (lower stage) as the measurement value are shown. As shown in the figure, the irradiation switching unit and the current measuring unit are operated in synchronization with each other by the measurement start signal output from the synchronization signal generating unit 115. Measurement data, which is a measurement result by the current measurement means, is recorded as a function of time in the measurement result recording means in synchronization with the synchronization signal.

  Next, in S305, the numerical value calculation processing means 120 starts from the measurement data (relationship between the current and time indicated by the measurement result) including the time and the substrate current value recorded as the measurement result in the measurement result recording means. A constant is calculated and output as a film quality quantitative evaluation index regarding the film quality of the insulating film. Thereby, the numerical calculation processing means 120 evaluates the quality of the insulating film. FIG. 5 is an example of such a measurement data series, and shows an example of the substrate current value sampled and measured every 0.002 seconds.

  FIG. 6 shows an equivalent electric circuit in the case of calculating the film quality quantitative evaluation index of the gate insulating film made of the SiO 2 thin film with a thickness of 1.1 nm and the HfO thin film with a thickness of 4.5 nm in the semiconductor device shown in FIG. This equivalent electric circuit includes not only the semiconductor device shown in FIG. 2 but also a part of the film quality evaluation apparatus. Here, Ri is a resistance component due to a defect existing in the gate insulating film, Cg is a capacitance component of the gate insulating film, Cp is a parasitic capacitance of the measurement system, Ri is an internal resistance of the measurement system, IS represents a secondary electron signal component, and E0 represents a voltage source for generating a current corresponding to the electron beam. In FIG. 6, the above-described quantitative evaluation index of the film quality of the gate insulating film is expressed by the resistance Rg of the gate insulating film, and the elements related to the operation procedure of S303 in FIG. 3 are the voltage source E0, the switch SW, and the internal resistance Ri. The substrate current signal expressed by the operation procedure of S304 is expressed by Isub (t). The switch SW opens and closes in synchronization with the above measurement start signal. Therefore, from this equivalent electric circuit, the measurement data series in S305 can be expressed by the following equation (1).

       Isub (t) ≡ A exp (-t / (CgRg)) + B (1)

FIG. 7 shows a more specific processing form for the numerical operation processing in S305, and calculates the insulation film resistance value (gate insulation film element resistance Rg) as the above-mentioned film quality quantitative evaluation index. is there. First, in S701, a data series including a time and a substrate current value is input. FIG. 8 shows a graph of a data series measured from a semiconductor device having a gate capacitance area of 5.0 × 10 ⁻⁴ cm ² , with time on the horizontal axis and substrate current value on the vertical axis. Subsequently, the process proceeds to S702, and logarithmic calculation processing is performed on all substrate current values in the data series. Subsequently, the process proceeds to S703, and a linear approximation formula for a data series composed of time and logarithm calculation values is calculated. Next, the process proceeds to S704, where the slope of the linear approximation formula is extracted and output. FIG. 9 shows the results of performing S702, S703, and S704 on the data series shown in FIG. In this example, −4.166 × 10 ⁻² is obtained as the slope value of the linear approximation formula.

10, FIG. 11 and FIG. 12 show the results of measuring four types of semiconductor wafers with respect to the defect density of the gate insulating film. Note that the defect density of the gate insulating film elements of the four types of semiconductor wafers is extracted by the conventional measuring method as shown in FIG. 18, and wafer # 3 is 400 pieces / cm ² and wafer # 05 is 900 pieces. / Cm ² , wafer # 04 is 2700 pieces / cm ² , and wafer # 06 is 20000 pieces / cm ² . In FIG. 10, the horizontal axis represents the wafer number, and the vertical axis represents the time constant output by the apparatus. As the semiconductor device of the object to be measured, three types having a gate capacitance element area of 9.5 × 10 ⁻⁷ cm ² , 3.1 × 10 ⁻⁶ cm ² , and 1.0 × 10 ⁻⁵ cm ² are prepared. Each measurement result is shown by a line graph. As understood from the figure, the larger the gate capacitance element area, the larger the change in the time constant due to the difference in wafers. This is because the number of gate insulating film element defects included in the gate capacitance element has increased.

  Next, the design capacitance value of the gate insulating film element shown in FIG. 2 is input to the numerical calculation process 120, and the gradient value and the numerical calculation process are performed, whereby the film quality quantitative evaluation of the gate insulating film element is performed. As an index, the resistance Rg of the gate insulating film is calculated. In FIG. 12, the resistance Rg of the gate insulating film, which is a film quality quantitative evaluation index, decreases as the area of the gate capacitance element increases. This is because, as the area of the gate capacitive element increases, the number of defects included in the gate capacitive element increases and the number of leak paths through which current passes through the gate insulating film increases, resulting in a decrease in the resistance Rg of the gate insulating film. It is. In FIG. 11, the resistance Rg of the gate insulating film, which is a film quality quantitative evaluation index, is decreased in the order of wafer # 03, wafer # 05, wafer # 04, and wafer # 06. This is because as the defect density increases, the number of defects included in the gate capacitor element increases, and as a result, the number of leak paths (paths through which leak current flows) in the gate insulating film constituting the gate capacitor element increases. This is because the resistance Rg of the film is reduced.

As described above, according to the present invention, it is possible to perform in-line evaluation of the film quality quantitative evaluation index of the gate insulating film element. FIG. 13 shows the correlation between the defect density of the gate insulating film extracted from the measurement method of the prior art and the resistance value of the gate insulating film obtained from the device according to the present invention. As the defect density of the gate insulating film increases, the resistance of the gate insulating film tends to decrease. This is because as the defect density increases, the number of defects included in the gate capacitance increases and the number of leak paths in the gate insulating film increases, and as a result, the resistance Rg of the gate insulating film decreases.
As described above, the present invention makes it possible to non-contactly measure the film quality characteristic of the gate insulating film, which has been measured by physically and mechanically connecting to an external measuring instrument.

  Next, although the measurement example about the film quality quantitative evaluation index of a gate insulating film was shown in the said embodiment, this invention can also measure a quantitative evaluation index similarly about a transistor junction part or a diode junction part. FIG. 14 is a two-plane view of a top surface and a cross section of a semiconductor device according to such an example. In this figure, 1401 is an aluminum back electrode, 1402 is a semiconductor substrate (n-type silicon layer), 1403 is an impurity diffusion layer (p + layer) formed on the semiconductor substrate 1402, 1404 is a field oxide film (film thickness 450 nm), 1405 Is an interlayer insulating film (a PE-TEOS thin film having a thickness of 1000 nm), 1406 is tungsten (contact plug), and 1407 is titanium nitride. Here, an n-p + junction (pn junction) is formed by the semiconductor substrate 1402 and the impurity diffusion layer 1403, and the impurity diffusion layer 1403 is connected to tungsten 1406 which forms an electrode on the semiconductor device. That is, the n-p + junction anode formed on the semiconductor substrate 1402 is electrically connected to an electrode formed at a predetermined portion on the semiconductor device, and its cathode is connected to the semiconductor substrate 1402. Note that the relationship between the anode and the cathode of the n-p + junction is switched depending on the polarities (n-type / p-type) of the semiconductor substrate 1402 and the impurity diffusion layer 1403.

In the present embodiment, a quantitative evaluation index of quality (performance of reverse current characteristics of the junction) as an element isolation unit or a rectification unit of a junction composed of n-p + junctions is measured. This is the same as the case of evaluating the film. The electron beam of this semiconductor evaluation apparatus was applied to the rectangular region R2 of the titanium nitride 1407 shown in FIG. 14, and the amount of current at this time was 30 pA when the irradiation energy was 3 keV. FIG. 15 shows an equivalent electric circuit in the case of measuring the quantitative evaluation index of the np + junction in the semiconductor device shown in FIG. An increase in leakage current at the n-p + junction is expressed as a decrease in resistance Rj on the equivalent electrical circuit of FIG. Therefore, it is possible to measure the quantitative evaluation index of the np + junction by performing the measurement and the numerical calculation process according to a series of processing procedures shown in FIG. 3 and FIG. In this case, the numerical calculation processing means 120 calculates a time constant from the measurement data (relationship between current and time indicated by the measurement result) composed of the time recorded as the measurement result and the substrate current value as described above, and calculates the time constant. Output as a quantitative evaluation index for the quality of the joint. Thereby, the numerical calculation processing means 120 evaluates the quality of a junction part.
In the present embodiment, the design capacity value of the joint shown in FIG. 14 is input to the numerical calculation process 204, and the slope value and the numerical calculation process in step S704 of FIG. The resistance Rj of the junction is calculated as an evaluation index.

  FIG. 16 is a plan view of a semiconductor wafer used for manufacturing a semiconductor device. A large number of chips are formed on one semiconductor wafer, but some empty space remains in the semiconductor wafer. If, for example, a MOS transistor or a MOS capacitor to be a semiconductor device of this embodiment is formed in advance in such an empty space by intentionally assigning several design dimensions, the quality of the insulating film and the junction is evaluated systematically. be able to. By the way, in FIG. 16, semiconductor devices are formed dispersedly at a plurality of locations on the semiconductor wafer. In this way, when a plurality of semiconductor devices are formed in a distributed manner, how the in-plane uniformity of the semiconductor manufacturing apparatus and the warpage and distortion of the wafer itself affect the quality of the insulating film and the junction. You can investigate.

FIG. 17 is a diagram showing the arrangement of semiconductor wafers for one lot when semiconductor wafers are manufactured in lot units. Even if the distribution of evaluation indices at a plurality of measurement points on a semiconductor wafer does not vary, the measurement results of evaluation indices for each wafer may be shifted. Usually, since a plurality of wafers are processed in lot units, it is possible to examine how the gas partial pressure and temperature deviation in the chamber accommodating the plurality of wafers influences the quality of the insulating film and bonding.
As described above, by using the semiconductor evaluation technique of the present embodiment, it is possible to examine the semiconductor manufacturing process risk factors such as the warpage and distortion of the semiconductor substrate, or the gas partial pressure and temperature distribution in the chamber.

  The semiconductor evaluation apparatus described in the above-described embodiment may be configured by hardware or software. When configured by software, a program for realizing the function of the semiconductor evaluation apparatus may be stored in a recording medium such as a floppy (registered trademark) disk or CD-ROM, and read and executed by a computer. The recording medium is not limited to a portable medium such as a magnetic disk or an optical disk, but may be a fixed recording medium such as a hard disk device or a memory.

  Further, a program for realizing the function of the semiconductor evaluation apparatus may be distributed via a communication line (including wireless communication) such as the Internet. Further, the program may be distributed in a state where the program is encrypted, modulated or compressed, and stored in a recording medium via a wired line such as the Internet or a wireless line.

It is a block diagram of the semiconductor evaluation apparatus which concerns on embodiment of this invention. It is a 2nd page figure of the semiconductor device to be evaluated concerning the embodiment of the present invention. It is a flowchart which shows the flow of operation | movement of the semiconductor evaluation apparatus which concerns on embodiment of this invention. It is a timing chart for demonstrating operation | movement of the semiconductor evaluation apparatus which concerns on embodiment of this invention. It is a figure which shows an example of the measurement data which concern on embodiment of this invention. It is a figure which shows an example of the equivalent electric circuit (when measuring the quantitative evaluation parameter | index of an insulating film) which concerns on embodiment of this invention. It is a flowchart which shows the detail of the numerical calculation treatment which concerns on embodiment of this invention. It is the figure which graphed the measurement data which concern on embodiment of this invention. It is a figure which shows an example of the result of having performed the numerical calculation process with respect to the measurement data which concern on embodiment of this invention. It is a figure which shows the measurement result (average time constant-wafer number) about the defect density of a gate insulating-film element. It is a figure which shows the measurement result (average gate insulating-film resistance value-wafer number) about the defect density of a gate insulating-film element. It is a figure which shows the measurement result (average gate insulating-film resistance-gate capacitance area) about the defect density of a gate insulating-film element. It is a figure which shows the correlation with the defect density of the gate insulating film extracted from the measuring method of a prior art, and the resistance value of the gate insulating film obtained by the semiconductor evaluation apparatus by this invention. It is a 2nd page figure of the semiconductor device as other examples (when performing evaluation index measurement of a joined part) concerning the object to be measured concerning the embodiment of the present invention. It is a figure which shows an example of the equivalent electric circuit (when measuring the evaluation parameter | index of a junction part) which concerns on embodiment of this invention. It is a top view of the semiconductor wafer used for manufacture of the semiconductor device concerning the embodiment of the present invention. It is a figure which shows arrangement | positioning of the semiconductor wafer for one lot, when manufacturing the semiconductor wafer in which the semiconductor device to be measured which concerns on embodiment of this invention was formed per lot. It is a figure for demonstrating the film quality evaluation method which concerns on a prior art.

Explanation of symbols

101 Emitter 102 GUN Alignment Lens 103 Converging Lens 104 Blanking Electrode 105 MCP
DESCRIPTION OF SYMBOLS 106 Deflection electrode 107 Objective lens 108 Focus lens 109 Astigmatism correction lens 110 Semiconductor wafer 111 Substrate current detection electrode 112 Stage 113 Current voltage converter 114 Irradiation switching control circuit 115 Synchronization signal generation means 116 AD converter 120 Numerical calculation processing device 121 Storage device 122 Display device

Claims (2)

An electron beam irradiation means for irradiating an electron beam to a desired position on the semiconductor device;
Current measuring means for measuring a current generated in a semiconductor substrate constituting the semiconductor device;
Synchronization signal generating means for generating a synchronization signal for synchronizing the irradiation timing of the electron beam to the semiconductor device and the measurement timing of the current by the current measuring means;
Irradiation switching means for switching the irradiation amount of the electron beam to the semiconductor device in synchronization with the synchronization signal;
A measurement result recording means for recording the measurement result by the current measurement means as a function of time in synchronization with the synchronization signal;
An evaluation processing unit that evaluates a film or a junction constituting the semiconductor device by calculating, as an evaluation index, a time constant calculated from the relationship between current and time indicated by the measurement result recorded in the measurement result recording unit provided with a door,
The evaluation processing unit
Data input means for inputting a designed capacitance value of a capacitive element formed by the semiconductor device;
A numerical operation processing unit for calculating a resistance value of the film or the junction from the designed capacitance value and the time constant;
Comprising
A semiconductor evaluation apparatus that outputs a resistance value of the film or the junction as the evaluation index . The evaluation processing unit
Performing a logarithmic calculation process on the substrate current value of the measurement result, calculating a linear approximation formula for the result of the logarithmic calculation process, and calculating the resistance value by extracting a slope of the linear approximation formula The semiconductor evaluation apparatus according to claim 1 , wherein the apparatus is a semiconductor evaluation apparatus.

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