KR100731072B1 - Apparatus and method for testing of semiconductor device - Google Patents

Abstract

A test apparatus of a semiconductor device and a test method are provided to reduce a test time necessary for the semiconductor device and to reduce the size of the semiconductor device by embodying a DC(Direct Current) measuring part and a capacitance measuring part in one measuring unit. A test apparatus of a semiconductor device includes an automatic probe station, a probe card, a measuring unit and a control computer. The automatic probe station(10) includes a chuck for loading stably a wafer with first and second test pads capable of contacting a gate electrode and an active electrode. The probe card(20) is used for applying a DC measurement voltage or a capacitance measurement voltage to the first and second test pads. The measuring unit(40) is used for measuring gate current and gate capacitance. The control computer(30) is used for controlling the measuring unit, extracting capacitance by subtracting the gate current from the gate capacitance, and forming a capacitance curve. The measuring unit is composed of a DC measuring part and a capacitance measuring part.

Description

Test device and test method for semiconductor devices {APPARATUS AND METHOD FOR TESTING OF SEMICONDUCTOR DEVICE}

1 is a schematic view of a test apparatus for a semiconductor device according to an embodiment of the present invention.

2 is a flowchart illustrating a test method of a semiconductor device according to an exemplary embodiment of the present invention in stages.

<Explanation of Signs of Major Parts of Drawings>

10: automatic probe station 12: chuck

14: wafer 20: probe card

30 control computer 40 measurement unit

42: DC measuring device 44: capacitance measuring device.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection apparatus and an inspection method of a semiconductor device, and more particularly, to an apparatus and a measuring method of a semiconductor device capable of inspecting capacitance characteristics of a gate oxide film by measuring a gate current and a capacitance of the gate oxide film.

In recent years, high integration in semiconductor integrated circuit devices has been greatly advanced, and in semiconductor devices, devices such as transistors for coping with high integration have been miniaturized, and high performance has been attained. In addition, with the miniaturization and high performance of devices such as transistors, it is necessary to realize a reliable MIS structure (Metal Insulator Semiconductor).

In order to improve the reliability of the MIS structure, it is necessary for each part constituting the MIS structure such as a gate electrode (Metal), a gate oxide film, and a semiconductor substrate (Semiconductor), which are components of the MIS structure, to have high reliability.

In the gate oxide film, which is one of the elements constituting the MIS structure, thinning is rapidly progressed to cope with miniaturization of transistors, high speed operation, and low voltage, and ultra-thin insulating films of 2 nm or less are expected to be put into practical use in the 21st century.

As the characteristics of the gate oxide film determine the characteristics of the MIS transistor and the electrical characteristics of the semiconductor integrated circuit device, the realization of a good gate oxide film becomes more important.

Conventionally, silicon dioxide (SiO 2) has been used as a material constituting the gate oxide film. In addition, when the thickness of the gate oxide film becomes thin and becomes 2 nm or less, there is a problem that the tunnel current generated by the carrier directly tunneling the gate oxide film, that is, the gate leakage current, is further increased.

Here, as a test for examining the reliability of the gate oxide film, a so-called TDDB test has been conventionally performed under an accelerated environment. TDDB test under accelerated environment is to set the applied voltage higher than the used voltage, raise the temperature and investigate the current-voltage characteristic (IV characteristic) to measure the lifespan until insulation breakdown by judging that the insulating film is destroyed when the current is rapidly increased. That's how. In the TDDB test, it is common to monitor the amount of leakage current by investigating the characteristics of I-V and to use the time until the sudden change of the leakage current value is observed. At this time, the measurement using the MIS structure which is a capacitor with a large area from the viewpoint of the defect density in a gate oxide film is performed normally.

In addition, in-line evaluation is performed by Hg pro, which evaluates IV characteristics and the like by pushing a mercury terminal serving as a gate electrode on the gate oxide film while the gate oxide film is formed so as to omit the gate electrode formation process in the MIS structure. Burr is also widely used.

The destruction of the gate oxide film in the above various tests is generally determined by the rapid increase in the leakage current.

However, in these various tests, there is a problem in that a very thin gate oxide film (less than 30 kV) cannot accurately measure current-voltage characteristics due to leakage current due to gate tunneling and poly deflation.

SUMMARY OF THE INVENTION An object of the present invention is to provide a test apparatus and method for a semiconductor device capable of inspecting the capacitance characteristics of a gate oxide film by measuring the gate current and the capacitance of the gate oxide film.

An apparatus for testing a semiconductor device according to the present invention for achieving the above object includes a chuck on which a wafer having first and second test pads connected to a gate electrode and an active electrode of a transistor is mounted, and the chuck is mounted. A probe card for applying a DC measurement voltage or a capacitance measurement voltage that varies in a predetermined unit from a negative operating voltage to a positive operating voltage to the station, the first and second test pads, and the first and second test pads. A measurement unit for supplying the measurement voltage to a second taste pad and measuring gate current and gate capacitance, and controlling the measurement unit, subtracting the measured gate current from the measured gate capacitance to extract capacitance, and The extracted capacitance corresponds to each voltage in the operating voltage region. Rock graphics drawing (Graph Drawing) and is characterized in that a control computer that creates the gate capacitance curve.

The measuring unit may be configured to measure the gate current by applying the DC measurement voltage to the wafer and the first test pad under the control of the control computer, and to measure the capacitance measurement voltage under the control of the control computer. And a capacitance measuring device applied to the first and second test pads to measure the gate capacitance.

The DC measuring apparatus measures the gate current while varying a voltage from a negative operating voltage to a positive operating voltage in a predetermined voltage unit on the first test pad through the probe card.

The capacitance measuring device supplies a constant frequency to the first test pad through the probe card, and converts a voltage from a negative operating voltage to a positive operating voltage in a constant voltage unit to the second test pad through the probe card. It is characterized by measuring the measurement capacitance while being variable.

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According to an embodiment of the present disclosure, a method of testing a semiconductor device may include loading a wafer having first and second test pads connected to a gate electrode and an active electrode of a transistor on a chuck of an automated probe station, and having a negative polarity. Connecting a probe card to the first and second test pads, the probe card applying a DC measurement voltage or a capacitance measurement voltage that varies in a constant unit from an operating voltage to a positive operating voltage, and the first test pad through the probe card; Measuring the gate current while varying a voltage from a negative operating voltage to a positive operating voltage in a constant voltage unit, supplying a constant frequency to the first test pad through the probe card, and supplying the probe card. From the negative operating voltage to the positive operating voltage Measuring a measurement capacitance while varying a voltage in a predetermined voltage unit; extracting capacitance by subtracting the measured gate current from the measured gate capacitance; and applying the extracted capacitance to each voltage in the operating voltage region. And a step of creating a gate capacitance curve by graphic drawing.

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Hereinafter, a test apparatus and a method of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a view schematically illustrating a test apparatus for a semiconductor device according to an exemplary embodiment of the present disclosure.

Referring to FIG. 1, a test apparatus for a semiconductor device according to an embodiment of the present invention may include a wafer on which first and second test pads (not shown) connected to a gate electrode 16 and an active electrode (not shown) of a transistor are formed. An automatic probe station 10 including a chuck 12 on which the 14 is seated, and a probe card for applying a direct current (DC) measurement voltage or a capacitance measurement voltage to the first and second test pads of the wafer 14. And a measuring unit 40 for measuring a gate current and a capacitance by applying a DC measurement voltage or a capacitance measuring voltage to the probe card 20, and controlling the measuring unit 40 to measure the gate current and the capacitance. The control computer 30 is provided.

The automatic probe station 10 is shielded from external influences by a dark box or shielding box to prevent distortion of measurement data by external light or electromagnetic waves.

The measurement unit 40 is a direct current measurement device 42 for measuring a gate current by applying a direct current measurement voltage to the wafer 14 and the first and second test pads under the control of the control computer 30, and a control computer ( A capacitance measuring device 44 for measuring the gate capacitance by applying a capacitance measuring voltage to the wafer 14 and the first and second test pads under the control of 30).

The DC measuring device 42 measures the voltage from the negative (-) operating voltage (-Vg) to the positive (+) operating voltage (+ Vg) to the first test pad through the probe card 20. Measure the gate current while varying with.

The capacitance measuring device 44 supplies a constant frequency to the first test pad through the probe card 20, and at a negative (−) operating voltage (−Vg) to the second test pad through the probe card 20. The measurement capacitance is measured while varying the voltage up to the positive (+) operating voltage (+ Vg) in constant voltage units.

The control computer 30 extracts the capacitance by subtracting the gate current measured by the DC measuring device 42 from the measured capacitance measured by the capacitance measuring device 44, and subtracts the extracted capacitance from the negative (-) operating voltage. A gate capacitance curve is created by graphic drawing so as to correspond to each voltage in the positive (+) operating voltage (+ Vg) region from (−Vg).

2 is a flowchart illustrating a test method of a semiconductor device according to an exemplary embodiment of the inventive concept.

Referring to FIG. 2 in conjunction with FIG. 1, a test method of a semiconductor device according to an exemplary embodiment of the present disclosure will be described as follows.

First, the measurement target wafer 14 is placed in the automatic probe station 10 for electrical connection with the measurement equipment, and the probe card 20 is connected to the first and second test pads of the wafer 14. Next, in order to measure the gate current, the DC measuring device 42 and the capacitance measuring device 44 are connected to the probe card 20. Here, when measuring the gate current, the row terminal 50 of the measurement unit 40 is connected to the first test pad connected to the gate electrode of the wafer 14, and the high terminal 52 is connected to the active electrode. 2 is connected to the test pad and the wafer 14. In this case, in order to prevent distortion of measurement data by external light or electromagnetic waves, the automatic probe station 10 is shielded from an external influence by using a dark box or a shielding box. First step (S1)

Subsequently, a voltage from the negative (−) operating voltage (-Vg) to the positive (+) operating voltage (+ Vg) is applied to the first test pad by using the DC measuring device 42 configured in the first step S1. Variable in constant voltage units. Second step (S2)

Subsequently, the gate current Im is measured using the direct current measuring device 42 according to the operating voltage which is changed in a predetermined voltage unit as shown in Equation 1 below. Third step (S3)

In Equation 1, (dV / dt) becomes a constant when the voltage is linearly varied to have a constant slope.

Next, the frequency is set to a low range by using the capacitance measuring device 44 configured in the first step S1, and the positive polarity is positive at the negative operating voltage (-Vg) at the high terminal 52. The voltage is varied in constant voltage units up to the operating voltage (+ Vg). Fourth step (S4)

Subsequently, the measurement capacitance Cm is measured using the capacitance measuring device 44 according to the operating voltage which is changed in a predetermined voltage unit as shown in Equation 2 below. 5th step (S5)

Subsequently, the extraction capacitance C is extracted by subtracting the gate current Im measured in the third step S3 from the measurement capacitance Cm measured in the fifth step S5 as shown in Equation 3 below. Sixth step (S6)

Subsequently, the graphics C extracted in the sixth step S6 correspond to the respective voltages in the region of the negative (+) operating voltage (-Vg) to the positive (+) operating voltage (+ Vg) region. To create a gate capacitance curve. In addition, the capacitance characteristics of the gate oxide film are analyzed using the prepared gate capacitance curve. Seventh Step (S7)

Finally, the gate capacitance curve obtained in the seventh step S7 and the capacitance characteristics of the analyzed gate oxide film are printed or stored in the storage medium. 8th step (S8)

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be evident to those with ordinary knowledge in Esau.

The test apparatus and test method for a semiconductor device according to the present invention as described above have the following effects.

First, the leakage current component caused by the tunneling effect and poly deflation of the gate oxide film is measured, and the capacitance-voltage measurement data of the gate oxide film is obtained by subtracting the value from the capacitor data measured by the capacitance-voltage measurement method. You can get it.

Second, by configuring a DC measuring device and a capacitance measuring device for capacitance-voltage measurement of the gate oxide as one system, it is possible to reduce the test time of the semiconductor device and simplify the size of the device.

Claims (7)

A darkened automatic probe station including a chuck on which a wafer having first and second test pads connected to a gate electrode and an active electrode of a transistor is seated; A probe card for applying a DC measurement voltage or a capacitance measurement voltage which is varied in a predetermined unit from the negative operating voltage to the positive operating voltage to the first and second test pads; A measurement unit for supplying the measurement voltage to the first and second taste pads through the probe card and measuring a gate current and a gate capacitance; The capacitance is extracted by subtracting the measured gate current from the measured gate capacitance by controlling the measurement unit, and the gate capacitance curve is formed by graphic drawing the extracted capacitance to correspond to each voltage of the operating voltage region. A control computer to create is provided, The test apparatus of the semiconductor element characterized by the above-mentioned. The method of claim 1, The measuring unit, A direct current measuring device for measuring the gate current by applying the direct current measurement voltage to the wafer and the first test pad under the control of the control computer; And a capacitance measurement device for applying the capacitance measurement voltage to the wafer and the first and second test pads to measure the gate capacitance under the control of the control computer. The method of claim 2, The DC measuring apparatus measures the gate current while varying a voltage from a negative operating voltage to a positive operating voltage in a predetermined voltage unit on the first test pad through the probe card. . The method of claim 2, The capacitance measuring device supplies a constant frequency to the first test pad through the probe card, and converts a voltage from a negative operating voltage to a positive operating voltage in a constant voltage unit to the second test pad through the probe card. A test device for a semiconductor device, characterized by measuring a measurement capacitance while being variable. delete Loading a wafer on which the first and second test pads connected to the gate electrode and the active electrode of the transistor are loaded into the chuck of the automated probe station, Connecting a probe card to the first and second test pads to apply a DC measurement voltage or a capacitance measurement voltage that varies in a predetermined unit from a negative operating voltage to a positive operating voltage; Measuring the gate current while varying a voltage from a negative operating voltage to a positive operating voltage in a predetermined voltage unit on the first test pad through the probe card; A constant frequency is supplied to the first test pad through the probe card, and a measurement capacitance is varied while varying a voltage from a negative operating voltage to a positive operating voltage in a constant voltage unit to the second test pad through the probe card. Measuring step, Subtracting the measured gate current from the measured gate capacitance to extract capacitance, and drawing the extracted capacitance to correspond to each voltage of the operating voltage region to create a gate capacitance curve. Test method for a semiconductor device, characterized in that made. delete

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