JP4124849B2 - 対称的マルチプロセッサのクラスタのための可変粒度型メモリ共用方法 - Google Patents

対称的マルチプロセッサのクラスタのための可変粒度型メモリ共用方法 Download PDF

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Publication number
JP4124849B2
JP4124849B2 JP02103398A JP2103398A JP4124849B2 JP 4124849 B2 JP4124849 B2 JP 4124849B2 JP 02103398 A JP02103398 A JP 02103398A JP 2103398 A JP2103398 A JP 2103398A JP 4124849 B2 JP4124849 B2 JP 4124849B2
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shared
data
processor
block
line
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Japanese (ja)
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JPH10289214A (ja
JPH10289214A5 (enExample
Inventor
ジェイ スケイルズ ダニエル
ガーラチョルロー コウロシュ
アーガルワル アンシュ
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HP Inc
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Hewlett Packard Co
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9047—Buffering arrangements including multiple buffers, e.g. buffer pools
    • H04L49/9052—Buffering arrangements including multiple buffers, e.g. buffer pools with buffers of different sizes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/622—Queue service order
    • H04L47/6225—Fixed service order, e.g. Round Robin
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)
JP02103398A 1997-02-03 1998-02-02 対称的マルチプロセッサのクラスタのための可変粒度型メモリ共用方法 Expired - Fee Related JP4124849B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/794,172 US5950228A (en) 1997-02-03 1997-02-03 Variable-grained memory sharing for clusters of symmetric multi-processors using private and shared state tables
US08/794172 1997-02-03

Publications (3)

Publication Number Publication Date
JPH10289214A JPH10289214A (ja) 1998-10-27
JPH10289214A5 JPH10289214A5 (enExample) 2005-08-11
JP4124849B2 true JP4124849B2 (ja) 2008-07-23

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JP02103398A Expired - Fee Related JP4124849B2 (ja) 1997-02-03 1998-02-02 対称的マルチプロセッサのクラスタのための可変粒度型メモリ共用方法

Country Status (5)

Country Link
US (1) US5950228A (enExample)
EP (1) EP0856796B1 (enExample)
JP (1) JP4124849B2 (enExample)
CA (1) CA2228483A1 (enExample)
DE (1) DE69822534T2 (enExample)

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Also Published As

Publication number Publication date
US5950228A (en) 1999-09-07
EP0856796A3 (en) 2001-09-26
DE69822534D1 (de) 2004-04-29
JPH10289214A (ja) 1998-10-27
CA2228483A1 (en) 1998-08-03
EP0856796B1 (en) 2004-03-24
EP0856796A2 (en) 1998-08-05
DE69822534T2 (de) 2005-01-27

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