JP4104746B2 - 自動直接メモリ・アクセス機能を備えたコンピュータ・システム - Google Patents

自動直接メモリ・アクセス機能を備えたコンピュータ・システム Download PDF

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Publication number
JP4104746B2
JP4104746B2 JP27855998A JP27855998A JP4104746B2 JP 4104746 B2 JP4104746 B2 JP 4104746B2 JP 27855998 A JP27855998 A JP 27855998A JP 27855998 A JP27855998 A JP 27855998A JP 4104746 B2 JP4104746 B2 JP 4104746B2
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Japan
Prior art keywords
packet
queue
dbe
completion
request
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JP27855998A
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Japanese (ja)
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JPH11175454A (ja
JPH11175454A5 (https=
Inventor
マイケル・ピー・モリアーティ
トーマス・ジェイ・ボノラ
ブライアン・ティー・パーセル
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Compaq Computer Corp
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Compaq Computer Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP27855998A 1997-09-30 1998-09-30 自動直接メモリ・アクセス機能を備えたコンピュータ・システム Expired - Fee Related JP4104746B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/940,367 US6128669A (en) 1997-09-30 1997-09-30 System having a bridge with distributed burst engine to decouple input/output task from a processor
US940367 1997-09-30

Publications (3)

Publication Number Publication Date
JPH11175454A JPH11175454A (ja) 1999-07-02
JPH11175454A5 JPH11175454A5 (https=) 2005-11-04
JP4104746B2 true JP4104746B2 (ja) 2008-06-18

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JP27855998A Expired - Fee Related JP4104746B2 (ja) 1997-09-30 1998-09-30 自動直接メモリ・アクセス機能を備えたコンピュータ・システム

Country Status (3)

Country Link
US (1) US6128669A (https=)
EP (1) EP0905629A1 (https=)
JP (1) JP4104746B2 (https=)

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CN102693206B (zh) * 2007-01-30 2015-06-24 世意法（北京）半导体研发有限责任公司 在终点中无线usb同步的缓冲器管理
CN101237445B (zh) * 2007-01-30 2013-01-02 世意法（北京）半导体研发有限责任公司 缓冲器管理方法和用于缓冲器管理及封装wusb分组的设备
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US7861024B2 (en) * 2008-09-30 2010-12-28 Intel Corporation Providing a set aside mechanism for posted interrupt transactions
US9026698B2 (en) * 2013-03-15 2015-05-05 Intel Corporation Apparatus, system and method for providing access to a device function
US9513869B2 (en) * 2013-09-18 2016-12-06 HGST Netherlands B.V. Doorbell-less endpoint-initiated protocol for storage devices
US9778859B2 (en) 2013-09-18 2017-10-03 Western Digital Technologies, Inc. Doorless protocol having multiple queue read requests in flight
US10048878B2 (en) 2015-06-08 2018-08-14 Samsung Electronics Co., Ltd. Nonvolatile memory module and storage system having the same
US10977198B2 (en) * 2018-09-12 2021-04-13 Micron Technology, Inc. Hybrid memory system interface
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US20240045618A1 (en) * 2022-08-04 2024-02-08 Mediatek Inc. Completion Queue Handling By Host Controller For Storage Device

Also Published As

Publication number Publication date
EP0905629A1 (en) 1999-03-31
US6128669A (en) 2000-10-03
JPH11175454A (ja) 1999-07-02

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