JP4102925B2 - Active matrix type liquid crystal display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an active matrix liquid crystal display device.
[0002]
[Prior art]
In a conventional active matrix liquid crystal display device, scanning lines and data lines are provided in a matrix on a glass substrate, and a thin film transistor as a switching element is provided in the vicinity of each intersection to be connected to both lines. Is provided with a pixel electrode connected to a thin film transistor through a contact hole provided in the insulating film (see, for example, Patent Document 1). In this case, the edge of the pixel electrode is overlapped with both lines in order to increase the aperture ratio.
[0003]
[Patent Document 1]
Japanese Patent Laid-Open No. 1-156725 (FIGS. 1 and 4)
[0004]
[Problems to be solved by the invention]
However, in the liquid crystal display device having the above configuration, since the edge of the pixel electrode is overlapped with the data line, a coupling capacitance is generated in the overlapped portion, and vertical crosstalk is generated due to the coupling capacitance. There was a problem that the characteristics deteriorated. That is, for example, as shown in FIG. 10A, when the background of one pixel 41 is gray and a square black display 42 is formed therein, the potential of the pixel is shifted to the drain voltage due to the coupling capacitance. Therefore, as indicated by reference numeral 43 in FIG. 10B, the upper and lower background colors of the black display 42 are slightly darkened, the black display 42 is tailed in the vertical direction, and the display characteristics are deteriorated.
Accordingly, an object of the present invention is to provide an active matrix liquid crystal display device capable of preventing vertical crosstalk from occurring.
[0005]
[Means for Solving the Problems]
  According to the first aspect of the present invention, a scanning line and a data line provided in a matrix form, a switching element connected to the two lines in the vicinity of each intersection of the two lines, and the switching element are connected. A pixel electrode provided,Provided between the pixel electrodes, on both adjacent sidesIn an active matrix liquid crystal display device provided with an auxiliary capacitance line that is provided so as to overlap with the pixel electrode and forms an auxiliary capacitance portion by the portion overlapped with the pixel electrode, the auxiliary capacitance line includes the pixel electrode and An insulating film is provided between each data line and a part of the data line is overlapped with the data line to be formed in parallel and wider than the data line.And wider than the interval between the pixel electrodes.And a transparent auxiliary capacitance line that is wider than the light shielding portion.And the switching element is covered with the transparent auxiliary capacitance line.It is characterized by that.
  According to a second aspect of the present invention, in the first aspect of the present invention, the pixel electrode is overlapped with the scanning line in the preceding stage.
  According to a third aspect of the present invention, in the first aspect of the present invention, an extended portion that overlaps with a gap between the pixel electrode and the scan line is extended from the auxiliary capacitance line. It is a feature.
  According to a fourth aspect of the present invention, in the first aspect of the present invention, a connecting portion is provided between the auxiliary capacitance lines adjacent to each other, and the whole is in a lattice shape.
  According to a fifth aspect of the present invention, in the invention according to the fourth aspect, the connecting portion includes a gap between the pixel electrode and the scan line and a gap between the scan line and the pixel electrode in the subsequent stage. It is characterized by being superimposed.
  The invention described in claim 6 is the invention described in claim 4, wherein the connecting portion is overlapped with the thin film transistor..
[0006]
DETAILED DESCRIPTION OF THE INVENTION
  (FirstreferenceEmbodiment)
  FIG. 1 shows the first of the present invention.referenceFIG. 2 shows a transmission plan view of a main part of a thin film transistor panel in an active matrix liquid crystal display device as an embodiment. The thin film transistor panel includes a glass substrate 1. Scan lines 2 and data lines 3 are provided in a matrix on the upper surface side of the glass substrate 1, thin film transistors 4 and pixel electrodes 5 are provided in the vicinity of the intersections, and auxiliary capacitance lines 6 are parallel to the data lines 3. Is provided. Here, for the purpose of clarifying FIG. 1, oblique short solid hatching is written at the edge of each pixel electrode 5 (the same applies to the following embodiments).
[0007]
In this case, the left and right sides of the pixel electrode 5 are overlapped with the auxiliary capacitance lines 6 arranged on both the left and right sides. Thereby, in the pixel electrode 5, the regions excluding the auxiliary capacitance line 6 formation region and the thin film transistor 4 formation region on both the left and right sides are substantial pixel regions. However, a counter panel (not shown) arranged to face the thin film transistor panel is provided with a black mask at least in a portion corresponding to the thin film transistor 4 in order to prevent the external light from entering the thin film transistor 4.
[0008]
The auxiliary capacity line 6 is overlapped with the data line 3. As will be described later, the auxiliary capacitance line 6 is provided between the data line 3 and the pixel electrode 5 via an insulating film in the thickness direction, that is, in the direction perpendicular to the paper surface in FIG. . Then, the width of the auxiliary capacitance line 6 (the length in the direction parallel to the scanning line 2) becomes somewhat larger than the width of the data line 3, so that even if there is a positional shift in the parallel direction to the scanning line 2. The data line 3 is securely covered so that the data line 3 does not directly face the pixel electrode 5.
[0009]
Further, the auxiliary capacitance line 6 is arranged over almost the entire arrangement area of the data line 3, whereby the auxiliary capacitance line 6 is displaced in the direction perpendicular to the scanning line 2 with respect to the pixel electrode 5. Even in such a case, it overlaps with the pixel electrode 5 reliably, and the fluctuation of the auxiliary capacitance due to misalignment is reliably prevented.
[0010]
Next, a specific structure of the thin film transistor panel will be described. FIG. 2 is a sectional view taken along line II-II in FIG. A scanning line 2 (see FIG. 1) including a gate electrode 11 made of chromium, molybdenum or the like is provided at a predetermined location on the upper surface of the glass substrate 1. A gate insulating film 12 made of silicon nitride is provided on the upper surface of the glass substrate 1 including the gate electrode 11 and the scanning line 2.
[0011]
A semiconductor thin film 13 made of intrinsic amorphous silicon is provided at a predetermined position on the upper surface of the gate insulating film 12 on the gate electrode 11. A channel protective film 14 made of silicon nitride is provided at a predetermined position on the upper surface of the semiconductor thin film 13 on the gate electrode 11.
[0012]
Ohmic contact layers 15 and 16 made of n-type amorphous silicon are provided on both sides of the upper surface of the channel protective film 14 and on the upper surface of the semiconductor thin film 13 on both sides thereof. A source electrode 17 and a drain electrode 18 made of chromium, molybdenum or the like are provided on the upper surfaces of the ohmic contact layers 15 and 16.
[0013]
The thin film transistor 4 is constituted by the gate electrode 11, the gate insulating film 12, the semiconductor thin film 13, the channel protective film 14, the ohmic contact layers 15 and 16, the source electrode 17 and the drain electrode 18.
[0014]
A data line 3 is provided at a predetermined location on the upper surface of the gate insulating film 12. In this case, the data line 3 has a three-layer structure of an intrinsic amorphous silicon layer 3a, an n-type amorphous silicon layer 3b, and a metal layer 3c made of chromium, molybdenum or the like in order from the bottom. The intrinsic amorphous silicon layer 3a, the n-type amorphous silicon layer 3b, and the metal layer 3c are connected to the semiconductor thin film 13, the ohmic contact layer 16, and the drain electrode 18 in the drain electrode 18 formation region.
[0015]
An interlayer insulating film 19 made of silicon nitride is provided on the upper surface of the gate insulating film 12 including the thin film transistor 4 and the data line 3. An auxiliary capacitance line 6 made of chromium, molybdenum or the like is provided at a predetermined position on the upper surface of the interlayer insulating film 19 on the data line 3.
[0016]
An overcoat film 20 made of silicon nitride is provided on the upper surface of the interlayer insulating film 19 including the auxiliary capacitance line 6. A contact hole 21 is provided in the interlayer insulating film 19 and the overcoat film 20 on the source electrode 17. A pixel electrode 5 made of a transparent conductive material such as ITO or ZnO is connected to the source electrode 17 through a contact hole 21 at a predetermined location on the upper surface of the overcoat film 20.
[0017]
In the active matrix type liquid crystal display device having the thin film transistor panel having the above configuration, the auxiliary capacitance line 6 having a shape wider than the width of the data line 3 is provided between the data line 3 and the pixel electrode 5. The auxiliary capacitance line 6 can prevent a coupling capacitance from being generated between the data line 3 and the pixel electrode 5, and thus can prevent vertical crosstalk from occurring, thereby improving display characteristics. can do.
[0018]
Further, as shown in FIG. 1, the vicinity of the intersection of the scanning line 2 and the data line 3 can be shielded by the auxiliary capacitance line 6, so that the vicinity is relatively processed on the counter panel. The aperture ratio can be increased as compared with the case where light is shielded by a black mask with poor accuracy.
[0019]
Further, as shown in FIG. 1, since only the left and right sides of the pixel electrode 5 are overlapped with the auxiliary capacitance lines 6 arranged on both the left and right sides, the auxiliary capacitance lines are arranged in parallel to the scanning lines 2. The substantially U-shaped portion composed of two extended portions extending from the auxiliary capacitance line along the left and right side portions of the pixel electrode 5 and the auxiliary capacitance line between the root portions thereof is defined as the three sides of the pixel electrode 5. The aperture ratio can be increased as compared with the case of overlapping the part.
[0020]
(SecondreferenceEmbodiment)
  FIG. 3 shows a second embodiment of the present invention.referenceThe same transmission top view as FIG. 1 of the thin-film transistor panel as embodiment is shown. 3 is different from the case shown in FIG. 1 in that the upper side portion of the pixel electrode 5 is extended and overlapped with the scanning line 2 in the previous stage. In this case, the width of the scanning line 3 is larger than that shown in FIG. 1 in order to reliably prevent the upper side portion of the pixel electrode 5 from getting over the preceding scanning line 2 and interfering with the preceding thin film transistor (not shown). Is also somewhat larger.
[0021]
As described above, in the second embodiment, the upper side portion of the pixel electrode 5 is extended and overlapped with the preceding scanning line 2, so that the pixel electrode 5 and the preceding scanning line that existed in the case shown in FIG. The gap (light leaking part) between 2 can be eliminated. Therefore, it is not necessary to shield the gap with a black mask provided on the opposite panel, and the aperture ratio can be increased as compared with the case where the gap is shielded with a black mask.
[0022]
Further, since the upper side portion of the pixel electrode 5 is extended and overlapped with the preceding scanning line 2, the electric field between the upper side portion of the pixel electrode 5 and the preceding scanning line 2 is further increased. As a result, the liquid crystal interposed between the upper side portion of the pixel electrode 5 and the opposing panel is strongly regulated by the off-potential of the scanning line 2 in the previous stage. Compared to the case shown in FIG. Nation becomes smaller. Therefore, in order to conceal the disclination, the black mask provided on the counter panel can be reduced to some extent, and thus the aperture ratio can be increased.
[0023]
(ThirdreferenceEmbodiment)
  FIG. 4 shows a third embodiment of the present invention.referenceThe same transmission top view as FIG. 3 of the thin-film transistor panel as embodiment is shown. 4 is different from the case shown in FIG. 3 in that the first extending portion 6a extends in a direction parallel to the scanning line 2 from a predetermined portion of the auxiliary capacitance line 6 on the left side of the pixel electrode 5 to the right side. The first extension 6 a is overlapped with the left side of the lower side of the pixel electrode 5 on the upper side of the gate electrode 11 of the thin film transistor 4, and from the predetermined position of the auxiliary capacitance line 6 on the right side of the pixel electrode 5 to the left side. The second extending portion 6b is extended in a direction parallel to the scanning line 2, and the second extending portion 6b is provided on the right side of the lower side of the pixel electrode 5, and on the right side of the upper side of the scanning line 2 and the pixel electrode 5A in the subsequent stage. It is a point superimposed. In this case, the connection part (that is, the part of the contact hole 21 in FIG. 2) between the source electrode 17 of the thin film transistor 4 and the pixel electrode 5 is provided at a position that avoids the second extension part 6b.
[0024]
As described above, in the third embodiment, the first extending portion 6 a extending from the left auxiliary capacitance line 6 is disposed between the gate electrode 11 of the thin film transistor 4 and the left side of the lower side of the pixel electrode 5. Further, since the second extended portion 6b extending from the right auxiliary capacitance line 6 is disposed between the lower right side of the pixel electrode 5 and the scanning line 2, the pixel electrode 5 and the gate of the thin film transistor 4 are disposed. The coupling capacitance (Cgs) between the electrode 11 and the scan line 2 can be reduced. This means that the change in the pixel potential (the jump voltage ΔV) that is dragged by the change in the gate potential in the AC drive can be suppressed with a small auxiliary capacity, and the flicker that adversely affects the display quality and the reliability are adversely affected. Burning can be improved.
[0025]
In addition, since the gap between the right side of the lower side of the pixel electrode 5 and the scanning line 2 can be covered with the second extension 6b, light leakage from the gap can be eliminated. Therefore, it is not necessary to shield the gap with a black mask provided on the opposite panel, and the aperture ratio can be increased as compared with the case where the gap is shielded with a black mask.
[0026]
(4threferenceEmbodiment)
  FIG. 5 shows the fourth aspect of the present invention.referenceThe same transmission top view as FIG. 1 of the thin-film transistor panel as embodiment is shown. 5 is different from the case shown in FIG. 1 in that each predetermined portion of the two auxiliary capacitance lines 6 on the left and right sides of the pixel electrode 5 is connected by a connecting portion 6c, and this connecting portion 6c is connected to the pixel electrode 5. This is a point overlapped with the lower side and the upper side of the pixel electrode 5A in the subsequent stage. In this case, the connection portion between the source electrode 17 of the thin film transistor 4 and the pixel electrode 5 (that is, the portion of the contact hole 21 in FIG. 2) is provided at a position avoiding the connecting portion 6c.
[0027]
As described above, in the fourth embodiment, since the connecting portion 6c is overlapped with the lower side portion of the pixel electrode 5 and the upper side portion of the pixel electrode 5A in the subsequent stage, the pixel electrode 5 is connected to the auxiliary capacitance line 6 including the connecting portion 6c. All regions other than the central portion (transparent pixel) can be covered. Therefore, it is not necessary to provide a black mask for preventing light leakage on the opposing panel, and the aperture ratio can be considerably increased.
[0028]
Further, in the case of the thin film transistor 4 provided with the semiconductor thin film 13 (see FIG. 2) made of intrinsic amorphous silicon, light leakage is likely to occur. However, the thin film transistor 4 (except a part of the source electrode 17) is connected to the connecting portion 6c. Therefore, the light leakage suppression performance can be considerably improved.
[0029]
In addition, since the predetermined portions of the two auxiliary capacitance lines 6 on the left and right sides of the pixel electrode 5 are connected by the connecting portions 6c, the auxiliary capacitance lines 6 including the connecting portions 6c are in a lattice shape. Therefore, even if a disconnection occurs somewhere in the auxiliary capacity line 6 including the connecting portion 6c, a current path can be secured, and as a result, the risk of occurrence of a disconnection failure can be extremely reduced.
[0030]
Furthermore, when the auxiliary capacitance line 6 including the connecting portion 6c is in a lattice shape, for example, as shown in FIG. 1, the time constant can be reduced as compared with the case where the auxiliary capacitance line 6 is in a stripe shape. That is, if the auxiliary capacity line 6 is connected to a counter electrode (not shown) provided on the counter panel, the auxiliary capacity line 6 is driven in synchronization with the counter electrode. Since the counter electrode is driven in synchronization with the 1H signal or the 1V signal in order to correct the jump voltage ΔV in the AC drive, the rise is quicker when the resistance value is decreased and the time constant is decreased.
[0031]
(5threferenceEmbodiment)
  FIG. 6 shows the fifth aspect of the present invention.referenceThe transmission top view similar to FIG. 5 of the thin-film transistor panel as embodiment is shown. In FIG. 6, the difference from the case shown in FIG. 5 is that the width of the scanning line 2 is increased to some extent, the upper side portion of the pixel electrode 5A in the subsequent stage is overlapped with the scanning line 2, and this overlapping region and the region above it ( In other words, the connecting portion 6c is superimposed on the scanning line 2 in a region excluding a region in which hatching including a large number of points is written. That is, in the region where hatching consisting of a large number of points is written, the connecting portion 6 c is not overlapped with the scanning line 2.
[0032]
As described above, in the fifth embodiment, the connecting portion 6c is not overlapped with the scanning line 2 and the upper side portion of the pixel electrode 5A in the subsequent stage is not scanned with the scanning line 2 in the region where hatching composed of many points is written. Therefore, the electric field between the upper side of the pixel electrode 5 and the preceding scanning line 2A is further increased. As a result, the liquid crystal interposed between the upper side of the pixel electrode 5 and the opposing panel is strongly regulated by the off-potential of the preceding scanning line 2A, and the disclination is reduced. Therefore, as in the case of the second embodiment, in order to hide the disclination, the black mask provided on the counter panel can be reduced to some extent, and the aperture ratio can be increased.
[0033]
(No.1Embodiment)
  FIG. 7 shows the first aspect of the present invention.1The same transmission top view as FIG. 6 of the thin-film transistor panel as embodiment is shown. 7 is different from the case shown in FIG. 6 in that the upper surface of the interlayer insulating film 19 (see FIG. 2) under the auxiliary capacitance line 6 including the connecting portion 6c is made of a transparent conductive material such as ITO or ZnO. The auxiliary capacity line 6A is provided.
[0034]
In this case, the transmissive auxiliary capacitance line 6A is provided up to a position slightly inside the auxiliary capacitance line 6 including the connecting portion 6c in a region corresponding to the left and right side portions and the lower side portion of the pixel electrode 5. Further, the transmissive auxiliary capacitance line 6A is not provided in a region corresponding to a connection portion (that is, a portion of the contact hole 21 in FIG. 2) of the source electrode 17 of the thin film transistor 4 and the vicinity thereof. Further, the auxiliary capacitance line 6 including the connecting portion 6c is formed of a light-shielding metal made of chromium, molybdenum, or the like that can be in direct electrical contact with the transparent auxiliary capacitance line 6A made of a transparent conductive material such as ITO or ZnO. Yes.
[0035]
As described above, in the sixth embodiment, the transmissive auxiliary capacitance line 6 </ b> A is located up to a position slightly inside the auxiliary capacitance line 6 including the connecting portion 6 c in the regions corresponding to the left and right side portions and the lower side portion of the pixel electrode 5. Therefore, the auxiliary capacitance part is also formed by the overlapping portion of the transmissive auxiliary capacitance line 6 </ b> A and the pixel electrode 5 located at a slightly inner position. In addition, since the transmissive auxiliary capacitance line 6A located at a slightly inner position is formed of a transparent conductive material such as ITO or ZnO, the aperture ratio is not affected. Therefore, the size of the auxiliary capacitance can be adjusted without affecting the aperture ratio by appropriately selecting the size and shape of the transmissive auxiliary capacitance line 6A located at a slightly inner position.
[0036]
The transparent auxiliary capacitance line 6A may be provided on the upper surface of the interlayer insulating film 19 including the auxiliary capacitance line 6 as will be described with reference to FIG. 19 may be provided on the upper surface of an upper interlayer insulating film (not shown) provided on the upper surface of 19 via a contact hole provided in the upper interlayer insulating film. Further, a transmissive auxiliary capacitance line 6A is provided under the upper interlayer insulating film, and the auxiliary capacitance line 6 is connected to the transmissive auxiliary capacitance line 6A via a contact hole provided in the upper interlayer insulating film. You may make it provide.
[0037]
(No.2Embodiment)
  In each of the above embodiments, the thin film transistor 4 is an amorphous silicon thin film transistor. However, the present invention can also be applied to a polysilicon thin film transistor. Therefore, referring to FIG. 8, which is a sectional view similar to FIG.2A thin film transistor panel including a polysilicon thin film transistor as an embodiment will be described.
[0038]
As shown in FIG. 8, a first base insulating film 31 made of silicon oxide and a second base insulating film 32 made of silicon nitride are provided on the upper surface of the glass substrate 1. A semiconductor thin film 33 made of polysilicon is provided at a predetermined location on the upper surface of the second base insulating film 32. In this case, the central portion of the semiconductor thin film 33 is a channel region 33a made of an intrinsic region, and both sides thereof are a source region 33b and a drain region 33c made of an n-type impurity implantation region.
[0039]
A gate insulating film 12 made of silicon nitride is provided on the upper surface of the second base insulating film 32 including the semiconductor thin film 33. A gate electrode 11 made of chromium, molybdenum, or the like is provided at a predetermined position on the upper surface of the gate insulating film 12 on the channel region 33a. A scanning line (not shown) made of chromium, molybdenum, or the like is provided at a predetermined location on the upper surface of the gate insulating film 12 so as to be connected to the gate electrode 11.
[0040]
A first interlayer insulating film 34 made of silicon nitride is provided on the upper surface of the gate insulating film 12 including the gate electrode 11 and the like. Contact holes 35 and 36 are provided in the gate insulating film 12 and the first interlayer insulating film 34 on the source region 33b and the drain region 33c. A source electrode 17 and a drain electrode 18 made of chromium, molybdenum or the like are provided at predetermined positions on the upper surface of the first first interlayer insulating film 34 in and near the contact holes 35 and 36. A data line 3 made of chromium, molybdenum or the like is connected to the drain electrode 18 at a predetermined location on the upper surface of the first first interlayer insulating film 34.
[0041]
The thin film transistor 4 is configured by the semiconductor thin film 33, the gate insulating film 12, the gate electrode 11, the first interlayer insulating film 34, the contact holes 35 and 36, the source electrode 17 and the drain electrode 18.
[0042]
A second interlayer insulating film 37 made of silicon nitride is provided on the upper surface of the first interlayer insulating film 34 including the source electrode 17, the drain electrode 18 and the data line 3. An auxiliary capacitance line 6 made of chromium, molybdenum or the like is provided at a predetermined position on the upper surface of the second interlayer insulating film 37 on the data line 3. The auxiliary capacitor line 6 is wider than the data line 3.
[0043]
An overcoat film 20 made of silicon nitride is provided on the upper surface of the second interlayer insulating film 37 including the auxiliary capacitance line 6. A contact hole 21 is provided in the second interlayer insulating film 37 and the overcoat film 20 on the source electrode 17. A pixel electrode 5 made of a transparent conductive material such as ITO or ZnO is connected to the source electrode 17 through a contact hole 21 at a predetermined location on the upper surface of the overcoat film 20.
[0044]
In the active matrix liquid crystal display device having the thin film transistor panel having the above-described configuration, the auxiliary capacitance line 6 having a shape wider than the width of the data line 3 is provided between the data line 3 and the pixel electrode 5. The auxiliary capacitance line 6 can prevent a coupling capacitance from being generated between the data line 3 and the pixel electrode 5, thereby preventing vertical crosstalk from occurring and improving display characteristics. can do.
[0045]
(No.3Embodiment)
  By the way, since the polysilicon thin film transistor 4 has high light resistance, the thin film transistor 4 may not be shielded from light. Therefore, referring to FIG. 9 which is a transmission plan view similar to FIG.3A thin film transistor panel including the polysilicon thin film transistor 4 as an embodiment will be described.
[0046]
9 is different from the case shown in FIG. 7 in that the thin film transistor 4 is covered with the pixel electrode 5 and the transmissive auxiliary capacitance line 6A. In this case, since the pixel electrode 5 disposed in the light leakage region around the thin film transistor 4 can be a part of the transmissive pixel, the aperture ratio can be increased. Since the thin film transistor 4 is shielded by the transmissive auxiliary capacitance line 6A, the transistor characteristics are not affected by the pixel electrode 5.
[0047]
(Other embodiments)
5, 6, 7, and 9, when the liquid crystal display device is used as a reflective type, the auxiliary capacitance line 6 is formed of a high reflectivity material such as an aluminum-based metal or a silver-based metal, You may make it utilize the overlapping part with the pixel electrode 5 of this auxiliary capacity line 6 as a reflective surface for reflecting external light.
[0048]
In the above-described embodiment, the pixel electrode 5 has a stripe arrangement in which the pixel electrode 5 is linearly arranged in the column direction, and the data line 3 and the auxiliary capacitance line 6 are linearly formed in the column direction between the pixel electrodes 5. Although described, the present invention can also be applied to a so-called delta arrangement in which the pixel electrodes 5 are shifted by a half pitch for each row. In this case, the data line 3 and the auxiliary capacitor line 6 are Each pixel electrode 5 is formed in a zigzag shape extending in half a pitch of the pixel electrode 5 in parallel with the scanning line 2 between each row. Further, although the thin film transistor is used as the switching element, other switching elements such as a diode can be applied.
[0049]
【The invention's effect】
  As described above, according to the present invention, since the auxiliary capacitance line is provided between the pixel electrode and the data line via the insulating film, the auxiliary capacitance line is used to connect the pixel electrode and the data line. Thus, the generation of coupling capacitance can be prevented, and therefore vertical crosstalk can be prevented from occurring, and the display characteristics can be improved.In addition, since the light-shielding portion wider than the interval between the pixel electrodes and the transmissive auxiliary capacitance line wider than the light-shielding portion are provided so as to overlap each other, the aperture ratio can be suppressed from being reduced, and the switching element Since the transmissive auxiliary capacitance line covers the upper side, the transmissive auxiliary capacitance line serves as a shield, and the characteristics of the switching element (thin film transistor) are protected.
[Brief description of the drawings]
FIG. 1 is a first view of the present invention;referenceFIG. 6 is a transmission plan view of the main part of the thin film transistor panel in the active matrix liquid crystal display device as the embodiment.
FIG. 2 is a cross-sectional view taken along the line II-II in FIG.
FIG. 3 shows the second of the present invention.referenceThe transmission top view similar to FIG. 1 of the thin-film transistor panel as embodiment.
FIG. 4 is a third view of the present invention.referenceThe same transmission top view as FIG. 3 of the thin-film transistor panel as embodiment.
FIG. 5 shows the fourth aspect of the present invention.referenceThe transmission top view similar to FIG. 1 of the thin-film transistor panel as embodiment.
FIG. 6 shows the fifth of the present invention.threeThe transmission top view similar to FIG. 5 of the thin-film transistor panel as consideration embodiment.
FIG. 7 shows the first aspect of the present invention.1The transmission top view similar to FIG. 6 of the thin-film transistor panel as embodiment.
FIG. 8 shows the first aspect of the present invention.2Sectional drawing similar to FIG. 2 of the thin-film transistor panel as embodiment.
FIG. 9 shows the first aspect of the present invention.3The same transmission top view of the thin-film transistor panel as embodiment as FIG.
FIGS. 10A and 10B are views for explaining problems of a conventional active matrix liquid crystal display device. FIGS.
[Explanation of symbols]
1 Glass substrate
2 scanning lines
3 data lines
4 Thin film transistor
5 Pixel electrode
6 Auxiliary capacity line
6A permeability auxiliary capacity line

Claims (6)

And scanning lines and data lines arranged in a matrix, wherein the switching elements provided are connected to the two lines at each intersection near the both lines, and pixel electrodes provided to be connected to the switching element, wherein In an active matrix liquid crystal display device including an auxiliary capacitance line provided between pixel electrodes, provided to be overlapped with adjacent pixel electrodes on both sides and forming an auxiliary capacitance portion by the portion overlapped with the pixel electrode The auxiliary capacitance line is provided between the pixel electrode and the data line via an insulating film, and a part of the auxiliary capacitance line is overlapped with the data line and formed in parallel. is wider, and the wide light shielding portion than the distance of the pixel electrode, the wide transparent auxiliary capacitance line from the light-shielding portion Is provided with superposed, an active matrix type liquid crystal display device, characterized in that on the switching element is covered with the permeable storage capacitor lines.   2. The active matrix liquid crystal display device according to claim 1, wherein the pixel electrode is overlapped with the scanning line in the preceding stage.   2. The active matrix type liquid crystal display device according to claim 1, wherein an extending portion that overlaps with a gap between the pixel electrode and the scanning line extends from the auxiliary capacitance line. .   2. The active matrix type liquid crystal display device according to claim 1, wherein a connecting portion is provided between the auxiliary capacitance lines adjacent to each other, and has a lattice shape as a whole.   The invention according to claim 4 is characterized in that the connecting portion is overlapped with a gap between the pixel electrode and the scanning line and a gap between the scanning line and the pixel electrode in the subsequent stage. Active matrix liquid crystal display.   5. The active matrix liquid crystal display device according to claim 4, wherein the connecting portion overlaps the thin film transistor.

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