JP4048202B2 - Distortion compensation amplification apparatus, amplification system, and radio base station - Google Patents

Description

  The present invention relates to a digital predistortion type distortion compensation amplification apparatus generally used in a radio transmitter, and more specifically, to a digital predistortion type distortion compensation amplification apparatus used in a radio base station of a mobile communication system, and the amplification. The present invention relates to a radio base station including the apparatus.

  A radio base station in a radio communication system such as a mobile communication system, a backbone communication system, and a broadcast system transmits a radio signal with a relatively large output. A power amplifier used in a transmission apparatus is desired to output a signal linear with respect to input power, but actually has a nonlinear distortion component. Due to the nonlinearity of the power amplifier, unnecessary signal components are mixed into the output signal of the power amplifier, and the output waveform is distorted. For example, if a side lobe exceeds an allowable value on the frequency spectrum due to unnecessary signal components, adjacent channel interference occurs. In order to cope with such nonlinearity of the power amplifier, in addition to performing waveform shaping using a filter element, there is one that adopts a digital predistortion method as one of the conventional methods.

  FIG. 1 is a block diagram of an amplifying apparatus 100 that employs this method to perform distortion compensation. The amplifying apparatus 100 converts the transmission input signal, which is a digital baseband signal, into a predistortion signal (pre-compensation signal) using the distortion compensation parameter read from the look-up table 120. The predistortion signal is converted into an analog signal by the digital / analog converter 104. The modulator 106 performs modulation processing using this input analog signal. The modulated signal is, for example, a signal in the 800 MHz band of a general cellular telephone system or a 2 GHz band in IMT2000, amplified by the power amplifier 108, and transmitted through an antenna (not shown).

  A part of the transmission signal is supplied to the demodulator 112 through the distributor 110. The demodulator 112 performs demodulation processing and outputs a modulated signal. The demodulated signal is converted into a digital signal by the analog / digital converter 114 and coupled to one input of the error detection circuit 116. A delay signal formed by delaying the transmission input signal by the delay circuit 118 is input to the other input of the error detection circuit 116. The delay amount in the delay circuit 118 is an amount corresponding to the delay until the transmission input signal reaches the error detection circuit 116 via the distributor 110. The error detection circuit 116 outputs an error signal based on the difference between the feedback signal and the delay signal. The feedback signal is based on the amplified signal, but is attenuated by a distributor or the like, and ideally, the signal from the delay circuit 118 and the feedback signal from the analog / digital converter 114 coincide with each other. It is formed. That is, the error detection circuit 116 measures the difference between the signal from the delay circuit 118 and the feedback signal, increases or decreases the delay amount of the delay circuit 118, and decreases the difference. Then, the delay amount is fixed at the point where the difference becomes the minimum, and thereafter, the distortion compensation parameter in the look-up table 120 is updated so that the error in the error detection circuit 116 is reduced. The updated distortion compensation parameter is given to the distortion compensation circuit 102.

  The distortion compensation parameter is a parameter for changing the gain (amplitude) and phase of the transmission input signal in advance so as to obtain a desired linear transmission output signal with respect to the transmission input signal (a parameter that gives an inverse distortion characteristic). is there. The signal having the inverse distortion characteristic is distorted by the modulator 106, the power amplifier 108, and the like, but as a result, a desired output is formed and finally output. In the operating state, for example, updating of the delay amount of the delay circuit is performed in a cycle with a longer interval with respect to the updating of the lookup table, thereby updating various parameters in the operating state.

  In the description of FIG. 1, for simplicity, the signal processed by the distortion compensation circuit 102 is drawn as a single signal series. However, when the modulator 106 performs quadrature modulation, Ich and Qch Each process is performed on the two series of signals.

  A large number of analog elements are used in the amplifying apparatus 100 as shown in FIG. For example, a power amplifier is generally composed of a number of stages, and many elements (inductors, capacitors, etc.) are required to sharpen the characteristics of a filter that removes unwanted waves. In general, in analog elements, in addition to variations due to individual differences, characteristic variations due to temperature changes, secular changes, and the like can occur. This characteristic variation can change the signal propagation time, that is, the delay amount (and phase angle) of the signal path. That is, the time from the transmission input signal to the transmission output signal of the amplification device 100 (and the time until the feedback signal) changes. In this case, the amplifying apparatus 100 detects a change in the delay amount based on the difference between the feedback signal and the delay signal, and adjusts the delay amount of the delay circuit 118. In this way, the amplifying apparatus 100 can output a transmission signal in which distortion is compensated, following the change in the delay amount due to the secular change or the like.

  By the way, some radio base stations employ a technique in which a plurality of amplifying devices as described above are prepared and operated in parallel to synthesize outputs from the amplifying devices. The combination of a plurality of amplified outputs is performed for the purpose of obtaining larger output power, for example. It is also performed for the purpose of creating an antenna beam having a desired directivity by combining an antenna with each series and spatially combining the amplified outputs while adjusting the phase of each series (transmission diversity). . When synthesizing such amplified outputs, it is necessary that the delay amounts (and phases) of the respective sequences are exactly the same.

  However, when the delay amount of the signal path is changed due to the characteristic variation of the analog element due to the temperature change, aging change, etc. as described above, the delay amount from the transmission input signal to the transmission output signal of each series is different from each other. It will be a thing. For this reason, signals different in time are synthesized, and there is a concern that a desired large output power and a desired antenna beam pattern cannot be obtained.

Patent Documents 1, 2, and 3 disclose a conventional distortion compensation amplifying apparatus. However, none of these attempts to combine the amplified outputs of a plurality of signal sequences satisfactorily.
JP-A 63-208330 Japanese Patent Laid-Open No. 2001-189585 JP 2001-345718 A

  A general problem of the present invention is that a distortion compensation amplifying apparatus capable of maintaining a constant delay amount between a transmission input signal and a transmission output signal even if there is a variation in element characteristics due to temperature change, aging, etc. It is to provide an amplification system.

  A specific problem of the present invention is to provide a distortion compensation amplifying apparatus and an amplifying system capable of satisfactorily synthesizing amplified outputs from parallel signal paths even when there is aging and other element characteristic fluctuations. is there.

The digital predistortion type distortion compensation amplification apparatus used in the present invention includes a second delay circuit that delays a transmission input signal, and a predistortion processing for the delayed signal using a distortion compensation parameter. A distortion compensation circuit that performs amplification, an amplifier that amplifies the signal after the distortion compensation processing, a first delay circuit that further delays a signal delayed by the second delay circuit, and a signal from the first delay circuit; A calculation unit configured to calculate a distortion compensation parameter used in the distortion compensation processing based on a difference from the amplified signal;

  According to the present invention, it is possible to improve the delay amount between the transmission input signal and the transmission output signal so that the delay amount can be maintained constant even if there is a variation in element characteristics due to a temperature change or a secular change.

  Examples according to the present invention will be described below.

  FIG. 2 shows a block diagram of an amplifying apparatus 200 that performs distortion compensation formed according to the first embodiment of the present application. This amplifying apparatus can be used in a radio base station in a radio communication system. Except for the portion related to the second delay circuit on the left side of the figure, the amplifying apparatus 200 is substantially the same as the amplifying apparatus 100 of FIG.

  Using the distortion compensation parameter read from the look-up table 220, the amplifying apparatus 200 converts the input signal (delayed input signal from the second delay apparatus described later) into a predistortion signal (pre-compensation signal). A distortion compensation circuit 202 for conversion is included. The predistortion signal is converted into an analog signal by a digital / analog converter 204, subjected to modulation processing by a modulator 206, amplified by a power amplifier 208, and transmitted through an antenna (not shown). A part of the transmission signal is supplied to the demodulator 212 through the distributor 210, converted to a digital signal by the analog / digital converter 214 after demodulation, and coupled to one input of the error detection circuit 216.

  The amplifying apparatus 200 includes a second delay circuit 224 that outputs a delay input signal by delaying a transmission input signal, and a first delay circuit 218 that outputs a delay signal by further delaying the delay input signal. The output (delayed input signal) of the second delay circuit 224 is input to the distortion compensation circuit 202. The amplifying apparatus 200 forms an error signal based on the difference between the delayed signal from the first delay circuit 218 and the feedback signal from the analog / digital converter 214, and outputs the error signal to the look-up table 220. A circuit 216 is included. The delay amount in the first delay circuit 218 and the delay amount in the second delay circuit 224 are determined based on a control signal from the error detection circuit 216. The distributor 210, the demodulator 212, the analog / digital converter 214, the error detection circuit 216, and the lookup table 220 are based on the difference between the signal from the first delay circuit and the amplified signal, and the distortion compensation circuit 202. The calculation unit 226 for calculating the distortion compensation parameter used for the predistortion processing in FIG.

The operation will be described next. The operation of the amplifying apparatus 200 is also the same as that of the amplifying apparatus 100 of FIG. 1 in that non-linearity of the power amplifier 208 and the like is compensated by performing distortion compensation processing in advance by the distortion compensation circuit 202. However, the present embodiment is different in that a transmission input signal is not directly input to the input of the distortion compensation circuit 202 but a delay input signal obtained by delaying the transmission input signal by time T ₂ is input (delay amount T ₂ is preferably larger than a value defined as ΔT described later.)

This delayed input signal is input to the distortion compensation amplifier circuit 202, and the amplitude and phase thereof are controlled according to the distortion compensation parameter from the look-up table 220. This control is a distortion compensation that gives a delayed input signal a distortion having an inverse characteristic with respect to the nonlinear distortion so that a desired output can be obtained even after further nonlinear distortion caused by the modulator 206, the power amplifier 208, etc. This is called processing. The delayed input signal whose amplitude and phase are thus compensated is output as a transmission output signal through the digital-to-analog converter 204, the modulator 206, and the power amplifier 208, and is transmitted from the antenna at the subsequent stage. A part of the transmission output signal is guided to a feedback loop by the distributor 210, passes through the demodulator 212 and the analog / digital converter 214, and is converted into a digital signal (feedback signal) for comparison with the delayed input signal in the error detection circuit 216. Converted. On the other hand, the delayed input signal from the second delay circuit 224 is also input to the first delay circuit 218. The first delay circuit 218 outputs a delay signal by delaying it by a preset delay amount T ₁ . This delay amount T ₁ is determined so as to correspond to the delay from the delay input signal to the error detection circuit 216 via the distributor 210 from the distortion compensation circuit 202.

  The error detection circuit 216 compares the delay signal with the feedback signal to form an error signal. In order to perform adaptive control so that the level of the error signal is minimized, the distortion compensation parameter of the look-up table 220 is updated. The adaptive control can be performed using an existing adaptive algorithm such as a least square algorithm or a sequential correction algorithm.

Next, it is assumed that the characteristics of analog elements used in the modulator 206, the power amplifier 208, and the like have changed due to, for example, secular change, and the delay amount when passing through these elements has changed. More specifically, the delay amount up to the error detection circuit 216 via the distributor 210 from the input of the distortion compensation circuit 202, and changes from T ₁ to T _{1 +} ΔT. The amount of delay of the delay circuit 218 is T _1, it is offset by the feedback signal and the delay amount [Delta] T. By performing the adaptive control in the error detection circuit 216 in the above-described, the error signal found small conditions, resulting in T _{1 +} [Delta] T delay from T ₁ of the first delay circuit 218 by a control signal to the delay circuit 218 Change to the direction. Thus, the error detection circuit 216 can compare signals that are temporally equal.

Unlike the prior art, in the present embodiment, the second delay circuit 224 changes the delay amount from T ₂ to T ₂ −ΔT based on the control signal from the error detection circuit 216. That is, the delayed input signal is formed by delaying the transmission input signal by T ₂ −ΔT. This -ΔT corresponds to a value obtained by inverting the sign of ΔT given to the first delay circuit 218. Setting the delay amounts of the first and second delay circuits 218 and 224 in this way has the following merit. First, before the delay amount T ₁ of the delay circuit is updated, the transmission input signal input to the second delay circuit 224 receives a delay of time T ₂ by the second delay circuit 224, and further, the distortion compensation circuit 202. In order to receive the delay Tn between the distributors 210, a delay of a total time T ₂ + Tn (1) is received from the input terminal of the second delay circuit 224 to the output terminal of the distributor 210.

Next, as described above, when Tn becomes Tn + ΔT due to a change in the delay amount in the modulator 206, the power amplifier 208, or the like, the error detection circuit 216 compares the signals at the same timing with each other. The delay amount of the first delay circuit 218 is updated to T ₁ + ΔT. Further, the delay amount of the second delay circuit 224 is also updated to T ₂ −ΔT.

Therefore, as a result, the delay time from the input terminal of the second delay circuit 224 to the output terminal of the distributor 210 after the delay amount update of the first delay circuit 218 is (T ₂ −ΔT) + (Tn + ΔT) = T ₂ + Tn, which is equal to the delay amount (1) (T ₂ + Tn) before updating the delay amount of the delay circuit for distortion compensation processing. This means that the time (delay time) from when the transmission signal is input to when it is output to the amplifier 200 can be made constant before and after the delay amount of the delay circuit for distortion compensation processing is updated. To do. The delay variation ΔT may be positive or negative. This is because a delay that cancels the delay amount introduced into the first delay circuit 218 may be introduced into the second delay circuit 224. T ₁ + T ₂ is, for example, several tens of microseconds, and ΔT is, for example, several tens of nanoseconds.

  In general, the amount of delay variation from the input of the second delay circuit 224 to the output of the distributor 210 is larger than the amount of delay variation from the distributor 210 to the input of the error detection circuit 216. This is because the former includes an analog filter and a large number of amplification stages and has a larger number of analog elements, so that it is susceptible to temperature change, secular change, etc. in addition to a large delay amount. In addition to the fluctuation of the delay amount in the analog domain, the fluctuation of the delay quantity in the digital domain can theoretically be different, but the digital element is different from the analog element. The amount of delay is negligibly small. Therefore, it is assumed that the cause of ΔT is mainly present between the distortion compensation circuit 202 and the distributor 210, and control for adding (−ΔT) to the second delay circuit 224 is performed ignoring the fluctuation of the delay amount of the feedback system. Even so, the delay time of the main signal of the amplifying apparatus 200 can be maintained substantially constant.

  FIGS. 3 and 4 show memories that can be used for the first delay circuit 218 and the second delay circuit 224 of FIG. FIG. 3 shows an example in which a delay circuit is configured using a FIFO type memory (First in First out Memory). The input signal can be the transmission input signal or delayed input signal of FIG. This type of memory is configured such that the first stored data item is retrieved first. Data 1 to data N are written in order, data N + 1 and later are overwritten on data 1 and later, and this is cyclically repeated. Data items are sequentially extracted from the output in a cyclic manner with a delay from the input signal by a time corresponding to the set delay amount. In this way, a delay circuit can be configured.

  FIG. 4 shows an example in which a delay circuit is configured using a delay element such as a flip-flop circuit and a selector. This delay circuit comprises a plurality of delay elements T coupled in series and a selector coupled to the output of each delay element. The input signal is input from one side of the delay elements connected in series, and the stored contents are sequentially shifted each time the clock advances (in the figure, it is shifted from the left side to the right side). The selector selects any one of the outputs of the delay elements based on the control signal as an output signal. For example, when the output of the rightmost delay element is selected, it is possible to output a signal sequence delayed by the maximum delay amount (total number of delay elements).

  5 and 6 show a configuration example in the case where a plurality of amplification devices 200 described in FIG. 2 are prepared and operated in parallel. In FIG. 5, a transmission input signal is input to two amplifying devices, and outputs from each amplifying device are combined in parallel by a combiner and output from an antenna. If the delay time between AB and CD is matched in the initial state for each amplification device, even if the delay amount of the first delay circuit 218 is updated, the timing input to the synthesizer or the like is the same. A suitable synthesis can be performed. In this example, the two amplifying devices are combined in parallel in a circuit, so that a large amount of power can be obtained, and even if one of them fails, transmission can be maintained at half the output. This is advantageous in that a highly reliable system can be constructed without causing waves to stop.

  FIG. 6 is the same until the transmission input signal is input to the two amplifying devices, but differs in that the signals amplified by the amplifying devices are spatially combined (diversity combining). Also in this case, the delay amount required to pass through each amplifying device is always kept equal, so that it is possible to perform spatial synthesis satisfactorily. Spatial synthesis in this way is advantageous in that the power loss at the time of synthesis is less than that in the case of circuit synthesis before transmission as shown in FIG. Use of a plurality of antennas is also advantageous in that it is possible to easily form beam waveforms that are difficult to form with a single antenna. In FIG. 5 and FIG. 6, the number of amplifier circuits is two for simplicity, but more amplifiers can be operated in parallel.

  FIG. 7 is a block diagram of an amplification system 700 according to the second embodiment of the present application. The amplification system 700 includes first and second amplification devices 702 and 704 that receive transmission input signals, respectively. The first and second amplifying devices 702 and 704 have the same configuration as that described in FIG. The outputs of these amplifying devices are synthesized in a circuit by a first synthesizer 706 and coupled to an antenna not shown. The amplification system 700 according to this embodiment further includes a phase difference detector 708 that detects a phase difference between the output signals of the amplification devices 702 and 704. As described above, the delay amounts of the first and second amplification systems 702 and 704 are maintained to be equal. However, in addition to the temperature characteristics and aging, a phase shift caused by the carrier of the output signal occurs. obtain. The phase difference detection circuit 708 detects and compensates for this phase difference.

  The phase difference detector 708 has a distributor 710 coupled to the distributor 210 of the first amplifying device 702, and extracts a part of the transmission output signal of the first amplifying device 702. The extracted signal is input to the attenuator 712. The signal attenuated to an appropriate level by the attenuator 712 is input to the phase shifter 714, and the phase of the signal is adjusted. The output of the phase shifter 714 is given to one input of the second synthesizer 716. If the signal level extracted from distributor 210 of first amplifying apparatus 702 is sufficiently high, in addition to inputting the signal extracted from distributor 210 to demodulator 212, attenuator 712 or phase shifter is used. It is also possible to input to the device 714. Similarly, the transmission output signal of the second amplifying device 704 is given to the other input of the second synthesizer 716 via the distributor 718, the attenuator 720 and the phase shifter 722. The second combiner 716 outputs a combined signal obtained by combining the signals from the respective paths. The level detector 724 detects the phase difference based on the combined signal and supplies it to the controller 726. The control device 726 gives a control signal to the distortion compensation circuit 202 of the first amplifying device 702.

  In the phase shifters 714 and 722, when the maximum combined output is obtained by the first combiner 706, the phase is adjusted so that the minimum combined output can be obtained by the second combiner. That is, they are synthesized with opposite phases. Since the phase to be adjusted is a relative amount between signals, in principle, the phase can be adjusted by only one of the two phase shifters 714 and 722. However, it is preferable to provide phase shifters in both signal paths from the standpoint of ease of actual adjustment.

  The phase-adjusted signal is synthesized by the second synthesizer 716. Since the phase is adjusted so that the minimum combined output can be obtained by the second combiner when the maximum combined output is obtained by the first combiner 706, the signal level detected by the level detector 724 is Expresses the magnitude of the phase difference. That is, large and small combined outputs correspond to small and large detected signal levels, and further correspond to small and large phase differences. Therefore, in order to reduce the phase difference, it is necessary to control to reduce the detected signal level. The control device 726 finds a phase difference for minimizing the signal level from the level detector 724 using a known adaptive algorithm such as a least square algorithm or a successive approximation algorithm. The control device instructs the distortion compensation circuit 202 of the first amplifying device 702 to give an appropriate phase angle to the delayed input signal so as to compensate for the phase difference. As a result, not only the delay amount of the first and second amplifying devices 702 and 704 but also the phase difference between them can be adjusted and the signals can be combined.

  According to the present embodiment, this can be realized by simply adding the phase detection circuit 706 without changing the configuration of the first and second amplification devices 702 and 704. Therefore, the present embodiment is a preferable form from the viewpoint of easily realizing the amplification device without changing it.

  In this embodiment, transmission output synthesis and phase difference detection synthesis are performed separately. However, from the viewpoint of detecting a deviation from the optimum value of the synthesized transmission output, it is not always necessary to perform them separately. Absent. It is theoretically possible to detect a phase difference by extracting a part of the output from the first combiner 706. However, from the viewpoint of detecting a phase difference with high accuracy by reducing signal loss related to signal extraction, it is preferable to configure as in the present embodiment. This is because the signal loss amount when extracting the low power signal before synthesis is smaller than the signal loss amount when extracting the high power signal after synthesis, so that the signal can be extracted with high accuracy.

  In this embodiment, in order to compensate for the phase difference, the control device 726 instructs the distortion compensation circuit 202 to give a phase angle. However, it is also possible to compensate by giving such an instruction to the error detector 216. In any case, an appropriate phase angle may be given to the delayed input signal.

  In this embodiment, the phase of the signal on the first amplifying device 702 side is adjusted. However, the second amplifying device 704 side can be adjusted or both can be adjusted. It is. This is because the phase to be adjusted is a relative amount between signals as described above.

  In this embodiment, the phase difference detection circuit 708 is applied to an amplification system that synthesizes signals in a circuit as shown in FIG. 5, but is also applied to an amplification system that performs diversity synthesis as shown in FIG. It is possible. In this case, the outputs of the distributors 710 and 718 may be coupled to independent antennas without providing the first combiner 706.

  FIG. 8 shows a block diagram of an amplification system 800 according to the third embodiment of the present application. The amplification system 800 includes first and second amplification devices 802 and 804 that receive transmission input signals, respectively. The first and second amplifying devices 702 and 704 are substantially the same as those described with reference to FIG. The outputs of these amplifying devices are synthesized in a circuit by a synthesizer 806 and coupled to an antenna not shown. The amplification system 800 according to this embodiment further includes a first switch 808 coupled to the demodulator 212 of the first amplification device 802. One input A of the first switch 808 is coupled to the distributor 210. The amplification system 800 has a second switch 810 coupled to the distributor 210 of the second amplification device 804. One output A of the second switch 810 is coupled to the demodulator 212 of the second amplifier 804. The other output B of the second switch 810 is coupled to the other input B of the first switch 808 via the phase shifter 812.

  The amplification system 800 has two operation modes, a normal operation mode and a phase adjustment mode. In the normal operation mode, the first switch 808 outputs one input A to the demodulator 212 and the second switch 810 outputs the input from one output A. In this operation mode, each of the amplifying devices 802 and 804 performs a parallel operation independently, and performs the same operation as described in FIG.

  In the phase adjustment mode, the first switch 808 outputs the other input B to the demodulator 212, and the second switch 810 outputs the input from the other output B. This output is input to the other input B of the first switch 808 via the phase shifter 812, and as a result, input to the demodulator 212 of the first amplifier 802. In the phase shifter 812, the phase from the distributor 210 of the second amplifying device 804 to the first switch 808 is equal to the phase from the distributor 210 of the first amplifying device 802 to the first switch 808. Adjust the phase so that

  In this operation mode, the first amplification device 802 forms a feedback signal based on the transmission signal of the second amplification device 804 instead of its own transmission output signal, and the error detection circuit 216 compares the signals. Is called. If the passing phases of the power amplifiers of the amplifiers 802 and 804 are both equal, the phase difference is zero. However, if the passing phases are different between the amplifiers, the error detection circuit 216 of the first amplifier 802 detects the phase difference. The error detection circuit 216 instructs the distortion compensation circuit 202 of the second amplifying device 804 to give a phase angle that compensates for this phase difference. Since the phase difference to be adjusted is a relative amount between signals, the first amplifying device 802 side may be adjusted instead of the second amplifying device 804 side. When the phase adjustment is completed, the switch is switched again to shift to the normal operation mode. Since the secular change and the temperature change do not occur so frequently, the first and second switches 808 and 810 need not be switched so frequently. For example, it can be performed every tens of minutes.

  According to the present embodiment, the newly added elements are only the first and second switches 808 and 810 and the phase shifter 812. Therefore, this embodiment is a preferable form from the viewpoint of detecting the phase with a small number of elements.

  Although this embodiment is applied to an amplification system that synthesizes signals in a circuit as shown in FIG. 5, it can also be applied to an amplification system that performs diversity synthesis as shown in FIG. In this case, the outputs of the distributors 210 and 210 may be coupled to independent antennas without providing the combiner 806.

  As described above, according to the embodiment of the present invention, the delay amount of the first delay circuit is adjusted based on the difference between the feedback signal and the delay signal, and the delay amount of the second delay circuit is offset so as to cancel out this delay amount. Is adjusted. As a result, the delay amount from the transmission input signal to the transmission output signal is maintained substantially constant even if the delay characteristic of the signal path changes due to aging.

  According to the embodiment of the present application, since each amplifying device in a plurality of signal paths can maintain a constant delay amount, it is possible to synthesize an equally delayed amplified output, either in a circuit or It becomes possible to synthesize outputs well spatially.

  According to the embodiment of the present application, the phase difference of the signal output from each amplification device is detected, and the phase angle of the predistortion signal (pre-compensation signal) is adjusted so as to compensate for this phase difference. As a result, not only the delay amount from the transmission input signal to the transmission output signal but also the phase shift due to the carrier wave is adjusted, and it becomes possible to perform better output synthesis.

  According to the present embodiment, the phase difference is detected by the synthesizer that synthesizes the output signals from the amplification devices. As a result, it is possible to directly search for the optimum value of the combined signal, and it is possible to easily and directly realize the amplification system of the present application.

  According to the embodiment of the present application, the switch for switching the signal path is provided, and the feedback signal of the amplification device is formed based on the transmission output signal of another amplification device different from the amplification device. Thereby, it is possible to detect the phase difference by the error detection circuit in the amplification device without providing complicated detection means.

  As described above, the present invention has been described based on specific embodiments, but the present invention is not limited to these embodiments, and can be widely applied to amplification apparatuses that perform digital predistortion distortion compensation. .

It is a block diagram of the conventional distortion compensation amplifier. 1 is a block diagram of a distortion compensation amplifying apparatus according to a first embodiment of the present application. FIG. It is a conceptual diagram which shows the delay circuit which can be used for a 1st or 2nd delay circuit. It is a conceptual diagram which shows the delay circuit which can be used for a 1st or 2nd delay circuit. 1 is a conceptual diagram of an amplification system using an amplification device according to an embodiment of the present application. 1 is a conceptual diagram of an amplification system using an amplification device according to an embodiment of the present application. 1 is a block diagram of an amplification system according to an embodiment of the present application. 1 is a block diagram of an amplification system according to an embodiment of the present application.

Claims (13)

In a digital predistortion type distortion compensation amplification apparatus, a second delay circuit that delays a transmission input signal, and a distortion compensation circuit that performs predistortion processing on the delayed signal using a distortion compensation parameter; An amplifier that amplifies the signal after the distortion compensation processing, a first delay circuit that further delays the signal delayed by the second delay circuit, a signal from the first delay circuit, and the amplified signal based on the difference, e Bei a calculation unit for calculating a distortion compensation parameter used for pre-distortion compensation processing, the calculating unit, based on the difference, the control for varying the delay amount of the first delay circuit, And a digital predistortion type distortion compensation amplifying apparatus comprising: control means for performing control for giving a fluctuation opposite to the fluctuation direction to the delay amount of the second delay circuit . The delay amount of variation in the size of the first delay circuit, the second delay circuit of the delay amount of the variation of equal to the size digital predistortion type distortion compensation amplifying apparatus according to claim 1, wherein . 2. An amplifying system having an amplifying device coupled to each of two or more antennas, wherein the amplifying device comprises the distortion compensating amplifying device according to claim 1. 4. The amplification system according to claim 3 , wherein the phase angle of the signal input to the distortion compensation circuit is detected so as to detect a phase difference between transmission output signals output from each amplification device and compensate for the phase difference. An amplification system characterized by adjusting. 5. The amplification system according to claim 4 , further comprising a synthesizer for synthesizing output signals from two or more amplifying devices, wherein the phase difference is detected by an output signal level of the synthesizer. system. The amplification system according to claim 3 , further comprising a switch for switching a signal path so that a feedback signal of an amplification device is formed based on an output signal of an amplification device different from the amplification device. system. 2. An amplifying system comprising two or more amplifying devices and a first combiner coupled to an antenna for synthesizing output signals from the amplifying devices, wherein the amplifying device comprises the distortion compensating amplifying device according to claim 1. Amplification system. 8. The amplification system according to claim 7 , wherein the phase angle of the signal input to the distortion compensation circuit is detected so as to detect a phase difference between transmission output signals output from each amplification device and compensate for the phase difference. An amplification system characterized by adjusting. 9. The amplification system according to claim 8 , further comprising a second synthesizer that synthesizes output signals from two or more amplifying devices, wherein the phase difference is detected based on an output signal level of the synthesizer. Amplifying system. 8. The amplification system according to claim 7 , further comprising a switch for switching a signal path so that a feedback signal of an amplification device is formed based on an output signal of an amplification device different from the amplification device. system. 2. The distortion compensation amplifying apparatus according to claim 1, wherein the second delay circuit comprises a first-in first-out memory. 2. The distortion compensation amplifying apparatus according to claim 1, wherein the second delay circuit includes a plurality of delay elements connected in series and a selector for selecting any one output from the plurality of delay elements. A distortion compensation amplifying apparatus. In a radio base station for a mobile communication system having a digital predistortion type distortion compensation amplification device, the distortion compensation amplification device has a second delay circuit for delaying a transmission input signal, and the delayed signal, A distortion compensation circuit that performs predistortion processing using a distortion compensation parameter, an amplifier that amplifies the signal after the distortion compensation processing, and a first delay that further delays the signal delayed by the second delay circuit a delay circuit, based on the difference between the signal and the signal after the amplification from the first delay circuit, e Bei a calculation unit for calculating a distortion compensation parameter used for pre-distortion compensation processing, the calculation unit, based on the difference, wherein the first control for varying the delay amount of the delay circuit, and having a control means for controlling to provide a variation of the fluctuation direction opposite to the delay amount of the second delay circuit The radio base station for a mobile communication system.

Images