JP4040312B2 - Solid-state imaging device and imaging apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device that receives an optical signal from a subject and an imaging apparatus using the same.
[0002]
[Prior art]
A solid-state imaging device (for example, an AF sensor for measurement) in which a photoelectric conversion region in which a plurality of photodiodes are arranged on a semiconductor substrate and a readout circuit that reads out signals from the photodiode are formed is affected by the influence of ambient temperature. , Characteristics change.
[0003]
For this reason, the solid-state imaging device has a temperature measurement circuit that measures the temperature of the solid-state imaging device.
[0004]
Further, there is a solid-state imaging device in which sensors for different uses such as an AE sensor for photometry and an AF sensor for distance measurement are formed on the same semiconductor substrate.
[0005]
[Problems to be solved by the invention]
However, if a photoelectric conversion region and a readout circuit as well as a temperature measurement circuit are arranged in the solid-state imaging device, problems such as an increase in circuit scale and noise due to an increase in circuits and an increase in wiring arise.
[0006]
The same problem also applies to a solid-state imaging device in which a plurality of sensors for different uses are formed on the same semiconductor substrate.
[0007]
[Means for Solving the Problems]
In order to solve the above-described problem, as one means, each has a plurality of photoelectric conversion units, a plurality of photoelectric conversion regions used for different applications, and temperature information of a semiconductor substrate on which the photoelectric conversion regions are formed A solid-state imaging device having a temperature circuit for obtaining a photoelectric conversion region and a driving circuit for driving the photoelectric conversion region, the first imaging terminal for outputting a signal to the outside of the solid-state imaging device, and the plurality of photoelectric conversions A signal from the region and a signal from the temperature circuit are output from the common first terminal , and the driving circuit outputs a plurality of scanning circuits for outputting signals from the plurality of photoelectric conversion regions. A solid-state imaging device characterized by applying a common control pulse for a scanning circuit .
[0010]
In addition, an imaging apparatus comprising the solid-state imaging device described above and a signal processing circuit that processes a signal from the solid-state imaging device is provided.
Further, a semiconductor in which a photoelectric conversion region for photometry having a plurality of photoelectric conversion portions, a photoelectric conversion region for distance measurement having a plurality of photoelectric conversion portions, and the photoelectric conversion regions for photometry and distance measurement are formed. An AE and AF integrated sensor having a temperature circuit for obtaining temperature information of a substrate and a drive circuit for driving the photoelectric conversion region, and a first terminal for outputting a signal to the outside of the solid-state imaging device And the signal from the plurality of photoelectric conversion regions and the signal from the temperature circuit are output from the common first terminal, and the drive circuit receives signals from the plurality of photoelectric conversion regions. Provided is a sensor integrated with AE and AF, wherein a common scanning circuit control pulse is applied to a plurality of scanning circuits for output.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0012]
(Embodiment 1)
FIG. 1 is a diagram for explaining the first embodiment.
[0013]
In the figure, 100 is a solid-state imaging device (CMOS sensor formed by a CMOS process) in which a plurality of circuit units are formed on a Si semiconductor substrate, and 101 is a plurality of photoelectric conversion units for performing phase difference detection type distance measurement. An AF circuit block having a photoelectric conversion area including 102, an AE circuit block having a photoelectric conversion area including a plurality of photoelectric conversion units for performing photometry, 103 a thermometer circuit block for monitoring the temperature of the solid-state imaging device, Reference numeral 104 denotes a multiplexer (MPX) for selecting an output signal, reference numeral 105 denotes an AGC circuit for controlling an accumulation time, and reference numeral 106 denotes a power supply circuit for generating a reference potential of each circuit block.
[0014]
Reference numeral 107 denotes a logic circuit including a communication circuit (I / O) with an external microcomputer and a timing generator (T / G) which is a drive circuit for driving a photoelectric conversion region. Here, from the logic circuit, the shift pulse (φH) is commonly applied to the AF circuit block 101 and the AE circuit block, and the start pulse is separately applied to the AF circuit block and the AE circuit block. . That is, the shift pulse is simultaneously applied to both the AF circuit block and the AE circuit block, but the start pulse can be individually applied to the AF circuit block and the AE circuit block. After reading the signal from the block, the signal from the AE circuit block can be read.
[0015]
Reference numeral 108 denotes a signal amplifying circuit for amplifying the AF signal, and reference numeral 109 denotes an external AD converter built-in microcomputer.
[0016]
The AF circuit block 101 includes three AF circuit pairs 110 in order to perform three-point AF (autofocus at three positions). The 110 AF circuit pair is composed of two AF linear sensor circuits 110A and 110B, and enables autofocus by a phase difference detection method. The AE circuit block 102 includes four AE circuits 110, an Is compensation circuit, a signal amplification circuit, and a shift register in order to perform 4-division evaluation metering (whole metering and three-point spot metering).
[0017]
Next, detailed description of each circuit will be given.
[0018]
FIG. 2 shows a specific circuit diagram of the AF linear sensor circuits (110A, 110B) constituting the AF circuit block. The CMOS linear AF sensor shown in the figure is a circuit proposed by the present applicant in Japanese Patent Laid-Open Nos. 2000-180706 and 2000-78472. In the figure, 1 is a PN junction photodiode which is a photoelectric conversion unit that performs photoelectric conversion, 2 is a reset MOS transistor that resets the potential of the PN photodiode to VRES, and 3 is for amplifying the charge generated in the PN photodiode. 4 is a MOS capacitor for storing the output voltage of the differential amplifier circuit, 5 is a MOS transistor for a memory switch, and 6 is a source follower for amplifying and reading charges held in the memory 4. Circuit. Here, by feeding back the output of the 6 source follower circuit to the 3 differential amplifier circuit, it is possible to suppress the offset variation and the gain reduction of the output voltage.
[0019]
7 is a clamp capacitor, 8 is a MOS switch for inputting a clamp potential, and 6 and 7 constitute a clamp circuit. Reference numerals 9 to 12 are switch MOS transistors, 13 is a differential amplifier for detecting a minimum value, and 14 is a differential amplifier for detecting a maximum value. Each differential amplifier constitutes a voltage follower circuit. Reference numeral 15 denotes a minimum value output MOS switch, 16 denotes a maximum value output MOS switch, 17 denotes an OR gate, 18 and 19 denote constant current MOS transistors, and 20 denotes a scanning circuit (shift register). The 14 minimum value detection circuit uses an NMOS source follower circuit at the final stage, and the 15 maximum value detection circuit uses a PMOS source follower circuit at the final stage. Reference numeral 21 denotes a common output line from which AF signals from the pixels are output.
[0020]
In this circuit configuration, by providing a feedback type noise clamp circuit in front of the maximum value detection circuit and the minimum value detection circuit, reset noise generated by the photodiode, sensor amplifier, maximum value detection circuit, and minimum value detection circuit The generated FPN can be removed. In addition, a voltage follower circuit in which the final output stage is a source follower type is configured for each pixel, and when the maximum value is output, the constant current source in the output stage of each voltage follower is turned off, and the output line connected to the constant current source By making the common connection, the minimum value of the video signal can be obtained.
[0021]
When outputting the AF image signal, the constant current source at the output stage of each voltage follower is turned on, and the 20 shift registers are scanned with the drive pulses (φH, φHs), and the voltage follower circuits are sequentially applied to the output lines. By connecting, a serial AF image signal can be obtained. By this operation, the maximum value detection circuit and the AF image signal output circuit can be used together, so that the chip can be miniaturized.
[0022]
FIG. 3 is a circuit diagram of a photocurrent logarithm compression output type AE circuit constituting the AE circuit block 102. In the figure, 112 is a CMOS differential amplifier, 113 is a PN junction photodiode as a photoelectric conversion unit, 114 is a PN junction diode, and 115 is a MOS switch controlled by a shift register. Since the potential at both ends of the PN junction photodiode 113 becomes the reference potential Vc, the potential between both ends is in a zero bias state. Therefore, since the spread of the depletion layer is suppressed, generation of dark current from the depletion layer can be suppressed. The photocurrent generated in the photodiode flows through the PN junction diode 114 and is converted into a current voltage.
[0023]
At this time, logarithmic conversion output according to the following equation is performed according to the current-voltage characteristics of the diode.
[0024]
Vout = Vc + (kT / q) ln (Ip / Is)
Where k is Boltzmann's constant, T is the absolute temperature, q is the elementary charge quantity, I _P is the photocurrent, I _S is the reverse saturation current of the diode.
[0025]
This expression can be seen that also varies AE characteristics when I _S varies. Therefore, in order to suppress variations, 111 _IS correction circuits are required. Further, as can be seen from the above equation, V _OUT depends on T. Therefore, in order to obtain an accurate photometric value, accurate measurement of the temperature of the solid-state imaging device is essential.
[0026]
FIG. 4 shows a circuit diagram of the thermometer circuit 103. In the figure, 116 is a PN junction diode, 117 is a constant current source, and 118 is a CMOS differential amplifier. The thermometer circuit in this embodiment is a circuit using the temperature characteristic (about −2 mV / ° C.) of the built-in voltage of the PN junction diode, and is multiplied by a gain of R2 / R1 by the next stage CMOS amplifier circuit to MPX. Output. By directly measuring the temperature of the solid-state image sensor, it is possible to use the data as dark current correction data of the solid-state image sensor and sensitivity correction data of the AE circuit. Thereby, it is possible to realize high-precision photometry performance and distance measurement performance.
[0027]
In the present embodiment, the AE circuit, the AF circuit, and the thermometer circuit are formed on the same semiconductor substrate, and the output signal from each circuit is selected by the multiplex circuit, so that each of the common output terminals can select each output signal. Signals are output from the solid-state imaging device in time series. Further, the shift register control pulses (φHs, φH) of the AF circuit and the AE circuit are also used. By sharing the control pulse, the 107 logic circuits can be reduced.
[0028]
Next, an operation sequence of the solid-state imaging device in the present embodiment will be described with reference to an operation flowchart of FIG.
[0029]
First, the power of the solid-state imaging device is turned on, and each circuit block (AF circuit, AE circuit, thermometer circuit, etc.) is set to a standby state.
[0030]
In the next reset period, the charge accumulated in the photodiode is reset.
[0031]
After resetting, the first temperature signal reading is performed. Simultaneously with this temperature signal reading, accumulation of photocharge in the AF photodiode is started. Simultaneously with the start of accumulation, accumulation time control is performed by monitoring the maximum value signal and the minimum value signal from all or some of the pixels. The difference calculation between the maximum value signal and the minimum value signal is performed in the AGC circuit, and the accumulation is continued until the comparator output is inverted by the comparison calculation of the difference signal and the reference potential (VBB). However, when the maximum accumulation time set by the system is reached, even if the comparator output is not inverted, accumulation ends at that point (in the case of an ultra-low brightness shooting state, an ultra-low contrast subject, etc.) .
[0032]
The gain of the signal amplifier circuit is determined according to the level of the difference signal at the end of accumulation, and the AF image signal from the AF circuit block is amplified and output to the outside. As described above, autofocus in a wide luminance range can be achieved by expanding the dynamic range of the sensor by accumulation time control and gain control.
[0033]
After the AF signal is read, MPX is switched to read the AE signal. In this embodiment, since the multi-division AE is used, the AE shift register is driven to sequentially read out data.
[0034]
After the reading of the AE signal is completed, the MPX is switched to read the temperature signal for the second time, and then the power is turned off to end the sensor operation.
[0035]
This embodiment is characterized in that the thermometer output is driven twice before and after the AF signal output and the AE signal output. This is to reduce a temperature measurement error due to the temperature of the solid-state imaging device being different before and after the operation of the AE circuit and the AF circuit. Immediately after the image pickup apparatus is turned on, the temperature of the solid-state image sensor is the same as the ambient temperature. When sufficient time has passed and the heat dissipation of the package and the heat generation of the solid-state image sensor are balanced, the temperature of the solid-state image sensor becomes constant.
[0036]
Therefore, when the method of estimating the temperature of the solid-state image sensor from the package temperature as in the past or when the temperature measurement is performed only once, an error occurs in the measured temperature of the solid-state image sensor. In order to reduce this measurement error, as proposed in the present embodiment, means for measuring the temperature of the solid-state imaging device itself several times is effective. In order to perform correction based on the temperature of the solid-state imaging device, the temperature correction of the AE signal and the AF signal may be performed most simply using the average value of the two temperature signals, but the two temperature signals should be weighted. Thus, a more accurate temperature correction is possible.
[0037]
According to the circuit format in the present embodiment, a temperature signal can be output, and a small and high-performance solid-state imaging device having both photometry and ranging applications can be realized. In addition, the driving in the present embodiment enables accurate temperature measurement of the solid-state imaging device.
[0038]
In this embodiment, the CMOS sensor has been described. However, the present invention can be applied not only to a CMOS sensor but also to, for example, a CCD, a BASIS, a SIT, a CMD, an AMI, and the like.
[0039]
(Embodiment 2)
FIG. 6 is an operation flowchart for explaining the second embodiment.
[0040]
In the first embodiment, the temperature output is performed twice in one operation, but the present embodiment is characterized in that the temperature output is performed three times. First and second temperature signals are used as AF correction data, and second and third temperature signals are used as AE correction data. According to the present embodiment, further accurate temperature correction can be performed. In this embodiment, the temperature output is performed three times, but it may be read out four times or more.
[0041]
Here, the points other than the above are the same as those in the first embodiment.
[0042]
With the driving of the present embodiment, a solid-state image sensor having both photometry and distance measurement that can output the temperature of the solid-state image sensor more accurately than the first embodiment can be realized.
[0043]
(Embodiment 3)
FIG. 7 is a circuit block diagram of a solid-state imaging device for explaining the third embodiment.
[0044]
The present embodiment is characterized in that, in addition to the drive pulse used in the first embodiment, the AF circuit shift register and the AE circuit shift register are also used. By combining the drive pulse and the drive circuit as in the present embodiment, the solid-state imaging device can be further reduced.
[0045]
In the circuit of this embodiment mode, since the reference potential of the AE circuit and the reference potential of the thermometer circuit can be used together, the chip size can be reduced by reducing the power supply circuit.
[0046]
In the present embodiment, a solid-state imaging device having both uses of photometry and distance measurement that are further reduced in size than the solid-state imaging device of the first embodiment can be realized.
[0047]
(Embodiment 4)
FIG. 8 shows a planar layout of a solid-state imaging device for explaining the second embodiment. The same number is attached | subjected about the same structure as FIG. 1 demonstrated in Embodiment 1. FIG.
[0048]
In the figure, 119 is a digital input / output terminal group, and 120 is an analog input / output terminal group. The digital system input / output terminal 119 includes a DVDD terminal for digital circuit power supply and a DGND terminal for ground potential, an MCLK terminal for inputting a master clock, a CLK1 terminal for inputting communication signals from a microcomputer, a CLK2 terminal, and communication to the microcomputer. It consists of a MON terminal for signal output.
[0049]
The analog input / output terminals 120 include an AVDD terminal for analog circuit power supply, an AGND terminal for ground potential, an SOUT terminal for outputting analog signals (AE signal, AF signal, temperature signal), and a Vc terminal for monitoring a reference voltage. It consists of a VRES terminal and a VGR terminal.
[0050]
Since MCLK, which is a master clock, has a high speed of several MHz or more, the influence of clock noise at the time of rising and falling becomes large. Therefore, in this embodiment, the digital system terminal is disposed above the solid-state image sensor, and the analog system terminal is disposed below the solid-state image sensor (that is, the digital system input / output terminal is connected to the analog system input / output terminal). By providing it on the side opposite to the side where the terminal is provided, the influence of clock noise on the analog signal is reduced.
[0051]
In the present embodiment, since the AE signal, the AF signal, and the temperature signal are output from the common output terminal (SOUT) to the outside of the solid-state imaging device via the MPX as in the first embodiment, Compared with the case of outputting from a separate output terminal, the wiring length for reading a signal from one of the circuits must be increased (in this embodiment, the wiring for reading the signal from the AF circuit is Stretched).
[0052]
For this reason, there is a possibility that a wiring for reading out a signal from a circuit in the solid-state imaging device and a wiring for inputting / outputting other digital signals may intersect. In this embodiment, the digital terminal is a solid-state imaging device. The analog terminals are arranged below the solid-state image sensor, wiring for reading out signals from each circuit (AE circuit, AF circuit, thermometer circuit), and digital signals It was made not to cross the wiring which inputs and outputs.
[0053]
In the present embodiment, the digital terminal group and the analog terminal group are separately provided on opposite sides, and signals from the AE circuit, the AF circuit, and the thermometer circuit are output from a common output terminal. Since the configuration eliminates interference between digital signals and analog signals, an output signal with reduced noise can be obtained and downsizing can be realized.
[0054]
In the present embodiment, the configuration in which the AE circuit block 101, the AF circuit block 102, and the thermometer circuit 103 are provided in the solid-state image sensor has been described. However, the thermometer circuit is not provided in the solid-state image sensor, and the AE circuit is provided. An imaging circuit for capturing a subject image for finally obtaining a subject image without providing an AE circuit block AF circuit block as described above may be used. A configuration in which a block (a configuration in which a plurality of photoelectric conversion units are arranged two-dimensionally) and a thermometer circuit may be provided. In addition, the thermometer circuit block and the AF circuit block as described above may not be provided, and the AE circuit block and the imaging circuit block may be provided.
[0055]
(Embodiment 5)
An imaging apparatus using the solid-state imaging device having the photometry circuit block, the distance measurement circuit block, and the thermometer circuit described in the first to fourth embodiments will be described. FIG. 9 is a block diagram showing an embodiment in which a solid-state imaging device for explaining Embodiment 5 is used in a lens shutter digital compact camera (imaging device). In FIG. 8, 201 is a barrier that serves as a lens switch and a main switch, 202 is a lens that forms an optical image of a subject on the solid-state imaging device 204, 203 is a diaphragm for changing the amount of light that has passed through the lens 202, and 204 is This is a solid-state imaging device for capturing the subject imaged by the lens 202 as an image signal.
[0056]
Reference numeral 205 denotes the solid-state imaging device described in the first to fourth embodiments. For example, the embodiment of FIG. 1 is used. 206 is an A / D converter that performs analog-digital conversion on image signals, photometry signals, and ranging signals output from the solid-state image sensor 204 and the solid-state image sensor 205, and 208 is image data output from the A / D converter 207. A signal processing unit 209 for compressing various corrections and data; a timing generation unit 210 for outputting various timing signals to the solid-state imaging device 204, the imaging signal processing circuit 206, the A / D converter 207, the signal processing unit 208, and the like; Is an overall control / arithmetic unit for controlling various calculations and the entire camera, and 211 is a memory unit for temporarily storing image data.
[0057]
Further, 212 is an interface unit for recording or reading on a recording medium, 213 is a removable recording medium such as a semiconductor memory for recording or reading image data, and 214 is an interface for communicating with an external computer or the like. Part.
[0058]
Next, an operation at the time of photographing with such a lens shutter digital compact camera will be described. When the barrier 201 is opened, the main power supply is turned on, then the control system power supply is turned on, and the power supply of the imaging system circuit such as the A / D converter 207 is turned on.
[0059]
Based on the signal output from the AF circuit block of the solid-state image sensor 205, the overall control / calculation unit 210 calculates the distance to the subject by triangulation. Thereafter, the feeding amount of the lens 202 is calculated, and the lens 202 is driven to a predetermined position to be focused.
[0060]
Next, in order to control the exposure amount, the signal output from the AE sensor of the solid-state imaging device 205 is converted by the A / D converter 207 and then input to the signal processing unit 208, and the exposure calculation is performed based on the data. Is performed by the overall control / arithmetic unit 210.
[0061]
The brightness is determined based on the result of the photometry, and the overall control / calculation unit 210 adjusts the aperture 203 and the shutter speed according to the result.
[0062]
After that, after the exposure conditions are set, the main exposure with the solid-state image sensor 204 starts. When the exposure is completed, the image signal output from the solid-state image sensor 204 is A / D converted by the A / D converter 207, passes through the signal processing unit 208, and is written in the memory unit 211 by the overall control / calculation 210. Thereafter, the data stored in the memory unit 211 is recorded on the removable recording medium 213 through the recording medium control I / F unit 212 under the control of the overall control / calculation unit 210. Further, it may be directly input to a computer or the like through the external I / F unit 214.
[0063]
Note that the solid-state image sensor 205 of this embodiment can be used not only for a digital compact camera but also for a silver salt camera or the like.
[0064]
【The invention's effect】
According to the present invention, it is possible to reduce the size of a solid-state imaging device.
[Brief description of the drawings]
FIG. 1 is a diagram for explaining Embodiment 1 of the present invention;
FIG. 2 is a diagram showing the AF circuit of FIG. 1 in detail.
FIG. 3 is a diagram showing the AE circuit of FIG. 1 in detail.
FIG. 4 is a diagram showing in detail the thermometer circuit of FIG. 1;
FIG. 5 is an operation flowchart for explaining the first embodiment of the present invention;
FIG. 6 is an operation flowchart for explaining the second embodiment of the present invention;
FIG. 7 is a diagram for explaining Embodiment 3 of the present invention.
FIG. 8 is a diagram for explaining a fourth embodiment of the present invention.
FIG. 9 is a diagram for explaining a fifth embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 PN photodiode 2 Reset MOS transistor 3 CMOS differential amplifier circuit 4 MOS capacity 5 Memory switch MOS transistor 6 Source follower circuit 7 Clamp capacity 8 Clamp MOS switches 9-12 MOS switch 13 Minimum value detection differential amplifier 14 Maximum value Detection differential amplifier 15, 16 MOS switch 17 OR circuit 18, 19 Constant current MOS transistor 20 Scan circuit 21 Common output line 30 Other divided photodiodes 40, 42 AF photodiode array 60 Microcomputer 62 Data lines 64, 66 Driver 70 Semiconductor substrate 72 AE signal amplification circuit 74 AF signal amplification circuit 75 Signal correction circuit 76 Latch circuit 78 Multiplexer 80 Logic circuit 100 Solid-state imaging device 101 AF circuit block 102 AE circuit block 103 Meter circuit 104 Multiplex circuit 105 AGC circuit 106 Power supply circuit 107 Logic circuit 108 Signal amplification circuit 109 Microcomputer 110 AF circuit 110A, 110B AF linear sensor circuit 111 AE circuit 112, 118 Differential amplification amplifier 113 PN junction photodiode 114, 116 PN junction diode 115 MOS transistor for switch 117 Constant current source 119 Digital system input / output terminal 120 Analog system input / output terminal

Claims (10)

Each has a plurality of photoelectric conversion units, a plurality of photoelectric conversion regions used for different applications, a temperature circuit for obtaining temperature information of a semiconductor substrate on which the photoelectric conversion regions are formed , and driving the photoelectric conversion regions A solid-state imaging device having a drive circuit for
A first terminal for outputting a signal to the outside of the solid-state imaging device;
The signals from the plurality of photoelectric conversion regions and the signal from the temperature circuit are output from the common first terminal ,
The solid-state imaging device , wherein the driving circuit applies a common scanning circuit control pulse to a plurality of scanning circuits for outputting signals from the plurality of photoelectric conversion regions .   2. The solid-state imaging device according to claim 1, wherein the plurality of photoelectric conversion regions are a photometric conversion region for photometry and a photoelectric conversion region for distance measurement. According to claim 1 or 2, having a second terminal for inputting a digital signal for driving the drive circuit to the inside of the solid-state imaging device, said second terminal, said first terminal is arranged A solid-state imaging device, wherein the solid-state imaging device is disposed on a side opposite to the side that is formed. 4. The drive circuit according to claim 2, wherein the driving circuit includes a signal from the temperature circuit from the first output terminal, a signal from the photoelectric conversion region for distance measurement, a signal from the photoelectric conversion region for photometry, and a signal from the temperature circuit. The solid-state imaging device is controlled so as to read out in the order of. 5. The third terminal for inputting the power signal for the photoelectric conversion region into the solid-state imaging device and the power signal for the driving circuit in the solid-state imaging device according to claim 1. A solid-state imaging device, wherein the fourth terminal is disposed on a side opposite to the side on which the third terminal is disposed. The wiring for connecting the first terminal, the photoelectric conversion region and the temperature circuit, and the wiring for connecting the second terminal and the drive circuit according to claim 1, A solid-state imaging device characterized by not intersecting. An image pickup apparatus comprising: the solid-state image pickup device according to claim 1; and a signal processing circuit that processes a signal from the solid-state image pickup device. 8. The image pickup apparatus according to claim 7, further comprising a control circuit that performs calculation for photometry and distance measurement based on a signal from the solid-state image pickup device. 9. The imaging apparatus according to claim 7, further comprising a lens that forms a subject image. A semiconductor substrate in which a photoelectric conversion region for photometry having a plurality of photoelectric conversion portions, a photoelectric conversion region for distance measurement having a plurality of photoelectric conversion portions, and the photoelectric conversion regions for photometry and distance measurement are formed. An AE and AF integrated sensor having a temperature circuit for obtaining temperature information and a drive circuit for driving the photoelectric conversion region,
A first terminal for outputting a signal to the outside of the solid-state imaging device;
The signals from the plurality of photoelectric conversion regions and the signal from the temperature circuit are output from the common first terminal,
The AE and AF integrated sensor, wherein the driving circuit applies a common scanning circuit control pulse to a plurality of scanning circuits for outputting signals from the plurality of photoelectric conversion regions.

Images