JP4032562B2 - Frequency synthesizer circuit used in radio equipment - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a frequency synthesizer circuit used in a wireless device such as a mobile phone or a car phone using a wideband CDMA (Code Division Multiple Access) system.
[0002]
[Problems to be solved by the invention]
Wireless devices such as mobile phones and automobile phones using the wideband CDMA (W-CDMA) system use a chip rate of 4.096 Mcps according to the CDMA standard, and generate a clock of 4.096 MHz × N times. Thus, it is synchronized with the signal frequency from the base station.
[0003]
In this case, the wireless device is configured as shown in FIG. 2, for example. In the figure, 1 is a quadrature modulator, 2 is a transmission band limiting filter, 3 is a transmission power amplifier, 4 is a duplexer, 5 is an antenna, 6 is a 1.95 GHz band frequency switching synthesizer, 7 is a 190 MHz fixed frequency synthesizer, 8 Is a reception high frequency low noise amplifier, 9 is a reception high frequency band limiting filter, 10 is a frequency mixer (mixer), 11 is a reception IF amplifier, 12 is a 190 MHz band limiting filter, and 13 is a quadrature demodulator.
[0004]
In such a configuration, at the time of transmission, the quadrature modulator 1 performs quadrature modulation using the signal of the channel switching frequency (1.92 to 1.98 GHz) output from the 1.95 GHz band frequency switching synthesizer 6 to transmit the signal. After the transmission band is limited by the band limiting filter 2, power is amplified by the transmission power amplifier 3, and transmission is performed from the antenna 5 via the duplexer 4.
[0005]
At the time of reception, a signal (a signal having a frequency of 2.11 to 2.17 GHz) input from the antenna 5 via the duplexer 4 is low-noise amplified by the reception high-frequency low-noise amplifier 8, and the reception high-frequency band The limiting filter 9 limits the reception high frequency band. Thereafter, when the frequency mixer 10 performs frequency mixing using the channel switching frequency signal output from the 1.95 GHz band frequency switching synthesizer 6, a signal of 190 MHz is obtained. The signal is amplified by the reception IF amplifier 11, band-limited by the 190 MHz band-limiting filter 12, and then demodulated using the 190 MHz signal output from the 190 MHz fixed frequency synthesizer 7 in the orthogonal demodulator 13. Do.
[0006]
The channel switching frequency signal output from the 1.95 GHz band frequency switching synthesizer 6 described above and the 4.096 MHz × N times (16.384 MHz as N = 4) clock used for controlling this radio are shown in FIG. 3 is generated by the frequency synthesizer circuit shown in FIG.
[0007]
In the figure, reference numeral 21 is a reference signal temperature compensated crystal oscillator (hereinafter referred to as TCXO), 22 is a 16.384 MHz fixed frequency synthesizer, 23 is a 380 MHz fixed frequency synthesizer, 24 is a 2.3 GHz band frequency switching synthesizer, and 25 is a frequency mixer. It is. In such a configuration, the 16.384 MHz fixed frequency synthesizer 22 outputs a 16.384 MHz signal based on the 12.6 MHz reference signal from the TCXO 21. This signal is used as a clock for controlling the radio. The 380 MHz fixed frequency synthesizer 23 outputs a 380 MHz signal, and the 2.3 GHz band frequency switching synthesizer 24 outputs a 2.3 to 2.36 GHz signal. Then, both signals are frequency mixed by the frequency mixer 25 to output a signal of 1.92 to 1.98 GHz.
[0008]
In such a configuration, since three frequency synthesizers are required, there is a problem that the configuration becomes complicated.
[0009]
Therefore, in place of the configuration shown in FIG. 3, two frequency synthesizers can be considered as shown in FIG. In the figure, the TCXO 21 outputs a 16.384 MHz reference signal. The 16.384 MHz reference signal from the TCXO 21 is used as it is as a clock for controlling the radio. The 380 MHz fixed frequency synthesizer 23 generates a 380 MHz signal based on the 16.384 MHz reference signal from the TCXO 21. The 2.3 GHz band frequency switching synthesizer 24 generates a signal of 2.3 to 2.36 GHz based on the 16.384 MHz reference signal from the TCXO 21.
[0010]
However, such a configuration has the following problems. That is, as shown in FIG. 5, the 2.3 GHz band frequency switching synthesizer 24 includes a phase comparator 24a, a low-pass filter (hereinafter referred to as LPF) 24b, a voltage controlled oscillator (hereinafter referred to as VCO) 24c, and a variable frequency dividing circuit 24d. And a PLL circuit composed of a variable frequency divider 24e and the like. Here, the frequency of the reference signal output from the variable frequency dividing circuit 24e to the phase comparator 24a (the reference signal frequency of the phase comparator 24e, hereinafter referred to as the reference frequency) is 16.384 MHz and 2. It becomes 32 KHz or less (for example, 8 KHz) which is the greatest common divisor of 3 to 2.36 GHz. As described above, when the reference frequency division frequency is as low as 32 KHZ or less, the C / N (carrier noise ratio) characteristics, phase noise characteristics, and spurious characteristics of the 2.3 GHz band frequency switching synthesizer 24 are deteriorated.
[0011]
It is an object of the present invention to provide a frequency synthesizer circuit that can solve the above problems.
[0012]
[Means for Solving the Problems]
To achieve the above object, according to the first aspect of the present invention, a frequency synthesizer (23) for outputting a signal of a fixed frequency based on the reference signal output from the reference signal generator (21), and the frequency synthesizer A frequency switching synthesizer (24) that outputs a signal in a desired frequency band based on the fixed frequency signal output from (23), and a fixed frequency signal and frequency switching synthesizer (24) output from the frequency synthesizer (23). And a frequency mixer (25) for frequency-mixing a signal of a desired frequency band output from the radio, and a signal of a frequency for switching the channel of the radio is output from the frequency mixer (25). , the reference divider frequency in the frequency switching synthesizer (24), the greatest common the frequency of the desired frequency band of the signal of the reference signal It is characterized in that is higher than that.
[0013]
Thus, in the frequency switching synthesizer (24), a signal in a desired frequency band is output based on the fixed frequency signal output from the frequency synthesizer (23), and the reference frequency division in the frequency switching synthesizer (24) is performed. Since the frequency is higher than the greatest common divisor of the frequency of the reference signal and the signal of the desired frequency band, the C / N characteristics, phase noise characteristics, spurious characteristics, etc. of the frequency switching synthesizer (24) are improved. It becomes possible.
[0014]
In this case, if the frequency divider (26) for dividing the fixed frequency signal output from the frequency synthesizer (23) is provided as in the invention described in claim 2, the upper limit of the frequency of the input signal is provided. The present invention can also be applied to a frequency synthesizer circuit using a set frequency switching synthesizer (24).
[0015]
Further, if the reference signal from the reference signal generator (21) is used as it is as a clock for controlling the radio as in the invention described in claim 3, the number of frequency synthesizers in the frequency synthesizer circuit is reduced. can do.
[0016]
In addition, the code | symbol in the above-mentioned parenthesis shows the correspondence with the specific means of embodiment description later mentioned.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments shown in the drawings will be described below.
[0018]
FIG. 1 shows a configuration of a frequency synthesizer circuit according to an embodiment of the present invention. In the figure, the TCXO 21 outputs a 16.384 MHz reference signal, similar to that shown in FIG. This 16.384 MHz reference signal is used as it is as a clock for controlling the radio. The 380 MHz fixed frequency synthesizer 23 generates and outputs a 380 MHz signal based on the 16.384 MHz reference signal from the TCXO 21.
[0019]
In this embodiment, unlike the one shown in FIG. 4, the signal input to the 2.3 GHz band frequency switching synthesizer 24 is not the 16.384 MHz reference signal from the TCXO 21 but the 380 MHz fixed frequency synthesizer 23. The output signal is a 380 MHz signal.
[0020]
In this case, in FIG. 5 showing a specific configuration of the 2.3 GHz band frequency switching synthesizer 24, 380 MHz and 2.3 to 2.3 are used as the frequency of the reference signal output from the variable frequency dividing circuit 24e to the phase comparator 24a. For example, 20 MHz which is a common divisor of 36 GHz can be used. Accordingly, since the reference frequency division frequency can be made very high compared to the configuration shown in FIG. 5, the C / N characteristics, phase noise characteristics, and spurious characteristics of the 2.3 GHz band frequency switching synthesizer 24 are excellent. It can be. In this case, if the C / N characteristic is lowered by the LPF 24b by an amount corresponding to the improvement of the C / N characteristic, the switching characteristic of channel switching can be improved.
[0021]
As shown in FIG. 1, when there is an upper limit to the frequency of the input signal, for example, when the frequency of the input signal is limited to 40 MHz or less, as in the case where the 2.3 GHz band frequency switching synthesizer 24 is configured with an IC. Thus, the frequency divider 26 may be provided so that the 380 MHz signal output from the 380 MHz fixed frequency synthesizer 23 may be divided by 1/2 ^N. In this case, the maximum frequency (16) of the reference frequency division frequency when the frequency of the frequency-divided signal and the reference frequency division frequency set from the common divisor of 2.3 to 2.36 GHz are set as shown in FIG. .384 MHz and the greatest common divisor of 2.3 to 2.36 GHz), the C / N characteristics, phase noise characteristics, spurious characteristics, etc. of the 2.3 GHz band frequency switching synthesizer 24 are higher than those shown in FIG. Can be good.
[0022]
Further, the above-described frequency synthesizer can be applied to a radio having a configuration other than the radio as shown in FIG. For example, as shown in FIG. 6, instead of the 1.95 GHz band frequency switching synthesizer 6 shown in FIG. 2, the above-described 2.3 GHz band frequency switching synthesizer 24 is used, and instead of the 190 MHz fixed frequency synthesizer 7 shown in FIG. Using the 380 MHz fixed frequency synthesizer 23 described above, the signal from the 2.3 GHz band frequency switching synthesizer 24 and the signal from the 380 MHz fixed frequency synthesizer 23 are frequency mixed by the frequency mixer 25 to obtain a signal of 1.92 to 1.98 GHz. Is output to the quadrature modulator 1.
[0023]
In this case, when frequency mixing is performed by the frequency mixer 10 using a 2.3 to 2.36 GHz signal output from the 2.3 GHz band frequency switching synthesizer 24, a signal of 190 MHz is obtained. Further, if the 380 MHz signal output from the 380 MHz fixed frequency synthesizer 23 is input to the quadrature demodulator 13 that receives the double frequency and divides the frequency internally by 1/2, the quadrature demodulator 13 uses the 190 MHz signal. Demodulation can be performed.
[0024]
In the case of the configuration shown in FIG. 2, since the frequency of the signal output from the 1.95 GHz band frequency switching synthesizer 6 and the transmission modulation frequency are the same, the modulated wave adversely affects the 1.95 GHz band frequency switching synthesizer 6. However, the C / N characteristics and phase noise characteristics of the 2.3 GHz band frequency switching synthesizer 24 are deteriorated and the modulation accuracy is deteriorated. However, when configured as shown in FIG. Since the frequency of the signal output from the band frequency switching synthesizer 24 and the transmission modulation frequency are different, the deterioration of the modulation accuracy can be minimized.
[0025]
2, the frequency of the local signal input to the quadrature demodulator 13 is the same as the IF signal input to the quadrature demodulator 13 via the reception IF amplifier 11 and the 190 MHz band limiting filter 12. Therefore, there arises a problem that unnecessary DC components are superimposed on the I and Q signals after quadrature demodulation by the quadrature demodulator 13, but they are input to the quadrature demodulator 13 as shown in FIG. By setting the frequency of the local signal to 380 MHz, the influence of the DC component multiplication can be minimized.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a frequency synthesizer circuit according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a configuration of a wireless device using a wideband CDMA system.
FIG. 3 is a diagram illustrating a first configuration example of a frequency synthesizer used in the wireless device illustrated in FIG. 2;
4 is a diagram illustrating a second configuration example of a frequency synthesizer used in the wireless device illustrated in FIG. 2;
FIG. 5 is a diagram showing a specific configuration of a 2.3 GHz band frequency switching synthesizer 24;
FIG. 6 is a diagram illustrating another configuration example of a wireless device using a wideband CDMA system.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Quadrature modulator, 2 ... Transmission band-limiting filter, 3 ... Transmission power amplifier,
4 ... duplexer, 5 ... antenna, 6 ... 1.95 GHz band frequency switching synthesizer,
7 ... 190 MHz fixed frequency synthesizer, 8 ... receiving high frequency low noise amplifier,
9 ... reception high frequency band limiting filter, 10 ... frequency mixer,
11 ... Reception IF amplifier, 12 ... 190MHz band limiting filter,
13: Quadrature demodulator, 21 ... TCXO,
22 ... 16.384 MHz fixed frequency synthesizer,
23 ... 380 MHz fixed frequency synthesizer,
24 ... 2.3 GHz band frequency switching synthesizer, 25 ... frequency mixer,
26: Frequency divider.

Claims (3)

A frequency synthesizer (23) for outputting a signal of a fixed frequency based on the reference signal output from the reference signal generator (21);
A frequency switching synthesizer (24) for outputting a signal of a desired frequency band based on a fixed frequency signal output from the frequency synthesizer (23);
A frequency mixer (25) for frequency-mixing the signal of the fixed frequency output from the frequency synthesizer (23) and the signal of the desired frequency band output from the frequency switching synthesizer (24), The frequency mixer (25) is adapted to output a signal of the channel switching frequency of the radio.
A frequency synthesizer circuit characterized in that the reference signal frequency of the phase comparator in the frequency switching synthesizer (24) is higher than the greatest common divisor of the frequency of the reference signal and the frequency of the signal in the desired frequency band . A frequency divider (26) that divides the signal of the fixed frequency output from the frequency synthesizer (23) is provided, and the frequency switching synthesizer (24) divides by the frequency divider (26). 2. The frequency synthesizer circuit according to claim 1, wherein the signal of the desired frequency band is output based on the signal of the fixed frequency.   3. The frequency synthesizer circuit according to claim 1, wherein the reference signal from the reference signal generator (21) is used as it is as a clock for controlling the radio device.

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