JP4022831B2 - Steam annealing jig and steam annealing method - Google Patents

Description

    The present invention relates to a steam annealing jig and a steam annealing method that can effectively prevent contamination of a semiconductor substrate due to particles, contamination, and the like.

  By heat-treating a semiconductor substrate such as a TFT substrate for liquid crystal or a silicon wafer under pressurized water vapor, it is possible to perform processes such as thermal oxide film formation, termination of defects in silicon, reflow processing of interlayer insulating films, etc. Are known. Hereinafter, such heat treatment is referred to as “water vapor annealing treatment”.

  As a prior art document relating to a method for performing the water vapor annealing treatment, for example, the following Patent Document 1 is disclosed.

  Patent Document 1 “Method of planarizing insulating film of semiconductor device” is a method of planarizing an insulating film formed on an uneven surface on a substrate of a semiconductor device by heat flow. It is performed under a pressure of 3 atm or more in the atmosphere. By this method, the amount of oxygen diffused in the insulating film and the diffusion rate thereof are increased, and a good reflow of the BPSG film is realized at a lower temperature and in a shorter time than in the past.

  For example, Patent Documents 2 and 3 below are disclosed as prior art documents relating to an apparatus for performing a water vapor annealing process and a jig for mounting a semiconductor substrate in the apparatus.

  FIG. 5 is a diagram showing the configuration of the water vapor annealing apparatus disclosed in Patent Document 2. As shown in FIG. This water vapor annealing apparatus includes a pressure vessel 103 that includes an upper pressure vessel 100 and a lower pressure vessel 102, an internal pressure can be adjusted, an upper processing vessel 104, and a lower processing vessel 106 that form a processing chamber 107 therein. The apparatus includes a container 108, a heater 110 provided between the pressure container 103 and the processing container 108, and a boiler 118 that generates water vapor to be introduced into the processing chamber 107. The processing vessel 108 is made of quartz glass and can accommodate the wafer mounting board 112 therein. The wafer mounting board 112 can mount a large number of semiconductor substrates 111 (for example, about 100 to 150) side by side in the vertical direction.

  In the water vapor annealing apparatus configured as described above, after the semiconductor substrate 111 is stored in the processing chamber 107, the semiconductor substrate 111 is heated by the heater 110, and water vapor is generated by the boiler 118 and introduced into the processing chamber 107. The pressure of the processing chamber 107 is increased and air is supplied into the pressure vessel 103 as the processing chamber 107 is increased to increase the internal pressure of the pressure vessel 103. Thereby, water vapor annealing is performed.

  In addition, as shown in FIG. 6, the “thermal treatment method of a silicon single crystal wafer” of Patent Document 3 stacks about 10 wafers 201 and horizontally or about 0.5 to 5 ° in units of this group. The wafer is placed on a board 202 that contacts and supports a plurality of locations on the outer periphery of the wafer with slight inclination, and a plurality of groups are arranged in a vertical direction in multiple stages and heat-treated.

Japanese Patent Laid-Open No. 5-67607 Japanese Patent Laid-Open No. 11-152567 Japanese Patent Laid-Open No. 10-74771

  The annealing process by the water vapor annealing apparatus of Patent Document 2 described above has an effect of accelerating various processes on the semiconductor substrate because the high-temperature and high-pressure steam has high reactivity. However, due to its high effect, it reacts with containers and pipes other than the semiconductor substrate to generate particles and contamination. These particles and contamination stay in the container and piping system and increase over time, so that they adhere to the substrate and contaminate the substrate, causing deterioration in the quality of the water vapor annealing process and the device yield. There's a problem.

  In addition, in the water vapor annealing apparatus of Patent Document 2, the wafer mounting board 112 used as a jig for loading a semiconductor substrate is a transfer device hand (holding the semiconductor substrate and loading the wafer mounting board when the semiconductor substrate is loaded). And a device for taking out) are loaded with a predetermined interval (for example, about 10 mm) between the semiconductor substrates so that they do not come into contact with other semiconductor substrates. That is, a large number of semiconductor substrates are loaded on the wafer mounting board at a predetermined interval of at least about 10 mm from each other, so that the semiconductor substrate itself is thin (for example, about 0.5 to 2.0 mm), but is loaded large. There is a problem that an area is required and the apparatus becomes large.

  As a method for preventing the adhesion of particles and contamination as described above, there is a method of stacking semiconductor substrates one by one as in the method of Patent Document 3. In the case of a conventional semiconductor substrate in which one surface is rough and the other surface is a mirror surface, intrusion of particles and the like can be prevented without bonding the semiconductor substrates by this method. However, since recent semiconductor substrates have mirror surfaces on both sides, such a method cannot be applied. That is, in the case of a semiconductor substrate having a mirror surface on both sides, if the substrates are directly stacked, the substrates are joined together, or the contact pressure on the contact surface between the substrates due to the effects of weight increase and substrate warpage caused by stacking multiple substrates. There is a problem in that the amount of oxidation at the portion where the temperature increases becomes small, which causes a decrease in the quality of the water vapor annealing process and a decrease in the device yield.

  In view of the above-described problems, the present invention maintains the effect of the water vapor annealing treatment even when the semiconductor substrate having a mirror surface on both sides is subjected to the water vapor annealing treatment at a high pressure while maintaining the effect of the water vapor annealing treatment. Water vapor annealing jig and water vapor annealing that can improve the quality of the annealing process and device yield by greatly reducing the nation, and contribute to downsizing of the apparatus by making the loading area of the semiconductor substrate compact. It aims to provide a method.

  In order to achieve the object of the present invention, the first invention is a sheet-like member formed so as to cover the peripheral edge of a flat semiconductor substrate to be processed and having a through-opening on the inside. A water vapor annealing jig for performing a water vapor annealing process on the semiconductor substrate in an alternately stacked state, and a contact surface with the semiconductor substrate has a water vapor molecule in a range of temperature and pressure for processing the semiconductor substrate. It is characterized by having a surface roughness that can be introduced and that prevents intrusion of particles having a predetermined particle diameter or more and contamination.

  2nd invention consists of the sheet-like member which is formed so that the peripheral part of the flat semiconductor substrate used as a process target may be covered, and has a through-opening inside, and is laminated | stacked on this semiconductor substrate in the state laminated | stacked alternately with the semiconductor substrate. A water vapor annealing jig for performing water vapor annealing treatment, wherein the sheet-like member is capable of introducing water vapor molecules within a temperature and pressure range for processing a semiconductor substrate, and particles and contamination having a predetermined particle diameter or more. It is characterized by comprising a porous body having open pores that prevent intrusion of water.

  According to a third invention, in the first or second invention, a plurality of the sheet-like members are provided, and the plurality of sheet-like members are placed on the uppermost sheet-like member and penetrate the sheet-like member. A lid member that closes the opening is further provided.

  According to a fourth invention, in the first invention, the sheet-like member is made of quartz, SiC, graphite, or alkali-free glass.

  A fifth invention is formed so as to cover a peripheral portion of a flat semiconductor substrate to be processed and has a through-opening inside, and a contact surface with the semiconductor substrate has a temperature and pressure for processing the substrate. In the range, a sheet-like member having a surface roughness capable of introducing water vapor molecules and preventing intrusion of particles having a predetermined particle diameter or more and contamination, the sheet-like member and the semiconductor substrate are alternately laminated, A water vapor annealing method characterized in that a heat treatment is performed on the semiconductor substrate in an atmosphere.

  6th invention is formed so that the peripheral part of the flat semiconductor substrate used as a process target may be covered, has a through-opening inside, can introduce | transduce a water vapor molecule in the range of the temperature and pressure which process a board | substrate, and Using a sheet-like member made of a porous body having open pores that prevent invasion of particles having a predetermined particle size and contamination, and the semiconductor substrate, the sheet-like member and the semiconductor substrate are alternately laminated, and the semiconductor substrate is placed in a water vapor atmosphere. Is a water vapor annealing method characterized in that heat treatment is performed on the water vapor.

  According to a seventh invention, in the fifth or sixth invention, a lid member that closes an opening of the sheet-like member is placed on the uppermost sheet-like member, and the semiconductor substrate is placed in a water vapor atmosphere. It heat-treats with respect to, It is characterized by the above-mentioned.

  According to the first, second, fifth and sixth inventions, since the sheet-like member is formed so as to cover the entire peripheral edge of the semiconductor substrate, the sheet-like member is alternately laminated with the semiconductor substrate to perform water vapor annealing. Even when particles or contamination stays in the container or the piping system when the treatment is performed, the sheet-like member can prevent particles and the like from directly depositing on the substrate.

  According to the first and fifth inventions described above, the sheet-like member can introduce water vapor molecules at a contact surface with the semiconductor substrate in a range of temperature and pressure for processing the semiconductor substrate and has a predetermined particle size or more. The surface has a surface roughness that prevents the intrusion of particles and contamination, and this contact surface prevents the entry of particles and the like, while the water vapor passes through the contact surface and reaches the surface of the semiconductor substrate. A treatment effect almost equivalent to the effect of the annealing treatment can be obtained.

  Further, according to the second and sixth inventions, the sheet-like member can introduce water vapor molecules and intrude particles and contamination having a predetermined particle diameter or more in a temperature and pressure range in which the semiconductor substrate is processed. Since it consists of a porous body with open pores to block, the open pores prevent the entry of particles and the like, while water vapor passes through the contact surface and reaches the surface of the semiconductor substrate. Almost the same processing effect can be obtained.

  In addition, according to the first, second, fifth and sixth inventions, even when the semiconductor substrate having both mirror surfaces is subjected to the water vapor annealing process, the substrates are laminated via the sheet-like member, so that the substrates may be bonded to each other. In addition, the amount of oxidation does not decrease locally. For this reason, the quality and yield of the water vapor annealing process can be improved.

  In addition, according to the first, second, fifth and sixth inventions, the sheet-like member and the semiconductor substrate are directly laminated alternately and the water vapor annealing treatment is performed, so that a large number (for example, 100) of the semiconductor substrates are laminated. Even when processing is performed, the loading area of the semiconductor substrate can be greatly reduced in comparison with the prior art. That is, in the above-described prior art, the semiconductor device is loaded with a predetermined interval between the semiconductor substrates in consideration of the interference with the semiconductor substrate of the transfer device hand, but according to the present invention, the interval is a sheet-like member. Only the thickness (for example, about 0.5 to 2.0 mm). For this reason, even when a large number of semiconductor substrates are stacked, the stacking height can be significantly reduced as compared with the case where the semiconductor substrate is loaded on the above-described conventional wafer mounting board.

  According to the third and seventh inventions, the sheet-like member and the semiconductor substrate are alternately laminated, and the through-opening of the sheet-like member is closed by the lid member on the uppermost sheet-like member. Similarly to the semiconductor substrate other than the uppermost semiconductor substrate, particles or the like are not directly deposited on the upper semiconductor substrate, and water vapor can be introduced into the processing surface of the substrate at the same time as preventing the entry of particles and the like.

  According to the fourth invention, since the thermal expansion coefficient is close to that of the semiconductor substrate by using quartz, SiC, graphite, or non-alkali glass as the material for the sheet-like member, the sheet-like member is formed by thermal expansion / shrinkage. A relative shift between the member and the semiconductor substrate can be suppressed. Moreover, since these materials have low reactivity with high-temperature and high-pressure steam, generation of particles and contamination can be suppressed even inside the sheet-like member.

  Therefore, according to the present invention, when a semiconductor substrate having a mirror surface on both sides is subjected to a water vapor annealing treatment at a high pressure, particles and contamination adhered to the substrate surface during the treatment are greatly maintained while maintaining the effect of the water vapor annealing treatment. By reducing it, the quality of annealing treatment and device yield can be improved, and the effect of contributing to downsizing of the apparatus can be obtained by making the loading area of the semiconductor substrate compact.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, the same code | symbol is attached | subjected to the common part in each figure, and the overlapping description is abbreviate | omitted.

  FIG. 1 is a perspective view for explaining a water vapor annealing jig and a water vapor annealing method according to the first embodiment of the present invention. As shown in FIG. 1, the water vapor annealing jig of the present invention comprises a sheet-like member 10, and the sheet-like member 10 and the semiconductor substrate 1 are alternately laminated to perform a water vapor annealing treatment on the semiconductor substrate 1. Is to do.

  This water vapor annealing jig uses a flat semiconductor substrate 1 as a processing target, and the semiconductor substrate is, for example, a liquid crystal TFT substrate or a silicon wafer. In this embodiment, the semiconductor substrate 1 is a silicon wafer having a diameter of 150 mm and a thickness of 0.625 mm. The semiconductor substrate 1 is circular in this example, but may be rectangular or other shapes. Further, the semiconductor substrate 1 may be a homogeneous material of glass or silicon, a composite material having a semiconductor element formed on the surface, or an intermediate process substrate. Further, the semiconductor substrate 1 may have a rough surface on one surface and a mirror surface on the other surface, or a mirror surface on both surfaces.

  As shown in FIG. 1, the sheet-like member 10 has an outer diameter that is substantially the same as the diameter of the semiconductor substrate 1 (150 mm), and the inside thereof is drawn out to form a ring shape. That is, the sheet-like member 10 is formed so as to cover the entire periphery of the semiconductor substrate 1 when it is stacked on the semiconductor substrate 1. Moreover, the sheet-like member 10 has a through opening 10a penetrating in the thickness direction on the inner side. In the present embodiment, the difference between the outer diameter and the inner diameter of the sheet-like member 10, that is, the width w of the portion covering the peripheral edge of the semiconductor substrate 1 is 3 mm, and the thickness is the same as that of the semiconductor substrate 1. 625 mm. In the present embodiment, the sheet-like member 10 is formed in a ring shape, but when the shape of the semiconductor substrate 1 is a shape other than a circle, it is formed in accordance with the shape. For example, when the semiconductor substrate 1 has a rectangular shape, the sheet-like member 10 is formed in a rectangular shape with the inside being pulled out.

  The sheet-like member 10 is preferably made of quartz, SiC, graphite, or non-alkali glass. Since these materials have a thermal expansion coefficient close to that of a semiconductor substrate such as a liquid crystal TFT substrate or a silicon wafer, gap expansion / reduction and relative deviation due to thermal expansion / thermal contraction can be reduced. Moreover, since these materials have low reactivity with high-temperature and high-pressure steam, generation of particles and contamination can be suppressed even inside the sheet-like member 10.

  The upper and lower surfaces of the sheet-like member 10 are contact surfaces with the semiconductor substrate 1. In this embodiment, the contact surfaces are temperatures and pressures (for example, 100 to 800 ° C., 0 to 5 MPa) at which the semiconductor substrate 1 is processed. In this range, the surface roughness is such that water vapor molecules can be introduced and particles having a predetermined particle diameter or more and contamination are prevented from entering.

  The flatness of the contact surface is set in the range of 10 to 20 μm, and the surface roughness Ra is also set equal to the flatness. With this configuration, when the sheet-like member 10 and the semiconductor substrate 1 are alternately laminated, the contact surface does not adhere completely enough to make the inside airtight, and the fineness determined by the flatness and the surface roughness therebetween. A simple flow path is formed. From the examples described later, this fine channel is about 1/10 of the maximum flatness, that is, in the range of about 1 to 2 μm, can introduce water vapor molecules, and has a predetermined particle size (in this case, 1 to 2 μm). It was confirmed that the intrusion of the above particles and contamination can be prevented.

  In the present invention, since the sheet-like member 10 and the semiconductor substrate 1 are alternately laminated, the interval between the adjacent semiconductor substrates 1 in that state is determined by the thickness of the sheet-like member 10. That is, when the thickness of the sheet-like member 10 is 0.625 mm as in the present embodiment, the interval between the adjacent semiconductor substrates 1 is 0.625 mm. In the present invention, the thickness of the sheet-like member 10 is not limited to that in the embodiment, but if the thickness exceeds 5 mm, the internal water vapor pressure may not follow the external water vapor pressure. . Therefore, the thickness of the sheet-like member 10 is preferably 5 mm or less. Further, considering the stacking height when a large number of sheet-like members 10 and the semiconductor substrate 1 are stacked, it is preferable that the thickness is approximately the same as that of the semiconductor substrate 1 as in the present embodiment.

  As shown in FIG. 1, the water vapor annealing jig of the present invention includes a plurality of sheet-like members 10 and is placed on the uppermost sheet-like member 10 among the plurality of sheet-like members 10. A lid member 14 is provided. The lid member 14 has a disk shape having substantially the same diameter as that of the outer periphery of the sheet-like member 10, thereby closing the through opening 10 a of the uppermost sheet-like member 10. The lid member 14 is also preferably made of quartz, SiC, graphite, or alkali-free glass.

  Next, a water vapor annealing method using the above water vapor annealing jig will be described. In this water vapor annealing treatment, for example, a water vapor annealing apparatus as shown in FIG. 5 can be used.

  First, as shown in FIG. 1, the sheet-like member 10 and the semiconductor substrate 1 to be processed are alternately laminated. Next, the lid member 14 is placed on the uppermost sheet-like member 10. Then, this is housed in a processing vessel of a water vapor annealing apparatus as shown in FIG. 5, and the type of annealing processing required (thermal oxide film formation, termination processing of defects in silicon, reflow processing of interlayer insulating film, etc.) Water vapor annealing is performed at a predetermined pressure, temperature, and time according to the conditions.

  FIG. 2 is a schematic cross-sectional view of the sheet-like member 10 and the semiconductor substrate 1 during the water vapor annealing process. As described above, the contact surface of the sheet-like member 10 has a rough surface that can introduce water vapor molecules and prevent intrusion of particles having a predetermined particle diameter and contamination within a temperature and pressure range in which the semiconductor substrate 1 is processed. As shown in FIG. 2, even if particles or contamination occurs in the apparatus, this contact surface exerts a filter function, and particles or the like enter the through-opening 10a side. Be blocked. On the other hand, the water vapor passes through a fine channel defined by the surface roughness of the contact surface, enters the through opening 10a, reaches the processing surface of the semiconductor substrate 1, and is subjected to water vapor annealing.

  In addition, about the part (part corresponding to the contact surface of the sheet-like member 10) which is in contact with the sheet-like member 10 among the semiconductor substrates 1, the capability of annealing treatment may not be sufficient, but it is normal. Since the peripheral portion within the range of several millimeters from the outer periphery of the semiconductor substrate does not form an element for the reason of handling the substrate, there is a practical problem if the width w of the contact surface of the sheet-like member 10 is about several millimeters. I can say no.

  As described above, according to the first embodiment of the present invention, since the sheet-like member 10 is formed so as to cover the entire peripheral edge of the semiconductor substrate 1, it is alternately laminated with the semiconductor substrate 1 to perform water vapor annealing. Even when particles or contamination stays in the container or piping system when the treatment is performed, the sheet-like member 10 can prevent particles and the like from directly depositing on the semiconductor substrate 1.

  Further, the sheet-like member 10 has a contact surface with the semiconductor substrate 1 capable of introducing water vapor molecules in a temperature and pressure range in which the semiconductor substrate 1 is processed and prevents entry of particles having a predetermined particle diameter and contamination. Since the contact surface prevents particles and the like from entering the surface, the water vapor passes through the contact surface and reaches the surface of the semiconductor substrate 1, so that it is almost equivalent to the effect of the conventional water vapor annealing process. A processing effect is obtained.

  Further, even when a semiconductor substrate having a mirror surface on both sides is subjected to the water vapor annealing process, the substrates are laminated via the sheet-like member 10, so there is no fear that the substrates are bonded to each other and the amount of oxidation is not locally reduced. For this reason, the quality and yield of the water vapor annealing process can be improved.

Further, since the sheet-like member 10 and the semiconductor substrate 1 are alternately and directly stacked to perform the water vapor annealing process, even when a large number (for example, 100) of the semiconductor substrates 1 are stacked and processed, the sheet-like member 10 and the semiconductor substrate 1 are significantly different from the prior art. The loading area of the semiconductor substrate 1 can be made compact. That is, in the above-described prior art, the semiconductor device is loaded with a predetermined interval between the semiconductor substrates in consideration of the interference with the semiconductor substrate of the transfer device hand, but according to the present invention, the interval is a sheet-like member. The thickness is only 10 (for example, about 0.5 to 2.0 mm). For this reason, even if a large number of semiconductor substrates 1 are stacked, the stacking height can be significantly reduced as compared with the case where the semiconductor substrate 1 is loaded on the above-described conventional wafer mounting board.

  In addition, since the loading area becomes compact, if the number of semiconductor substrates 1 to be processed is the same as that of the conventional one, the temperature uniformity of the heat treatment area is improved, and the heat treatment effect is more uniform than that of the conventional one. . Alternatively, if the temperature uniformity in the heat treatment region is equal, the number of semiconductor substrates 1 loaded can be increased.

  Further, since the sheet-like member 10 and the semiconductor substrate 1 are alternately stacked and the through-opening 10a of the sheet-like member 10 is closed on the uppermost sheet-like member 10 by the lid member 14, the uppermost-stage semiconductor substrate. In the case of No. 1, similarly to the semiconductor substrate 1 other than the uppermost stage, particles or the like are not directly deposited, and water vapor can be introduced into the processing surface of the substrate at the same time as the entry of particles or the like is prevented. Further, the sheet-like member 10 and the lid member 14 are smaller and lighter than containers, pipes and the like, and can be easily cleaned even if they are contaminated.

  Next, a second embodiment of the present invention will be described.

  FIGS. 3A and 3B are views for explaining a steam annealing jig and a steam annealing method according to the second embodiment of the present invention. This embodiment is different from the first embodiment described above in that a sheet-like member 12 shown in FIG. 3A is used instead of the sheet-like member 10. The sheet-like member 12 can introduce water vapor molecules in the temperature and pressure range (for example, 100 to 800 ° C., 0 to 5 MPa) for processing the semiconductor substrate 1 and intrude particles and contamination having a predetermined particle diameter or more. It consists of a porous body with open pores to block. The sheet-like member 12 as the porous body is preferably a sintered metal, a ceramic filter, a silicon fiber plate, or the like. The sheet-like member 12 has a through-opening 12a similar to the through-opening 10a of the sheet-like member 10, and other shapes and dimensions are set in the same manner as the sheet-like member 10 in the first embodiment described above. Can do.

  Using this sheet-like member 12, also in the present embodiment, a water vapor annealing process is performed as in the first embodiment. That is, the sheet-like member 12 and the semiconductor substrate 1 to be processed are alternately stacked, and the lid member 14 is placed on the uppermost sheet-like member 12. And this is accommodated in the processing container of the water vapor annealing apparatus as shown in FIG. 5, and the water vapor annealing treatment is performed at a predetermined pressure, temperature and time according to the type of annealing treatment required.

  FIG. 3B is a schematic cross-sectional view of the sheet-like member 12 and the semiconductor substrate 1 during the water vapor annealing process. As described above, the sheet-like member 12 is a porous body having open pores that can introduce water vapor molecules and prevent intrusion of particles having a predetermined particle diameter or more and contamination in a temperature and pressure range in which the semiconductor substrate 1 is processed. 3B, even if particles or contamination occurs in the apparatus, the sheet-like member 12 as a porous body exerts a filter function as shown in FIG. Intrusion to the 12a side is prevented. On the other hand, the water vapor passes through a fine flow path defined by the open pores of the sheet-like member 12 and enters the through opening 12a, reaches the processing surface of the semiconductor substrate, and is subjected to the water vapor annealing treatment.

  As described above, according to the second embodiment of the present invention, the sheet-like member 12 is formed so as to cover the entire peripheral portion of the semiconductor substrate 1, so that the sheet-like member 12 is alternately laminated with the semiconductor substrate 1 to perform the water vapor annealing. Even when particles and contamination stay in the container or the piping system when the treatment is performed, the sheet-like member 12 can prevent particles and the like from directly depositing on the substrate.

  Further, the sheet-like member 12 is made of a porous body having open pores that can introduce water vapor molecules and prevent intrusion of particles having a predetermined particle diameter and contamination within a temperature and pressure range in which the semiconductor substrate is processed. While the open pores prevent intrusion of particles and the like, the water vapor passes through the open pores and reaches the surface of the semiconductor substrate 1, so that a treatment effect substantially equivalent to the effect of the conventional water vapor annealing treatment can be obtained.

  Further, even when the semiconductor substrate 1 having both mirror surfaces is subjected to the water vapor annealing process, the substrates are laminated via the sheet-like member 12, so there is no fear that the substrates are bonded to each other, and the amount of oxidation is not locally reduced. . For this reason, the quality and yield of the water vapor annealing process can be improved.

  Further, since the sheet-like member 12 and the semiconductor substrate 1 are alternately and directly stacked to perform the water vapor annealing process, even when a large number (for example, 100) of the semiconductor substrates 1 are stacked and processed, it is significantly more than the conventional technique. The loading area of the semiconductor substrate can be made compact.

  In addition, since the loading area becomes compact, if the number of semiconductor substrates 1 to be processed is the same as that of the conventional one, the temperature uniformity of the heat treatment area is improved, and the heat treatment effect is more uniform than that of the conventional one. . Alternatively, if the temperature uniformity of the heat treatment region is equal, the number of semiconductor substrates loaded can be increased.

  Further, since the sheet-like member 12 and the semiconductor substrate 1 are alternately laminated and the through-opening 12a of the sheet-like member is closed by the lid member 14 on the uppermost sheet-like member, the uppermost semiconductor substrate 1 is However, like the semiconductor substrate 1 other than the uppermost stage, particles or the like are not directly deposited, and water vapor can be introduced to the processing surface of the substrate at the same time as the entry of particles or the like is prevented. Further, the sheet-like member 12 and the lid member 14 are smaller and lighter than containers, pipes and the like, and can be easily cleaned even if they are contaminated.

  A silicon wafer having a diameter of 150 mm and a thickness of 0.625 mm was used as the semiconductor substrate 1, and a normal water vapor annealing process was performed at about 700 ° C. The substrate was subjected to the same conditions both when the jig was not used (conventional example) and when the water vapor annealing jig of the present invention (first embodiment) was used (the present invention). In order to compare the surface contamination degree of the conventional example and the present invention, the substrate surface after the water vapor annealing treatment was analyzed by total reflection X-ray fluorescence analysis, and the result of FIG. 4 was obtained.

  FIG. 4 shows the contamination state of the substrate surface of the conventional example (A) and the present invention (B). In this figure, the horizontal axis represents the energy of contaminating atoms, and the vertical axis represents the number of contaminations. Table 1 summarizes the results of FIG.

From Table 1, it can be seen that Cr, Mn, Fe, Ni, etc. other than the atoms constituting the substrate are all significantly reduced in the present invention (B) compared to the conventional example (A). In addition, as an example of processing under high-pressure steam in which the processing atmosphere is contaminated with particles and contamination, when a 6-inch silicon wafer is processed and no steam annealing jig is used, the number of detected particles = 9745 or more (particle size: 0.27 μm or more), metal contamination was 96 × 10 ¹⁰ [atoms / cm ² ] in terms of Fe, whereas when using a steam annealing jig, the number of detected particles = 26 or more, and the Fe content of metal contamination was not detected.

  Further, the thickness of the oxide film on the substrate surface after the water vapor annealing treatment was the same in the conventional example (A) and the present invention (B), and it was confirmed that the water vapor treatment effect was not reduced.

  As is clear from the above description, according to the present invention, even when a semiconductor substrate having a mirror surface on both sides is subjected to a water vapor annealing process at a high pressure, the effect of the water vapor annealing process is maintained while the substrate surface is being processed. The quality of annealing treatment and device yield can be improved by greatly reducing the number of particles and contamination that adheres, and the semiconductor substrate loading area can be made compact, contributing to downsizing of the apparatus. An effect is obtained.

  In addition, this invention is not limited to embodiment mentioned above, Of course, it can change variously in the range which does not deviate from the summary of this invention.

It is a figure which shows 1st Embodiment of this invention. It is typical sectional drawing of a sheet-like member and a semiconductor substrate. It is a figure which shows 2nd Embodiment of this invention. It is a total reflection fluorescent-X-ray-analysis result which shows the effect of this invention. It is a figure explaining the prior art disclosed by patent document 2. FIG. It is a figure explaining the prior art disclosed by patent document 3. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 10 Sheet-like member 10a Through-opening 12 Sheet-like member 12a Through-opening 14 Lid member

Claims (7)

In order to perform a water vapor annealing process on the semiconductor substrate in a state where the semiconductor substrate is alternately laminated with the semiconductor substrate, which is formed so as to cover the peripheral portion of the flat semiconductor substrate to be processed and which has a through-opening inside. The water vapor annealing jig of
The contact surface with the semiconductor substrate has a surface roughness capable of introducing water vapor molecules and preventing entry of particles and contamination having a predetermined particle diameter or more in a temperature and pressure range in which the semiconductor substrate is processed.
A water vapor annealing jig characterized by the above. To perform a water vapor annealing process on the semiconductor substrate in a state where the semiconductor substrate is alternately laminated with the semiconductor substrate formed of a sheet-like member formed so as to cover the peripheral portion of the flat semiconductor substrate to be processed and having a through-opening inside. The water vapor annealing jig of
The sheet-like member is made of a porous body having open pores that can introduce water vapor molecules and prevent intrusion of particles having a predetermined particle size or more and contamination in a temperature and pressure range in which a semiconductor substrate is processed.
A water vapor annealing jig characterized by the above.   A plurality of the sheet-like members are provided, and a lid member that is placed on the uppermost sheet-like member among the plurality of sheet-like members and closes a through opening of the sheet-like member is further provided. The jig for water vapor annealing according to 1 or 2.   The jig for steam annealing according to claim 1, wherein the sheet-like member is made of quartz, SiC, graphite, or non-alkali glass. It is formed so as to cover the peripheral edge of a flat semiconductor substrate to be processed, and has a through-opening inside, and the contact surface with the semiconductor substrate has water vapor molecules in a range of temperature and pressure for processing the substrate. Using a sheet-like member that can be introduced and has a surface roughness that prevents intrusion of particles and contamination having a predetermined particle diameter or more,
The sheet-like member and the semiconductor substrate are alternately laminated, and heat treatment is performed on the semiconductor substrate in a water vapor atmosphere.
A water vapor annealing method characterized by that. It is formed so as to cover the peripheral edge of a flat semiconductor substrate to be processed, has a through-opening inside, and can introduce water vapor molecules within a temperature and pressure range in which the substrate is processed and has a predetermined particle size or more. Using a sheet-like member made of a porous body having open pores that prevent invasion of particles and contamination,
The sheet-like member and the semiconductor substrate are alternately laminated, and heat treatment is performed on the semiconductor substrate in a water vapor atmosphere.
A water vapor annealing method characterized by that.   6. A lid member for closing a through opening of the sheet-like member is placed on the uppermost sheet-like member, and the semiconductor substrate is heat-treated in a water vapor atmosphere. 6. The water vapor annealing method according to 6.

Images