JP3984278B2 - Mask substrate flatness simulation system - Google Patents

Description

  The present invention relates to a mask substrate flatness simulation system in the semiconductor field.

  As the miniaturization of semiconductor devices progresses, the demand for miniaturization in the photolithography process is increasing. Already, the device design rule has been refined to 0.13 μm, and the pattern dimension accuracy that must be controlled is about 10 nm, and extremely strict accuracy is required. As a result, in recent years, problems in the photolithography process used in the semiconductor manufacturing process are becoming more prominent.

  The problem is the flatness of the mask substrate used in the lithography process, which is one of the factors related to the high accuracy of the pattern forming process. In other words, the flatness of the mask substrate cannot be ignored as the focus tolerance in the lithography process decreases with miniaturization.

  Therefore, as a result of repeated studies on the flatness of the mask substrate, the present inventors have clarified the following.

  The surface shape of the mask substrate varies widely, and even with the same flatness, it has various shapes such as a convex shape, a concave shape, a saddle shape, and a mixed type. Therefore, even when the flatness is the same, when the mask substrate is chucked on the mask stage of the wafer exposure apparatus by the vacuum chuck, the mask substrate is largely deformed at the time of chucking due to compatibility with the mask stage and the vacuum chuck. If the deformation does not occur, or conversely, the flatness is improved.

  This is because the flatness of the mask substrate after chucking depends on the surface shape of the mask substrate before chucking, and also varies depending on the location where vacuum chucking is performed on the same mask substrate. Conventionally, however, only the flatness is managed, and depending on the surface shape of the mask substrate, the flatness of the mask substrate may be greatly deteriorated by chucking the mask substrate on the mask stage of the wafer exposure apparatus.

  Then, it is clear that manufacturing a semiconductor device using an exposure mask obtained by forming a pattern on a mask substrate with such a deteriorated flatness is a major factor in reducing the product yield. Became.

  As described above, the present inventors compared the flatness of the mask substrate before and after chucking the mask substrate on the mask stage of the wafer exposure apparatus, and the flatness after chucking becomes worse depending on the surface shape of the mask substrate. The existence of the product was confirmed, and it was found that this deterioration in flatness was a major factor in the decrease in product yield.

  The present invention has been made in view of the above circumstances, and the object of the present invention is a product resulting from deterioration of the flatness of the mask substrate after the mask substrate is chucked on the mask stage of the wafer exposure apparatus. An object of the present invention is to provide a mask substrate flatness simulation system effective for solving the problem of yield reduction.

  Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.

That is, in order to achieve the above object, the mask substrate flatness simulation system according to the present invention obtains first information on the flatness of the main surface of the mask substrate after the mask pattern is formed by the measuring device; Means for generating second information on the flatness of the main surface by simulation when the mask substrate is set in the exposure apparatus from the first information and information on the mask chuck structure of the exposure apparatus. It is characterized by.

  The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

  According to the present invention, a mask effective for solving the problem of a decrease in product yield caused by deterioration of flatness of a main surface of a mask substrate after the mask substrate is chucked on a mask stage of a wafer exposure apparatus. A substrate flatness simulation system can be realized.

  Hereinafter, embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a flowchart showing a flow of an exposure mask manufacturing method according to the first embodiment of the present invention.

  First, eleven mask substrates A to K are prepared by forming a light shielding body covering a quartz substrate having a size of 152 mm square and a thickness of about 6 mm, and each of these mask substrates A to K is prepared. The surface shape and flatness of the main surfaces of the 11 mask substrates A to K before the main surface is measured by a substrate flatness measuring device (manufactured by Nidec Co., Ltd.) and chucked to the mask stage of the exposure apparatus by a vacuum chuck. Is acquired (step S1).

  Here, the flatness of the 142 mm square region (first region) 1 excluding the peripheral region of the mask substrate in FIG. The first region 1 is a pattern formation region that actually forms a pattern.

  Moreover, in this embodiment, the surface shape of the first region 1 is convex or concave, as shown in FIGS. 2B and 2C, respectively, a line L1 connecting both ends of the first region 1 Means a convex shape upward and a concave shape below. 3 (a) and 3 (b) show an overview of the surface shape having a convex shape on the top and a concave shape on the bottom.

  On the other hand, when the surface shape of the second region 2 is convex or concave, the height is lower than the surface of the first region 1 toward the peripheral edge of the mask substrate as shown in FIG. It means a shape (convex) or an elevated shape (concave). The second region 2 will be described in detail in the second embodiment.

Next, based on the acquisition result, each of the eleven mask substrates A to K is classified for each type of surface shape of the main surface (step S2). The results are shown in Table 1. The type of surface shape (first information) could be classified into four types: convex type, concave type, saddle type, and kamaboko type from the above measurement results. Further, the measured value (second information) of the flatness of the first region 1 before being chucked on the mask stage was in the range of 0.4 μm to 0.5 μm. FIGS. 3 (c) and 3 (d) show an overview of the surface shapes of the bowl shape and the kamaboko type, respectively.

  Next, the 11 mask substrates A to K are sequentially chucked by a vacuum chuck on a mask stage of an ArF wafer exposure apparatus (manufactured by Nikon), and the flatness of the main surface of each mask substrate after the chucking by the vacuum chuck is measured. Is performed (step S3).

  Here, the flatness of the 142 mm square first region 1 (FIG. 2A) excluding the peripheral region of the mask substrate was measured. Thereafter, as shown in Table 1, for 11 mask substrates A to K, a correspondence relationship between the type of surface shape and the flatness value before and after chucking by the vacuum chuck is created (step S4).

  As can be seen from Table 1, the flatness after the chucking of the mask substrates A to C having the convex shape is the same as or slightly better than that before the chucking. The flatness of was greatly deteriorated after chucking.

  Further, for a mask substrate having a kamaboko type surface shape, a mask substrate on the mask stage arranged in a predetermined direction with respect to the chuck (mask substrates H and I) and a direction orthogonal to the predetermined direction, that is, The flatness was measured with respect to the mask substrate portions (mask substrates J and K) which are arranged in the direction rotated by 90 degrees and the chuck substrate portions are changed.

  As a result, as shown in Table 1, it became clear that the flatness after the vacuum chucking of the kamaboko type mask substrates H to K changes depending on the arrangement direction of the mask substrate with respect to the chuck.

  That is, it has been clarified that the flatness of the kamaboko type mask substrates H to K after the vacuum chucking varies depending on the location of the mask substrate to be vacuum chucked.

  Specifically, as in the mask substrates H and I, when the mask substrate is arranged on the mask stage in a predetermined direction with respect to the chuck, the side that draws the semicircular arc is the mask stage of the exposure apparatus. On the other hand, the flatness is hardly improved, but when it is arranged in a direction rotated 90 degrees like the mask substrates J and K, the side where the kamaboko-shaped arc is drawn becomes the chuck of the mask stage of the exposure apparatus. The flatness was 0.3 μm or less without hitting, and it was confirmed that the flatness was improved (Table 1). In addition, the reason why the surfaces rotated by the mask substrates A to G having other surface shapes are not shown in Table 1 is that the flatness is not improved even when rotated.

  Next, as described above, the surface shape type before and after chucking by the vacuum chuck and the flatness value are known, and the flatness suitable for the specification is selected from the mask substrate group of 11 mask substrates A to K. A mask substrate having the same type of surface shape as the mask substrate having a degree is prepared separately from the eleven mask substrates AK (step S5). Here, a case will be described in which a mask substrate having the same shape as the mask substrate J is selected as the separately prepared mask substrate.

  Note that the mask substrates A to K and the separately prepared mask substrate are formed so that the flatness of the pattern formation region falls within a predetermined specification, and the difference in surface shape is caused by variation. .

  Next, a resist is applied on the mask substrate prepared separately.

  Then, the manufacturing process of the exposure mask of a well-known manufacturing method continues. That is, a desired pattern is drawn on a resist on a mask substrate by an electron beam drawing apparatus. Next, the resist is developed to form a resist pattern, and then the light shielding body of the mask substrate is etched by a reactive ion etching apparatus using the resist pattern as a mask to form a light shielding body pattern. Thereafter, the resist pattern is peeled off, and then the surface of the mask substrate is cleaned to complete an exposure mask on which a desired mask pattern is formed (step S6).

  The desired pattern includes, for example, a circuit pattern, or includes a circuit pattern and an alignment pattern.

  When the exposure mask thus obtained was set in an ArF wafer exposure apparatus and the main surface flatness was measured, it was confirmed to be a good value of 0.2 μm. Then, such an exposure mask with high flatness is chucked on a mask stage of an exposure apparatus, a pattern formed on the exposure mask is illuminated by an illumination optical system, and an image of the pattern is desired by a projection optical system. Employing an exposure method in which an image is formed on a substrate (for example, a substrate coated with a resist) significantly increases the focus latitude during wafer exposure, and greatly improves the yield of semiconductor products such as DRAM.

  Thus, according to the present embodiment, it is effective to solve the problem of the decrease in product yield caused by the deterioration of the flatness of the main surface of the mask substrate by chucking the mask substrate on the mask stage of the wafer exposure apparatus. It is possible to realize a method for manufacturing an appropriate exposure mask.

  The mask substrates A to K and the mask substrate prepared separately may be those in which alignment marks are formed in advance. The means for chucking the mask substrate to the mask stage is not limited to the vacuum chuck.

(Second Embodiment)
In the first embodiment, the surface shape and the flatness are obtained only for the first region 1 of the main surface of the mask substrate 1 shown in FIG. 2A (step S1). The surface shape and the flatness are obtained for each of the two regions, i.e., the first region 1 and the second region 2 surrounding the first region 1.

  Here, the first region 1 is a rectangular region having a side length of 142 mm with the center of the mask substrate being the center of the region, and the second region 2 is a length of one side surrounding the first region 1. Is a mouth-like region (a region obtained by removing a rectangular region smaller than that having the center of the rectangular region from the center of the rectangular region). The region (mask chuck region) that is chucked by the vacuum chuck when the mask substrate 1 is set on the mask stage of the exposure apparatus is substantially included in the second region 2. That is, most of the force for chucking the mask substrate on the mask stage acts on the second region 2.

In consideration of managing not only the pattern formation region but also the flatness of the mask chuck region on the extension line of the prior art, the first region 1 is expanded, and thereby the flatness of the region including the mask chuck region is increased. However, with the current mask manufacturing technology, it is very difficult to flatten the entire main surface of the mask substrate 1, and the flatness of the main surface of the mask substrate 1 rapidly deteriorates at the end. Therefore, if the first region 1 is widened, the flatness of the central portion of the mask substrate 1 is good, but the flatness of the end portion of the mask substrate 1 is poor. Therefore, in this embodiment, as described above, the first region 1 including the mask center and the second region 2 surrounding the first region 1 are deteriorated. Flat for each And obtaining the surface shape.

  A flatness and a surface shape of a main surface of a mask substrate formed by forming a light-shielding body on a quartz substrate having a size of 152 mm square and a thickness of about 6 mm are measured by a substrate flatness measuring device (manufactured by Nidec Co., Ltd.). Thirteen mask substrates A to M having different flatness and surface shape of region 1 and different flatness and surface shape of second region 2 were prepared.

  Next, the 13 mask substrates A to M were sequentially set on an ArF wafer exposure apparatus (manufactured by Nikon Corporation), and the flatness of the main surface of each mask substrate after the chucking by a vacuum chuck was measured.

Next, for the 13 mask substrates A to M, a correspondence relationship between the type of surface shape and the flatness values of the first and second regions before and after the chuck by the vacuum chuck was created. The results are shown in Table 2.

  The surface shapes of the first and second regions of the 13 mask substrates A to M were classified into four types: a convex type, a concave type, a saddle type, and a kamaboko type. The surface shapes of the first and second regions of the mask substrate A having a simple convex surface shape are both convex. On the other hand, the surface shape of the mask substrate B shaped like a hat with a collar was convex in the first region and concave in the second region.

  From Table 2, it can be seen that the mask substrate in which the planar shape of the first region is deteriorated by chucking with a vacuum chuck has a concave shape and a saddle type surface shape of the second region. In addition, the surface shapes of the mask substrates C, D, H, I, L, and M having different shapes depending on the arrangement direction of the mask substrate on the mask stage were shown.

  Specifically, when the mask substrate is arranged on the mask stage in a predetermined direction with respect to the chuck, the edge of the kamaboko-shaped arc hits the chuck of the mask stage of the exposure apparatus, and the flatness decreases. On the other hand, when arranged in a direction rotated by 90 degrees, the edge drawing the kamaboko-shaped arc does not hit the chuck of the mask stage of the exposure apparatus, and the flatness becomes 0.4 μm or less, and this direction (the direction rotated by 90 degrees) It was confirmed that the flatness of most of the mask substrates arranged in (1) was improved.

  It was also confirmed that the flatness of the first region after chucking by the vacuum chuck was almost irrelevant to the surface shape of the first region before chucking. That is, the shape change of the main surface of the mask substrate before and after the chucking by the vacuum chuck is almost determined by the surface shape of the second region.

  Furthermore, even though the flatness of the second region is much worse than the flatness of the first region, when the surface shape of the second region is convex, It was confirmed that the surface shape of the first region of the mask substrate hardly changed.

  From the above, for a plurality of mask substrates, a correspondence relationship between the types of surface shapes of the first region 1 and the second region 2 and the flatness value of the mask substrate main surface before and after chucking by the vacuum chuck is created. As a result, it is not necessary to make the first region 1 of the mask substrate wider than necessary in order to manage the flatness of the mask chuck region, and the flatness of the first region 1 is set to a stricter value than necessary. It is possible to make the mask substrate less realistic, and by considering the surface shape of the second region 2, a mask substrate in which the flatness of the mask substrate main surface before and after chucking by the vacuum chuck is small is reduced. It becomes possible to select more reliably.

  Next, as described above, the types of surface shapes of the first region 1 and the second region 2 before chucking by the vacuum chuck and the flatness value of the mask substrate main surface after chucking are known. A mask substrate having the same type of surface shape as the mask substrate having the flatness that meets the specifications is prepared separately from the 13 mask substrates A to M from the mask substrate group of the mask substrates A to M. .

  Here, as the mask substrate to be prepared separately, one having the same surface shape as the mask substrate F (the first region is concave and the second region is convex) was prepared. When this mask substrate was measured, the flatness of the first region was 0.3 μm or less, and the flatness of the second region was 4 μm or less.

  Next, a resist was applied on the mask substrate.

  Then, the manufacturing process of the exposure mask of a well-known manufacturing method continues. That is, a desired pattern is drawn on a resist on a mask substrate by an electron beam drawing apparatus. Next, the resist is developed to form a resist pattern, and then the light shielding body of the mask substrate is etched by a reactive ion etching apparatus using the resist pattern as a mask to form a light shielding body pattern. Thereafter, the resist pattern is peeled off, and then the surface of the mask substrate is washed to complete an exposure mask on which a desired mask pattern is formed.

  The desired pattern includes, for example, a circuit pattern, or includes a circuit pattern and an alignment pattern.

  When the exposure mask thus obtained was set in an ArF wafer exposure apparatus and the flatness of the first region was measured, it was confirmed that the flatness was as good as 0.2 μm. Then, such an exposure mask with high flatness is chucked on a mask stage of an exposure apparatus, a pattern formed on the exposure mask is illuminated by an illumination optical system, and an image of the pattern is desired by a projection optical system. Employing an exposure method in which an image is formed on a substrate (for example, a substrate coated with a resist) significantly increases the focus latitude during wafer exposure, and greatly improves the yield of semiconductor products such as DRAM.

  Thus, in this embodiment as well, as in the first embodiment, the product yield decreases due to the deterioration of the flatness of the main surface of the mask substrate after the mask substrate is chucked on the mask stage of the wafer exposure apparatus. It is possible to realize an exposure mask manufacturing method effective for solving the above-mentioned problem.

  The mask substrates A to M and the mask substrate prepared separately may be those in which alignment marks are formed in advance. The means for chucking the mask substrate to the mask stage is not limited to the vacuum chuck.

  In addition, from Table 2, since the surface shape of the second region is convex, the surface shape of the second region is convex because the flatness of the first region after chucking by the vacuum chuck is good. A mask substrate or an exposure mask may be prepared and used.

  In the mask substrate or the exposure mask having the above-described surface shape, that is, the convex shape in the second region, the polishing rate is higher in the central region, for example, in the peripheral region and the inner region (central region) of the quartz substrate. Can be obtained by using Specifically, it can be obtained by polishing the main surface of the quartz substrate using a polishing apparatus for a longer time than before. Then, according to a well-known method, a light shielding body is formed into a mask substrate, and further, the exposure mask is obtained by patterning the light shielding body.

  Then, the exposure mask on which the second region having such a predetermined surface shape (here, convex) is formed is chucked on the mask stage of the exposure apparatus, and the pattern formed on the exposure mask by the illumination optical system is obtained. If an exposure method is used in which illumination is performed and an image of the pattern is formed on a desired substrate (for example, a substrate coated with a resist) by a projection optical system, as in the first embodiment, the wafer is exposed at the time of wafer exposure. The focus margin is greatly increased, and the yield of semiconductor products such as DRAM is greatly improved.

  Conventionally, the quartz substrate is polished so that the entire main surface is as flat as possible. Therefore, control that lengthens the polishing time has not been intentionally performed so that the difference in the polishing rate does not become significant. Therefore, even if the surface shape of the second region becomes convex or concave due to polishing variations, the degree is clearly smaller than that of the mask substrate and the exposure mask of this embodiment.

(Third embodiment)
In the present embodiment, the surface shape of the main surface of the mask substrate corresponding to the surface shape of the main surface of the mask substrate after chucking by the vacuum chuck is acquired by simulation.

  First, the surface shape and flatness of the main surface of a mask substrate formed by forming a light shielding body on a quartz substrate having a size of 152 mm square and a thickness of about 6 mm are measured by a substrate flatness measuring device (manufactured by NIDEK). 13 mask substrates A to M having different surface shapes and flatnesses were prepared.

Next, from the mask chuck structure of the ArF wafer exposure apparatus (manufactured by Nikon Corporation) and the measured flatness of the principal surfaces of the 13 mask substrates A to M, the ArF wafer exposure apparatus The flatness of the main surfaces of the mask substrates A to M when the 13 mask substrates A to M were sequentially chucked on the mask stage by a vacuum chuck was obtained by simulation. An analytical method may be used instead of the finite element method. Next, in order to confirm whether or not this simulation is correct, the 13 mask substrates A to M are actually actually chucked by the vacuum chuck to the ArF wafer exposure apparatus, and each mask substrate after chucking by the vacuum chuck is checked. The flatness of the main surface was measured. As a result, the main surfaces of the mask substrates A to M obtained by the simulation and the main surfaces of the mask substrates A to M obtained by the measurement using the substrate flatness measuring device actually set on the ArF wafer exposure apparatus. With respect to the flatness of the surface, as shown in Table 3, it was confirmed that the difference was not more than 0.1 μm in most of the mask substrates A to M.

  That is, regarding the mask substrate, in the creation of the correspondence relationship between the type of surface shape and the flatness value before and after chucking by the vacuum chuck in the above embodiment, the value obtained by simulation of the flatness value before and after chucking by the vacuum chuck Can be replaced.

  From this result, the surface shape of the main surface of the mask substrate is determined by measuring with a substrate flatness measuring device (manufactured by Nidec Co., Ltd.). Next, the mask chuck structure of the exposure apparatus and the above-described main surface of the mask substrate already acquired The mask when the mask substrate is actually set on the wafer exposure device by simulating the surface shape of the main surface of the mask substrate when the mask substrate is sequentially chucked by the vacuum chuck on the mask stage of the exposure device from the flatness It was found that the surface shape of the main surface of the substrate can be predicted. Therefore, the surface shape and flatness of the main surface of the mask substrate can be managed with much higher accuracy than before.

  FIG. 4 is a flowchart showing the flow of the exposure mask manufacturing method according to the third embodiment of the present invention. In the flowchart of FIG. 4, in step S3, the surface shape of the main surface of the mask substrate when the mask substrate is chucked by the vacuum chuck is obtained by simulation. In step S4, a correspondence between the surface shape and the flatness acquired using the substrate flatness measuring device and the flatness acquired by simulation is created. Steps S1, S2, S5, and S6 are the same as those in the flowchart of FIG.

  Next, the surface shape of the main surface of the mask substrate is measured by the substrate flatness measuring device, and the surface shape of the main surface of the mask substrate when the mask substrate is sequentially chucked by the vacuum chuck on the mask stage of the exposure apparatus is simulated. In step S5, a mask substrate that is known to have a flatness of 0.2 μm was prepared separately from the 13 mask substrates A to M.

  Thereafter, in step S6, an exposure mask manufacturing process of a known manufacturing method continues. That is, a desired pattern is drawn on a resist on a mask substrate by an electron beam drawing apparatus. Next, the resist is developed to form a resist pattern, and then the light shielding body (mask pattern) is formed by etching the light shielding body of the mask substrate with a reactive ion etching apparatus using the resist pattern as a mask. Thereafter, the resist pattern is peeled off, and then the surface of the mask substrate is washed to complete an exposure mask on which a desired mask pattern is formed. When this exposure mask was actually set on an ArF wafer exposure apparatus and the surface shape and flatness of its main surface were measured using a substrate flatness measuring apparatus, the flatness was 0.2 μm as a result of simulation. The flatness was confirmed. Then, such an exposure mask with high flatness is chucked on a mask stage of an exposure apparatus, a pattern formed on the exposure mask is illuminated by an illumination optical system, and an image of the pattern is desired by a projection optical system. Employing an exposure method in which an image is formed on a substrate (for example, a substrate coated with a resist) significantly increases the focus latitude during wafer exposure, and greatly improves the yield of semiconductor products such as DRAM.

  Thus, in this embodiment as well, as in the first and second embodiments, the flatness of the main surface of the mask substrate deteriorates after the mask substrate is chucked on the mask stage of the wafer exposure apparatus. An exposure mask manufacturing method effective in solving the problem of a decrease in product yield can be realized.

  The mask substrates A to M and the mask substrate prepared separately may be those in which alignment marks are formed in advance. The means for chucking the mask substrate to the mask stage is not limited to the vacuum chuck.

  In each of the above-described embodiments, for example, the wafer exposure apparatus may not be an ArF wafer exposure apparatus. Further, after forming the mask pattern, the flatness of the main surface of the mask substrate is further measured, and the surface shape of the main surface of the mask substrate when the mask substrate is set in the exposure apparatus can be obtained from the measurement data by simulation. Good. As a result, the deformation of the main surface of the mask substrate generated during the mask pattern formation is also taken into the acquisition result by simulation, and the surface shape and flatness of the main surface of the mask substrate can be managed with higher accuracy. It becomes like this. Further, the mask is not limited to ArF or KRF, and can be applied to, for example, a reflective mask for vacuum ultraviolet exposure, an X-ray exposure mask, an electron beam exposure mask, and the like.

(Fourth embodiment)
In the present embodiment, the surface shape of the main surface of the mask substrate corresponding to the surface shape of the main surface of the mask substrate after chucking by the vacuum chuck is acquired by simulation.

  FIG. 5 is a flowchart showing the flow of the exposure mask manufacturing method according to the present embodiment.

  In step S1, the surface shape and flatness of the main surface of one mask substrate formed by forming a light-shielding body on a quartz substrate having a size of 152 mm square and a thickness of about 6 mm are measured with a substrate flatness measuring device (manufactured by Nidec Corporation). ).

  Next, in step S2, an ArF wafer exposure apparatus is used from the mask chuck structure of the ArF wafer exposure apparatus (manufactured by Nikon Corporation) and the measured flatness of the main surface of the one mask substrate using a finite element method. The flatness of the main surface of the mask substrate when the one mask substrate was sequentially chucked on the mask stage by a vacuum chuck was obtained by simulation. An analytical method may be used instead of the finite element method.

  Next, in step S3, it is determined whether or not the flatness of the main surface of the mask substrate obtained by the simulation conforms to the specification. If it is determined that it conforms to the specification, the exposure mask is determined in step S4. The manufacturing process begins.

  On the other hand, if it is determined in step S3 that the flatness of the mask substrate does not meet the specifications, the light shielding body film on the quartz substrate of the mask substrate is peeled off in step S5. Next, in step S6, the surface of the quartz substrate is polished. Next, in step S7, a new light shielding film is formed on the polished surface of the quartz substrate, and the process returns to the flatness measurement in step S1.

  Also in this embodiment, the flatness of the main surface of the mask substrate deteriorates after the mask substrate is chucked on the mask stage of the wafer exposure apparatus, as in the first embodiment, the second embodiment, and the third embodiment. Therefore, it is possible to realize an exposure mask manufacturing method effective for solving the problem of a decrease in product yield.

  The mask substrate may be one in which alignment marks are formed in advance. The means for chucking the mask substrate to the mask stage is not limited to the vacuum chuck.

  Further, for example, the wafer exposure apparatus may not be an ArF wafer exposure apparatus. Further, after forming the mask pattern, the flatness of the main surface of the mask substrate is further measured, and the surface shape of the main surface of the mask substrate when the mask substrate is set in the exposure apparatus can be obtained from the measurement data by simulation. Good. As a result, the deformation of the main surface of the mask substrate generated during the mask pattern formation is also taken into the acquisition result by simulation, and the surface shape and flatness of the main surface of the mask substrate can be managed with higher accuracy. It becomes like this. Further, the mask is not limited to ArF or KRF, and can be applied to, for example, a reflective mask for vacuum ultraviolet exposure, an X-ray exposure mask, an electron beam exposure mask, and the like.

(Fifth embodiment)
Next, a mask substrate information generating method according to the fifth embodiment of the present invention will be described.

  The mask substrate information generation method of the present embodiment is such that, for each of the 11 mask substrates A to K shown in Table 1, the surface shape of the main surface and the flatness of the main surface before and after the chuck according to, for example, steps S1 to S3 in the flowchart of FIG. The step of acquiring the degree, the step of associating the mask substrate, the type of surface shape and the flatness value as shown in Table 1 with respect to the eleven mask substrates A to K, and the correspondence between them are a personal computer (PC) And the like.

  Further, the association stored in a personal computer (PC) or the like may be presented. Specifically, for example, a seal printed with the presentation content may be attached to a container containing eleven mask substrates AK.

  By adopting such a presentation method for the above correspondence, the product yield is reduced due to the deterioration of the flatness of the main surface of the mask substrate after the mask substrate is chucked on the mask stage of the wafer exposure apparatus. It becomes possible to easily manage a mask substrate effective for solving the above problem.

  Further, after step S2 of the flowchart of FIG. 1, information indicating that the surface shape of the main surface is convex in the information acquired in step S2 of the flowchart of FIG. 1 is associated with the mask substrate corresponding thereto, By storing the association in a personal computer (PC) or the like, a mask substrate information generation method different from the mask substrate information generation method of the present embodiment can be performed. In this case, similarly to the mask substrate information generation method of the present embodiment, it is possible to easily manage the mask substrate similarly by presenting the correspondence with a seal or the like.

  Here, the mask substrate information generation method has been described by taking 11 mask substrates A to K in Table 1 as an example, but mask substrate information generation is similarly performed for 13 mask substrates A to M in Table 2. Can be implemented.

(Sixth embodiment)
FIG. 6 is a diagram schematically showing a server system according to the sixth embodiment of the present invention. In the fifth embodiment, a sticker is given as an example of presentation, but in the present embodiment, it is presented on a server (server device), whereby the mask substrate information generation method of this embodiment is changed to e-business (e-mail business). ) Will be available.

  First, for example, in the fab 11, a table such as Table 1 or Table 2 or Table 32 showing the correspondence is created, and a page including this as information is uploaded to the server 12. The server 12 stores the page in a storage means such as a hard disk.

  The server 12 is connected to a plurality of clients (client devices) 13 via the Internet. A dedicated line may be used instead of the Internet. Alternatively, a combination of the Internet and a dedicated line may be used.

  The server 12 is a well-known means for performing processing for receiving a request message for the page from the client 13 and a well-known means for performing processing for transmitting the page in a form that can be displayed on the client side. And well-known means for performing processing for receiving a substrate mask application message from the client 13 that has transmitted the page. These known means are constituted by, for example, a LAN card, a storage device, server software, a CPU, and the like, and these perform a desired process in cooperation.

  When the server 12 receives a request message for the above page from the client 13, the server 12 sends information necessary for displaying the screen 14 as shown in FIG. 3 on the display of the client 13 to the client 13. The screen 14 has a table 15 having the contents shown in Table 1, a check box 16 for selecting and checking a desired mask substrate, and a decision to purchase a mask substrate checked in the check box. A determination icon 17 is displayed to inform the user. FIG. 6 shows the table 15 having the contents shown in Table 1 for simplicity, but a table having the contents shown in Table 2 or the contents shown in Table 3 may be used.

  According to the present embodiment, a mask substrate having a high flatness can be purchased after the mask substrate is chucked on the mask stage of the wafer exposure apparatus. Therefore, the main surface of the mask substrate after the mask substrate is chucked on the mask stage. It becomes possible to realize a server effective in solving the problem of a decrease in product yield caused by the deterioration of the flatness of the product.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to these embodiment. For example, in the above-described embodiment, a good result was obtained with a convex mask substrate, but a better result may be obtained with a concave mask substrate depending on the exposure apparatus on which the mask substrate is set. That is, the flatness of the mask substrate after vacuum chucking is greatly affected by the compatibility between the mask chuck stage and the shape of the mask chuck surface, and therefore the shape of the mask main surface to be selected varies depending on the mask chuck stage used.

  Further, in each of the above embodiments, the case of a mask substrate for an ArF wafer exposure apparatus has been described, but other mask substrates include, for example, a mask substrate for a KrF wafer exposure apparatus, a reflective mask substrate for vacuum ultraviolet exposure, It can also be used for an X-ray exposure mask substrate, an electron beam exposure mask substrate, and the like.

  Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, if the problem described in the column of the problem to be solved by the invention can be solved, the configuration in which this constituent requirement is deleted Can be extracted as an invention. In addition, various modifications can be made without departing from the scope of the present invention.

3 is a flowchart showing a flow of a method for manufacturing an exposure mask according to the first embodiment of the present invention. 2A is a plan view of the main surface of the mask substrate 1, and is a diagram for explaining the first and second regions, and FIG. 2B is a diagram illustrating the first region 1 of the mask substrate. FIG. 2 is a diagram for explaining, and a cross-sectional view of the first region 1, and FIG. 2C is a diagram for explaining the first region 1 of the mask substrate, in addition to the first region 1. FIG. 2D is a cross-sectional view of the second region 2 for explaining the second region 2 of the mask substrate. FIG. 3A is a diagram for explaining the first region 1 of the mask substrate, and is a schematic perspective view of the first region 1, and FIG. 3B is the first region 1 of the mask substrate. FIG. 3C is a perspective view illustrating another overview of the first region 1, and FIG. 3C is a diagram illustrating the first region 1 of the mask substrate. FIG. 3D is a perspective view for explaining the first region 1 of the mask substrate, and is another perspective view of the first region 1. The flowchart which shows the flow of the manufacturing method of the exposure mask which concerns on the 3rd Embodiment of this invention. The flowchart which shows the flow of the manufacturing method of the exposure mask which concerns on the 4th Embodiment of this invention. The figure which shows typically the server which concerns on the 6th Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... 1st area | region, 2 ... 2nd area | region (pattern formation area), 11 ... Fab, 12 ... Server, 13 ... Client, 14 ... Screen, 15 ... Table, 16 ... Check box, 17 ... Decision icon.

Claims (5)

The exposure apparatus removes the mask substrate from the first information on the flatness of the main surface of the mask substrate after the mask pattern is formed by the measuring device, and the first information and the information on the mask chuck structure of the exposure apparatus. A mask substrate flatness simulation system, comprising: means for generating second information related to the flatness of the main surface by simulation when set in the mask substrate. 2. The mask substrate flatness simulation system according to claim 1, wherein an alignment mark is formed in advance on the mask substrate. 2. The mask substrate flatness simulation system according to claim 1, wherein the second information is generated by the simulation using a finite element method. The apparatus further comprises means for creating a correspondence relationship between information on the flatness of the main surface of the mask substrate acquired before chucking on the mask stage of the exposure apparatus and information on the flatness acquired by the simulation. Item 4. The flatness simulation system for a mask substrate according to Item 1 or 3. 4. The mask substrate flatness simulation system according to claim 1, further comprising means for determining whether or not the flatness of the mask substrate generated by simulation meets specifications.

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