JP3974423B2 - Display control device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display control device, and more particularly to a display control device that enables correction or addition of display data.
[0002]
[Prior art]
Conventionally, this type of display circuit is generally configured as shown in FIG. Hereinafter, the configuration will be described with reference to the drawings.
FIG. 2 is a block diagram showing a basic configuration of a conventional display control apparatus.
In FIG. 2, the display control device 200 displays a command ROM 202 that stores a command code, a CPU 201 that decodes the command code and executes arithmetic processing, a RAM 203 that stores output related to the display code of the CPU 201, and an image. The display ROM 204 stores the display data and the display control circuit OSD 205 that sets the image and controls the display data by the output of the CPU 201 regarding the image characteristics.
[0003]
Next, the operation of the conventional display control apparatus having the above configuration will be described.
The CPU 201 executes arithmetic processing in accordance with an instruction code described by a program stored in the instruction ROM 202, and particularly in display control, the display code for displaying on the display device 210 is written into the RAM 203 and at the same time the display timing. The display settings such as the color, shape, and size of the display data are set in a register built in the display control circuit OSD205.
[0004]
The display control circuit OSD205 decodes the display code written in the RAM 203, reads the character or graphic data corresponding to the display code from the display ROM 204, and in accordance with the set value set in the display control circuit OSD205, the RGB signal Is displayed and an image is displayed on the screen of the display device 210.
[0005]
[Problems to be solved by the invention]
However, in such a conventional display control device, when there is erroneous data in the display ROM storing the character or graphic data read by the display control circuit OSD, the display device originally displays as shown in FIG. There is a problem that a display different from the image to be output is output on the screen.
The present invention has been made to solve such conventional problems, and can correct erroneous data in the display ROM, output correct display data to the screen, and easily add display data. It is an object of the present invention to provide a display control device that can do the above.
[0006]
[Means for Solving the Problems]
  In order to solve the above problems, a display control device according to claim 1 of the present invention is a display control device that reads predetermined display data from a storage device and displays an image on the display device, and stores an instruction program. A central processing unit that decodes the instruction code in the instruction ROM and executes arithmetic processing, a rewritable RAM that stores a display code output from the CPU, and display data for displaying an image on the display device A read-only display ROM for storing, a display control circuit for reading and decoding the display code written in the RAM and simultaneously reading display data from the display ROM and displaying an image on the display device according to the display code; When erroneous display data is recorded in the display ROM, in order to detect the address where the erroneous display data is stored The display for an address and the address register for setting the address display data Tsu said error from the CPU are stored, display data Tsu said error is storedControl circuitAn address coincidence detection circuit for detecting access from a data register, a data register for setting correct display data for correction from the CPU, data read from the display ROM and the data register A ROM correction circuit that replaces stored data, and when erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data. An area other than an address area in which display data of the display ROM is stored is set in an address register in the ROM correction circuit, and display data for these addresses is set in a data register in the ROM correction circuit. And the address from the display control circuit and the address register are set. By outputting display data to said address from the data register when the address matches, is to add display data.
[0008]
  According to a second aspect of the present invention, there is provided a display control device for reading out predetermined display data from a storage device and displaying an image on the display device, wherein the instruction code stored in the instruction ROM stores the instruction program. A central processing unit (hereinafter referred to as a CPU) that executes arithmetic processing, a rewritable RAM that stores a display code output from the CPU, and display data for displaying an image on the display device A read-only display ROM that stores the display code, and a display control circuit that reads and decodes the display code written in the RAM and simultaneously reads display data from the display ROM and displays an image on the display device according to the display code; In the case where wrong display data is recorded in the display ROM, in order to detect the address where the wrong display data is stored The display address register for setting the address display data Tsu said error from the CPU are stored, to the address display data Tsu said error is storedControl circuitAn address coincidence detection circuit for detecting access from a data register, a data register for setting correct display data for correction from the CPU, data read from the display ROM and the data register A ROM correction circuit that replaces stored data, and when erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data. In the address area where the display data of the display ROM is stored, an address corresponding to a series of the display data is set in an address register in the ROM correction circuit, and A fixed correction data is set in a data register in the ROM correction circuit, and the display When the display data is transferred to the display control circuit by outputting the fixed correction data for the address from the data register when the address from the control circuit matches the address set in the address register, Display control is executed after the certain correction is performed on a series of the display data.
[0010]
  According to a third aspect of the present invention, there is provided a display control device for reading out predetermined display data from a storage device and displaying an image on the display device, wherein the instruction code stored in the instruction ROM stores the instruction program. A central processing unit (hereinafter referred to as a CPU) that executes arithmetic processing, a rewritable RAM that stores a display code output from the CPU, and display data for displaying an image on the display device A read-only display ROM that stores the display code, and a display control circuit that reads and decodes the display code written in the RAM and simultaneously reads display data from the display ROM and displays an image on the display device according to the display code; In the case where wrong display data is recorded in the display ROM, in order to detect the address where the wrong display data is stored The display address register for setting the address display data Tsu said error from the CPU are stored, to the address display data Tsu said error is storedControl circuitAn address coincidence detection circuit for detecting access from a data register, a data register for setting correct display data for correction from the CPU, data read from the display ROM and the data register A ROM correction circuit that replaces stored data, and when erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data. An instruction ROM for storing the instruction code and a display ROM for storing the display data are arranged on the same ROM, and the address area in which the instruction code and the display data of the ROM are stored Areas other than those are set in the address registers inside the ROM correction circuit, and the instruction code for these addresses is set. Instruction or display data is set in the data register in the ROM correction circuit, and an instruction for the address is matched when the address from the CPU or the address from the display control circuit matches the address set in the address register. An instruction code or display data is added by outputting the code or display data from the data register.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
  Hereinafter, the present inventionAccording to the first embodimentDisplay control deviceLastThis will be described with reference to the drawings.
  FIG. 1 is a block diagram showing a configuration of a display control apparatus according to Embodiment 1 of the present invention.
[0013]
In FIG. 1, a display control apparatus 100 includes an instruction ROM 102 that stores an instruction code described by an instruction program, and a central operation process that decodes the instruction code, executes an operation process, and outputs a display code and a display setting. When there is an error in the display data stored in the device CPU 101, the RAM 103 for storing the display code, the display ROM 104 for storing display data for displaying an image, the display control circuit OSD 105, and the display ROM 104, The ROM correction circuit 106 detects an address where erroneous data is stored and replaces it with correct display data.
[0014]
FIG. 5 is a block diagram showing a configuration of the ROM correction circuit 106 in FIG. In FIG. 5, a ROM correction circuit 106 (500) includes an address register 503 that holds an address of incorrect data stored in the display ROM 104, and a data register 501 that holds correct data for replacing the incorrect data. The control register 502 that outputs a signal for correcting erroneous data, and the address match determination circuit 504 that determines whether or not the access address for reading data from the display ROM 104 matches the address registered in the address register 503 in advance. And an AND circuit 505 that turns on / off the correction function of error data, and a selector 506 that selects and outputs data from the data register 501 or the display ROM 104 in accordance with a control signal.
[0015]
In the ROM correction circuit 106 (500), when the apparatus is started, the address of erroneous data stored in the display ROM 104 is set in advance in the built-in address register 503 via communication means such as a general-purpose port, and After the correct display data corresponding to the address is set in the built-in data register 501, the control register 502 is set to the enable state so as to correspond to those addresses. An example thereof is shown in FIGS. Four incorrect data addresses A shown in FIG._k, A_n~ A_{n + 2}Are set in the address register 503, and the correct display data corresponding to those addresses, “7C7E”, “7FFC”, “7FF8”, and “7FF0” are set in the data register 501 as shown in FIG. When an image is displayed using these correct data, the image changes from 601 to 602 in FIG. 6 and is correctly displayed.
[0016]
Next, the operation of the display control apparatus according to Embodiment 1 of the present invention having the above configuration will be described with reference to the drawings.
As shown in FIG. 1, an image is displayed on the display device 110 by R, G, and B outputs output by the display control device 100.
The CPU 101 executes arithmetic processing according to an instruction code described by a program stored in the instruction ROM 102, and particularly in display control, the display code for display on the display device is written into the RAM 103 and at the same time the display timing. The display settings such as the color, shape, and size of the display data are set in a register built in the display control circuit OSD105.
[0017]
The display control circuit OSD 105 decodes the display code written in the RAM 103 and reads character or graphic data corresponding to the display code from the display ROM 104. Therefore, the ROM address is output to the display ROM 104 and the ROM correction circuit 106. The display data read according to the address is first output to the ROM correction circuit 106.
[0018]
The ROM address input to the ROM correction circuit 106 (500) is input to the address match determination circuit 504. The address match determination circuit 504 compares an address set in advance in the address register 503 with the input ROM address to determine whether or not the address values match. When the value set in the address register 503 matches the input address and the set value in the control register 502 is enabled, the data in the built-in data register 501 and the display ROM 104 to the ROM correction circuit 106 (500 ) Is switched by the selector circuit 506, and correct display data is output to the OSD 105. In other cases, the display data input from the display ROM 104 to the ROM correction circuit 106 (500) is output to the OSD 105 as it is.
[0019]
Specifically, as shown in FIG. 6, display data is sequentially output from the display ROM 104 in accordance with an address output from the display control circuit OSD 105. The address output from the display control circuit OSD105 is A._kThe address match determination circuit 504 built in the ROM correction circuit 106 is set to the address value A set in the address register 503._kSince the setting of the control register 502 is enabled at this time, the correct display data set in the built-in data register 501 is replaced with the display data output from the display ROM 104. Instead, it is switched by the selector circuit 506 and output to the display control circuit OSD105.
[0020]
Similarly, in the display ROM 104, the address A_n~ A_{n + 2}If there is erroneous display data continuously, A is stored in the address register 503 built in the ROM correction circuit 106 (500)._n~ A_{n + 2}And the correct display data corresponding to those addresses are set in the data register 501, and at the same time, the control register 502 is also set in an enabled state corresponding to each address, thereby switching the correct data by the selector circuit 506, It can be output to the display control circuit OSD105.
The display control circuit OSD 105 outputs RGB signals in accordance with the set values set by the CPU 101 and displays a correct image on the screen of the display device 110.
[0021]
Further, by setting the address value set in the address register 503 of the ROM correction circuit in FIG. 5 to a value exceeding the address area of the display ROM 104, the display data in the fictitious ROM area that does not exist and the data register As a result, display data can be added without affecting other circuits.
[0022]
FIG. 7 shows the contents described above. Original address A_ENDAll the display data has been stored so far._{END + n}After that, sequentially A_{END + n + 1}, A_{END + n + 2}, A_{END + n + 3}.. Is set in the address register 503, and display data for these addresses is set in the data register 501, so that completely new display data can be added.
[0023]
  Further, the value of the correction data set in the data register 501 of the ROM correction circuit in FIG. 5 is set with a certain regularity, and a certain series of display data is set.ConstantBy executing the correction, it is possible to easily realize strikethrough display and underline display.That is, an address area having a certain regularity is set in the address register 503 with respect to the address area in which the display data of the display ROM 104 is stored, and certain correction data is set to the data register for these addresses. When the address from the display control circuit 105 and the address set in the address register 503 coincide with each other, the fixed correction data for the address is output from the data register 501 so that the display data is displayed as the display data. When the data is transferred to the control circuit 105, the display control can be executed after the certain correction is performed on a series of the display data.
[0024]
  FIG. 8 shows the above-described contents. A series of display dataCanSame displaylineAddress A of the display data corresponding to_k, A_nOn the other hand, the same correction contents of the data register 501 incorporated in the ROM correction circuit are repeatedly executed.likeAs shown in the figure, for example, by replacing the lowermost part of the display data with data “FFFF”,As shown in 802Underline display can be realized.
[0025]
  As described above, in the first embodiment, since the ROM correction circuit is provided between the display ROM for storing display data and the display control circuit OSD for performing display control, incorrect data is recorded in the display ROM. If the data address is detected, the data address is detected and replaced with correct data, and then output to the display control circuit OSD. Therefore, a correct image can be obtained by the display device. Further, display data can be easily added by setting the address register of the ROM correction circuit to an area other than the address area of the display ROM. Furthermore, when display data is transferred from the display ROM to the display control circuit OSD, a similar correction operation is performed on a certain series of display data via the ROM correction circuit, thereby causing underline, strikethrough, etc. Display can be performed easily.
(Embodiment 2)
  Hereinafter, the present inventionAccording to the second embodimentDisplay control deviceLastThis will be described with reference to the drawings. In the second embodiment, the instruction ROM and the display ROM in the first embodiment are arranged on the same ROM.
[0026]
FIG. 3 is a block diagram showing the configuration of the display control apparatus according to Embodiment 2 of the present invention.
In FIG. 3, 302 is a read-only ROM for storing instruction codes and display data, 304 is a time when the CPU 301 reads instruction codes from the instruction / display ROM 302, and a time when the display control circuit OSD 305 reads display data from the instruction / display ROM 302. , A multiplexer for time-sharing the output addresses so as not to interfere with each other, and 307 is a command code output from the command / display ROM 302 corresponding to each address input in a time-sharing manner, and the display data is sent to the CPU 301. It is a separator that sorts into OSD305. Since other configurations are the same as those of the first embodiment, description thereof is omitted.
[0027]
Next, the operation of the display control apparatus according to the second embodiment having the above configuration will be described with reference to the drawings.
As shown in FIG. 3, an image is displayed on the display device 310 by R, G, and B outputs output by the display control device 300. The instruction / display ROM 302 stores a program in which instruction codes are described and display data at the same time.
[0028]
The CPU 301 sends the access address time-divided by the multiplexer 304 to the instruction / display ROM 302, reads the instruction code from the area where the program is written in the instruction / display ROM 302 corresponding to the address, and reads the ROM correction circuit 306. And through the separator 307, the arithmetic processing is executed according to the instruction code. At this time, particularly in display control, a display code for display on the display device 310 is written into the RAM 303, and at the same time, display settings such as display timing, display data color, shape and size are displayed in the display control circuit OSD305. Set to the built-in register.
[0029]
The display control circuit OSD 305 decodes the display code written in the RAM 303 and reads the display data from the instruction / display ROM 302 in the area where the display data is stored in the character / graphic data corresponding to the display code. put out. Therefore, the ROM access address output from the display control circuit OSD 305 is time-divided by the multiplexer 304 and then input to the display ROM 302 and the ROM correction circuit 306. Display data read according to the address is first output to the ROM correction circuit 306.
[0030]
The ROM address input to the ROM correction circuit 306 (500) is input to the address match determination circuit 504. The address match determination circuit 504 compares the address set in advance in the address register 503 with the input ROM address, and determines whether the address values match. When the value set in the address register 503 matches the input address and the set value in the control register 502 is enabled, the data in the built-in data register 501 and the instruction / display ROM 302 to the ROM correction circuit 306 are displayed. The display data input to (500) is switched by the selector circuit 506, and correct display data is output. Correct data output from the ROM correction circuit is distributed to the display control circuit OSD 305 by the separator 307. In other cases, the display data input from the instruction / display ROM 302 to the ROM correction circuit 306 (500) is distributed to the OSD 305 as it is.
[0031]
Specifically, as shown in FIG. 6, display data is sequentially output from the instruction / display ROM 302 in accordance with an address output from the display control circuit OSD 305. The address output from the display control circuit OSD305 is A._kThe address match determination circuit 504 built in the ROM correction circuit 306 (500) is set to the address value A set in the address register 503._kSince the setting of the control register 502 is enabled at this time, the correct display data set in the built-in data register 501 is displayed on the display output from the instruction / display ROM 302. The data is switched by the selector circuit 506 instead of the data and output to the display control circuit OSD305.
[0032]
Similarly, in the command / display ROM 302, the address A_n~ A_{n + 2}If there is erroneous display data continuously, A is stored in the address register 503 built in the ROM correction circuit 306 (500)._n~ A_{n + 2}And the correct display data corresponding to those addresses are set in the data register 501, and at the same time, the control register 502 is also set in the enabled state corresponding to each address, thereby switching the correct data by the selector circuit 506, It can be output to the display control circuit OSD105.
The display control circuit OSD 305 outputs RGB signals according to the setting values set by the CPU 301 and displays a correct image on the screen of the display device 310.
[0033]
The series of ROM correction functions can achieve the same effect by setting the same setting for each register of the ROM correction circuit 306 for the instruction code read by the CPU 301. In particular, the ROM correction method according to the second embodiment can cope with both the CPU 301 and the display control circuit OSD 305 with one ROM correction circuit, and can reduce the circuit scale.
[0034]
Also, the address value set in the address register 503 of the ROM correction circuit in FIG. 5 is set in an area other than the address area of the instruction / display ROM 304, or display data is set in the instruction ROM area, and instruction data is set in the display ROM area. By doing so, the instruction data or display data in the fictitious ROM area which does not exist originally is replaced with the correct data set in the data register 501, and as a result, the display data or instruction is not affected without affecting other circuits. Data can be added.
[0035]
Similarly to the first embodiment described above, the value of the correction data set in the data register 501 of the ROM correction circuit in FIG. 5 is set with a certain regularity, and the same for a series of display data. By executing the correction, it is possible to easily realize strikethrough display and underline display.
[0036]
As described above, in the second embodiment, the display correction data is stored in the same instruction / display ROM, and the ROM correction circuit is provided between the instruction / display ROM and the display control circuit OSD for display control. If the wrong data is recorded in the instruction / display ROM, the correct data is output to the display control circuit OSD after detecting the address of the data and replacing it with the correct data. Can be obtained. In addition, by setting the address register of the ROM correction circuit in an area other than the address area of the instruction / display ROM, or in the mutual data area, the instruction / display data can be easily added. When display data is transferred from the instruction / display ROM to the display control circuit OSD, a similar correction operation is performed on a certain series of display data via the ROM correction circuit, so that underline, strikethrough, etc. Display can be performed easily. Furthermore, since the CPU and the display control circuit OSD can share one ROM correction circuit, the circuit scale can be reduced.
[0037]
【The invention's effect】
  As described above, according to the display device of the first aspect of the present invention, in the display control device that reads predetermined display data from the storage device and displays an image on the display device, the command ROM storing the command program In order to display an image on a display device, a central processing unit (hereinafter referred to as a CPU) that decodes the instruction code and executes a calculation process, a rewritable RAM that stores a display code output from the CPU A read-only display ROM for storing the display data, and a display for reading and decoding the display code written in the RAM and simultaneously reading the display data from the display ROM and displaying an image on the display device according to the display code If incorrect display data is recorded in the control circuit and the display ROM, the address where the incorrect display data is stored is detected. To the display, the address register for display data Tsu said error sets the address stored from the CPU, to the address display data Tsu said error is storedControl circuitAn address coincidence detection circuit for detecting access from a data register, a data register for setting correct display data for correction from the CPU, data read from the display ROM and the data register A ROM correction circuit that replaces stored data, and when erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data. An area other than an address area in which display data of the display ROM is stored is set in an address register in the ROM correction circuit, and display data for these addresses is set in a data register in the ROM correction circuit. And the address from the display control circuit and the address register are set. Since the display data is added by outputting the display data corresponding to the address when the address matches the display address, the display device can be used even when erroneous display data is recorded in the display ROM. Thus, it is possible to obtain a correct display, and it is possible to increase the yield when manufacturing the display ROM.
  Further, by applying a ROM correction circuit to correct fictitious data outside the ROM area, there is an effect that new display data can be easily added without affecting other circuits.
[0039]
  According to the display control device of the second aspect of the present invention, in the display control device that reads predetermined display data from the storage device and displays an image on the display device, the instruction in the instruction ROM in which the instruction program is stored is stored. A central processing unit (hereinafter referred to as CPU) that decodes the code and executes arithmetic processing, a rewritable RAM that stores a display code output from the CPU, and a display for displaying an image on the display device A read-only display ROM for storing data, and a display control circuit for reading and decoding a display code written in the RAM and simultaneously reading display data from the display ROM and displaying an image on the display device according to the display code If the wrong display data is recorded in the display ROM, the address where the wrong display data is stored is detected. For the display, an address register for setting the address display data Tsu said error from the CPU are stored, to the address display data Tsu said error is storedControl circuitAn address coincidence detection circuit for detecting access from a data register, a data register for setting correct display data for correction from the CPU, data read from the display ROM and the data register A ROM correction circuit that replaces stored data, and when erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data. In the address area where the display data of the display ROM is stored, an address corresponding to a series of the display data is set in an address register in the ROM correction circuit, and A fixed correction data is set in a data register in the ROM correction circuit, and the display When the display data is transferred to the display control circuit OSD by outputting the fixed correction data for the address from the data register when the address from the control circuit matches the address set in the address register Since the display control is performed after the certain correction is performed on a certain series of the display data, even when erroneous display data is recorded in the display ROM, a correct display is performed on the display device. In addition, there is an effect that the yield at the time of manufacturing the display ROM can be increased.
  Further, by applying the same correction to a series of display data by applying the ROM correction circuit, there is an effect that simple processing of display data such as strikethrough and underline can be easily realized.
[0041]
  According to the display control device of the third aspect of the present invention, in the display control device that reads predetermined display data from the storage device and displays an image on the display device, the command in the command ROM storing the command program A central processing unit (hereinafter referred to as CPU) that decodes the code and executes arithmetic processing, a rewritable RAM that stores a display code output from the CPU, and a display for displaying an image on the display device A read-only display ROM for storing data, and a display control circuit for reading and decoding a display code written in the RAM and simultaneously reading display data from the display ROM and displaying an image on the display device according to the display code If the wrong display data is recorded in the display ROM, the address where the wrong display data is stored is detected. For the display, an address register for setting the address display data Tsu said error from the CPU are stored, to the address display data Tsu said error is storedControl circuitAn address coincidence detection circuit for detecting access from a data register, a data register for setting correct display data for correction from the CPU, data read from the display ROM and the data register A ROM correction circuit that replaces stored data, and when erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data. An instruction ROM for storing the instruction code and a display ROM for storing the display data are arranged on the same ROM, and the address area in which the instruction code and the display data of the ROM are stored Areas other than those are set in the address registers inside the ROM correction circuit, and the instruction code for these addresses is set. Instruction or display data is set in the data register in the ROM correction circuit, and an instruction for the address is matched when the address from the CPU or the address from the display control circuit matches the address set in the address register. Since the instruction code or the display data is added by outputting the code or the display data from the data register, even if erroneous display data is recorded in the display ROM, a correct display is obtained on the display device. In addition, there is an effect that the yield at the time of manufacturing the display ROM can be increased.
  Further, it is possible to execute correction simultaneously on each of the instruction ROM and the display ROM with one ROM correction circuit, and there is an effect that the circuit scale can be reduced.
  Further, by applying a ROM correction circuit to correct fictitious data outside the ROM area, it is possible to easily add completely new display or command data without affecting other circuits. .
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a display control apparatus according to Embodiment 1 of the present invention.
FIG. 2 is a block diagram showing a configuration of a conventional display control apparatus.
FIG. 3 is a block diagram showing a configuration of a display control apparatus according to Embodiment 2 of the present invention.
FIG. 4 is a diagram showing an example of an incorrect display in a conventional example.
5 is a block diagram showing an internal configuration of a ROM correction circuit in FIGS. 1 and 3. FIG.
FIG. 6 is an example of correct display in the present invention.
FIG. 7 is a display example using additional data according to the present invention.
FIG. 8 is a display example in which the same correction is performed on a series of display data in the present invention.
[Explanation of symbols]
100, 200, 300 Display control device
101, 201, 301 CPU
102, 202 Instruction ROM
103, 203, 303 RAM
104, 204 Display ROM
105, 205, 305 Display control circuit (OSD)
106, 306, 500 ROM correction circuit
110, 210, 310 Display device
302 Instruction / display ROM
304 Address multiplexer
307 Separator
400, 600, 800 Display data stored in the display ROM
401 Example of incorrect display
501 Data register
502 Control register
503 Address register
504 Address match determination circuit
505 ROM correction function ON / OFF circuit
506 Correction data switching circuit (selector)
601 Display example before correction
602 Display example after correction
700 Display data outside the display ROM address area
701 Display example with display data added
801 Display example before repeated correction
802 Underline display example by ROM correction circuit

Claims (3)

In a display control device that reads predetermined display data from a storage device and displays an image on the display device,
A central processing unit (hereinafter referred to as CPU) that decodes the instruction code of the instruction ROM in which the instruction program is stored, and executes arithmetic processing;
A rewritable RAM for storing a display code output from the CPU;
A read-only display ROM for storing display data for displaying an image on the display device;
A display control circuit that reads and decodes the display code written in the RAM and simultaneously reads display data from the display ROM and displays an image on the display device according to the display code;
In order to detect the address where the erroneous display data is stored when the erroneous display data is recorded in the display ROM, in order to set the address where the erroneous display data is stored from the CPU. Address register, an address coincidence detection circuit for detecting that the display control circuit is accessing the address where the erroneous display data is stored, and correct display data for correction to the CPU A data register for setting from the ROM, and a ROM correction circuit for switching the data read from the display ROM and the data stored in the data register,
When erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data.
An area other than the address area where display data of the display ROM is stored is set in an address register inside the ROM correction circuit, and display data for these addresses is set in a data register inside the ROM correction circuit, and The display data is added by outputting the display data for the address from the data register when the address from the display control circuit matches the address set in the address register.
A display control device characterized by that. In a display control device that reads predetermined display data from a storage device and displays an image on the display device,
A central processing unit (hereinafter referred to as CPU) that decodes the instruction code of the instruction ROM in which the instruction program is stored, and executes arithmetic processing;
A rewritable RAM for storing a display code output from the CPU;
A read-only display ROM for storing display data for displaying an image on the display device;
A display control circuit that reads and decodes the display code written in the RAM and simultaneously reads display data from the display ROM and displays an image on the display device according to the display code;
In order to detect the address where the erroneous display data is stored when the erroneous display data is recorded in the display ROM, in order to set the address where the erroneous display data is stored from the CPU. Address register, an address coincidence detection circuit for detecting that the display control circuit is accessing the address where the erroneous display data is stored, and correct display data for correction to the CPU A data register for setting from the ROM, and a ROM correction circuit for switching the data read from the display ROM and the data stored in the data register,
When erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data.
Of the address area in which display data of the display ROM is stored, an address corresponding to a series of the display data is set in an address register inside the ROM correction circuit, and certain corrections are made to these addresses. Data is set in the data register inside the ROM correction circuit, and when the address from the display control circuit matches the address set in the address register, the constant correction data for the address is output from the data register Thus, when the display data is transferred to the display control circuit, a certain series of the display data is subjected to the certain correction and then the display control is executed.
A display control device characterized by that. In a display control device that reads predetermined display data from a storage device and displays an image on the display device,
A central processing unit (hereinafter referred to as CPU) that decodes the instruction code of the instruction ROM in which the instruction program is stored, and executes arithmetic processing;
A rewritable RAM for storing a display code output from the CPU;
A read-only display ROM for storing display data for displaying an image on the display device;
A display control circuit that reads and decodes the display code written in the RAM and simultaneously reads display data from the display ROM and displays an image on the display device according to the display code;
In order to detect the address where the erroneous display data is stored when the erroneous display data is recorded in the display ROM, in order to set the address where the erroneous display data is stored from the CPU. Address register, an address coincidence detection circuit for detecting that the display control circuit is accessing the address where the erroneous display data is stored, and correct display data for correction to the CPU A data register for setting from the ROM, and a ROM correction circuit for switching the data read from the display ROM and the data stored in the data register,
When erroneous display data is read from the display ROM, the ROM correction circuit corrects the erroneous display data to the correct display data.
An instruction ROM for storing the instruction code and a display ROM for storing the display data are arranged on the same ROM,
An area other than the address area in which the ROM instruction code and display data are stored is set in the address register in the ROM correction circuit, and the instruction code or display data for these addresses is stored in the data register in the ROM correction circuit. And when the address from the CPU or the address from the display control circuit matches the address set in the address register, the instruction code or display data for the address is output from the data register, Add instruction code or display data,
A display control device characterized by that.

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