JP3944204B2 - Image processing apparatus and image display apparatus having the same - Google Patents

Description

  The present invention relates to an image processing device used in a digital image display device that receives a digital signal as a video signal and displays a digital image, and an image display device including the image processing device.

  Conventionally, a digital video signal input to a digital image display device is usually subjected to γ correction in order to approximate the display characteristics of a CRT (cathode ray tube) device.

  However, when the video signal subjected to the γ correction is directly input to the digital image display device, a pseudo contour is generated in the display image, which causes a problem that the display quality is deteriorated.

Therefore, for example, Japanese Patent Laid-Open No. 9-185707 discloses a signal processing technique using an error diffusion method, that is, a display having a linear luminance characteristic by randomly adding a delay time-controlled cumulative error signal to a video signal. A technique for reducing pseudo contours generated by γ correction by performing γ correction necessary for an apparatus or a spatial light modulator is disclosed.
Japanese Patent Laid-Open No. 9-185707

  However, in the error diffusion method disclosed in the above publication, the accumulated error signal to be added to the video signal is stored and fed back so as not to accumulate the error. For this reason, since it is necessary to separately provide a memory for storing the accumulated error signal and a circuit for feedback, there arises a problem that the apparatus becomes complicated and expensive.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide an image processing apparatus capable of reducing the pseudo contour generated in a display image with a simple circuit configuration and an image display including the image processing apparatus. The object is to provide the device at a low cost.

In the first invention of the present application, an n-bit (n is a natural number) digital signal representing a 2 ⁿ number of gradations input as a video signal is represented by an m bit (m> n) representing a 2 ^m number of gradations. : M is a natural number) first signal processing means for converting to a digital signal, and after adding a noise signal to the m-bit digital signal from the first signal processing means, lower (m-Q) bits (Q ≦ n: Q is a natural number) and a second signal processing means for outputting a Q-bit digital signal obtained by rounding down, and the noise signal is obtained by switching a plurality of noise patterns. It is a signal whose value is zero.

Second aspect of the present invention, the first signal processing means, a digital signal of the n-bit input, and includes a bit conversion means for converting the digital signal of the m bits based on a preset value It is characterized by being.

  A third invention of the present application is characterized in that the bit conversion means comprises a look-up table that is replaced with a preset output value corresponding to an input signal.

A fourth aspect of the present invention, the first signal processing means, a digital signal of the n bits input, in that it comprises bit conversion means for converting the digital signal of the m bits by a predetermined mathematical operation Features.

The fifth invention of the present application is characterized in that the value set in the bit conversion means is rewritten according to the display characteristics of the display means provided in the image display device provided with the image processing device .

According to a sixth aspect of the present invention, the value set in the bit conversion unit absorbs a variation in the performance of the driving unit that drives the display unit included in the image display device including the image processing device. It can be rewritten .

The seventh invention of the present application is characterized in that the value set in the bit conversion means is rewritten based on the ambient brightness of the display means provided in the image display device provided with the image processing device. To do.

The eighth invention of the present application is characterized in that the value set in the bit conversion means is rewritten based on the brightness of the entire display image of the display means provided in the image display device provided with the image processing device. And

The ninth invention of the present application is characterized in that a value set in the bit conversion means is rewritten based on an average level of an input signal input to an image display device including the image processing device .

According to a tenth aspect of the present invention, the noise signal is a noise signal having randomness with no regularity in an amplitude cycle .

The eleventh invention of the present application is characterized in that a noise memory for storing the noise signal stores the noise signal for one screen .

A twelfth invention of the present application is characterized in that a noise memory for storing the noise signal stores the noise signal in units of blocks smaller than one screen .

The thirteenth invention of the present application is characterized in that the noise signal is a signal obtained by using an arbitrary noise pattern table and switching a starting point of the noise pattern table for each block .

A fourteenth invention of the present application is characterized in that the frequency distribution of the amplitude of the noise signal is a Gaussian distribution centered on zero amplitude of the noise signal .

A fifteenth invention of the present application is an image display device including the image processing device .

According to a sixteenth aspect of the present invention, an n-bit (n is a natural number) digital signal representing a 2 ⁿ number of gradations inputted as a video signal is converted into an m bit (m> n) representing a 2 ^m number of gradations. : M is a natural number) converted into a digital signal, a noise signal is added to the converted m-bit digital signal, and lower (mQ) bits (Q ≦ n: Q is a natural number) are rounded down. outputs a digital signal of Q bit, the noise signal is obtained by switching a plurality of noise patterns, wherein the average value of the signal level is a signal which becomes zero.

  As described above, the image processing apparatus according to the present invention performs γ correction on the n-bit digital signal input as the video signal and converts it into an m-bit (m> n: m is a natural number) digital signal. A noise signal for reducing pseudo contour is added to the first signal processing circuit to be converted and the m-bit digital signal from the first signal processing circuit, and then the lower (mQ) bits (Q ≦ n: Q is a configuration including a second signal processing circuit that outputs a Q-bit digital signal obtained by rounding down a natural number) to the display means.

  Therefore, by inputting an n-bit digital signal to a display means having display characteristics of n bits or less, it is possible to obtain a high-quality display image with almost no pseudo contour. There is an effect.

  In the image display device of the present invention, a noise signal for reducing the pseudo contour is added to the input m-bit (m is a natural number) digital signal, and then the lower (mQ) bits (Q <m: Q is a configuration having a signal processing circuit for outputting a Q-bit digital signal obtained by rounding down a natural number).

  Therefore, the display characteristic equivalent to m bits can be expressed in a pseudo manner by a Q-bit digital signal, instead of simply thinning out the lower (mQ) bits.

  In addition, when the accumulated error signal is added to the digital signal by the conventional error diffusion method, it is not necessary to use a means such as a memory or a feedback circuit that is necessary for preventing the accumulation of errors, so that the apparatus can be simplified. An inexpensive image processing apparatus can be provided.

  An embodiment of the present invention will be described as follows. Note that in this embodiment, a liquid crystal display device is described as an image display device.

  As shown in FIG. 1, the liquid crystal display device according to the present embodiment includes a display unit 11 as display means for displaying an image corresponding to a video signal, and matches the video signal with the display characteristics of the display unit 11. And an image processing device 12 for processing.

The display unit 11, the display performance of the Q-bit (Q is a natural number), i.e. a LCD (liquid crystal display) 13 gradation number is 2 ^Q, a source driver 14 and a driving means for driving the LCD13 And a gate driver 15.

  The source driver 14 receives the video signal processed by the image processing device 12 and applies a voltage corresponding to the input signal to a source electrode line (not shown) of the LCD 13.

  On the other hand, the gate driver 15 receives a synchronization signal (horizontal synchronization signal H, vertical synchronization signal V) output from a synchronization signal generation circuit (not shown), and supplies a voltage corresponding to the input synchronization signal to the gate electrode. Applied to a line (not shown).

  The image processing device 12 γ-corrects an n-bit (n is a natural number) digital signal input as a video signal, and then converts the digital signal into an m-bit (m> n: m is a natural number) digital signal to be output. A first signal processing unit (first signal processing circuit) 16 provided with a conversion means, and an m-bit digital signal from the first signal processing unit 16, the lower (mQ) bits (m-Q) ( A second signal processing unit (second signal processing circuit) 17 that rounds down Q ≦ n: Q is a natural number and converts it into a Q-bit digital signal and outputs the digital signal.

  Therefore, the bit number Q of the digital signal input to the source driver 14 of the display unit 11 is the same as the input bit number n bits or smaller.

  As a result, pseudo contour due to bit dropping that occurs when the video signal is γ-corrected does not occur, so that the display quality of the display image in the liquid crystal display device having the above-described configuration can be greatly improved.

  In the following description, it is assumed that n = 8, m = 10, and Q = 8. That is, the LCD 13 will be described as a display device having a display performance of Q = 8 bits. In the image processing device 12, first, an n = 8 bit digital signal is first transmitted to the first signal processing unit 16 by m = 10. The number of bits is expanded to a digital signal of bits, and then the m = 10-bit digital signal is converted into a digital signal of Q = 8 bits by truncating the lower 2 bits (m−Q) in the second signal processing unit 17. It will be explained as a thing.

  Here, the image processing apparatus 12 will be described below.

  First, signal processing in the first signal processing unit 16 in the image processing apparatus 12 will be described below with reference to FIGS. It is assumed that the LCD 13 of the display unit 11 is composed of a normally white mode liquid crystal whose transmittance decreases as the voltage applied to the display electrode increases.

  As shown in FIG. 2A, the first signal processing unit 16 performs γ correction on the input 8-bit digital signal and finally converts it into a 10-bit digital signal. Lookup table) 18 is provided. That is, the LUT 18 converts the signal level (input value) of an 8-bit digital signal into the signal level (output value) of a corresponding 10-bit digital signal, as shown in FIG. 2 (b). It is.

  The setting of the output value of the LUT 18 will be described below with reference to FIGS.

  FIG. 3 is a graph showing the relationship between the signal level of the input 8-bit digital signal and the transmittance of the LCD 13. This represents a state of γ = 2.2 frequently used in a television system. FIG. 4 is a graph showing the display characteristics of the LCD 13, and is a graph showing the relationship between the voltage applied to the electrodes of the LCD 13 and the transmittance of the LCD 13. FIG. 5 is a graph showing the relationship between the signal level of the digital signal and the transmittance of the LCD 13 when the 8-bit digital signal shown in FIG. 2B is converted into a 10-bit digital signal. is there.

  The graph shown in FIG. 5 is made as follows. According to FIG. 4, the transmittance is 100% when the applied voltage is 1.00V, the signal level of the digital signal input at this time is 1023, and the transmittance is 0% when the applied voltage is 4.50V. The signal level of the digital signal is 0. Similarly, when the transmittance is 50%, the applied voltage is 2.50 V, and the signal level is 584 (determined by 1023- (2.50-1.00) / (4.50-1.00) × 1024), When the transmittance is 20%, the applied voltage is 3.20 V and the signal level is 379. Further, when the transmittance is 70%, the applied voltage is 2.20V and the signal level is 672, and when the transmittance is 90%, the applied voltage is 1.70V and the signal level is 818.

Here, the signal level indicates the number of gradations of the video signal, and in the case of 8 bits, since 2 ⁸ = 256 gradations, the scale on the horizontal axis of the graph of FIG. It has become. In the case of 10 bits, since 2 ¹⁰ = 1024 gradations, the scale on the horizontal axis of the graph of FIG.

  FIG. 2B connects the relationship between FIG. 5 and FIG. 3 thus obtained. For example, when the transmittance is 50%, the input level is 192 from FIG. 3, while the 10-bit value is 584 from FIG. That is, FIG. 2B is a graph for converting the input value 192 input into the output value 584. Similarly, in the graph, when the transmittance is 20%, the input value 128 is converted into the output value 379, when the transmittance is 70%, the input value 220 is converted into the output value 672, and when the transmittance is 90%, the input value 242 is converted into the output value 818. It is supposed to be.

  Such correspondence is obtained for all levels, and FIG. 2B is obtained.

  Using the LUT 18 whose output value has been determined as described above, a digital signal input in 8 bits is converted into a 10-bit digital signal. The relationship between the signal level of the 10-bit digital signal after this conversion and the transmittance of the LCD 13 is as shown in the graph of FIG.

  Next, signal processing in the second signal processing unit 17 in the image processing apparatus 12 will be described below.

  As shown in FIG. 6, the second signal processing unit 17 generates a noise signal to be added to the input digital signal, and adds the noise from the noise generation circuit 19 to the input digital signal. It comprises a BDE (Bit-Depth Extension) 22 comprised of an adder 20 and a bit number conversion circuit 21 for converting the number of bits of the digital signal to which the noise signal is added. The noise generation circuit 19 receives synchronization signals (horizontal synchronization signal H and vertical synchronization signal V) output from a synchronization signal generation circuit (not shown).

  That is, the second signal processing unit 17 adds a noise signal to the 10-bit digital signal from the first signal processing unit 16 and truncates the lower 2 bits to convert it into an 8-bit digital signal. It is like that.

  Here, in the second signal processing unit 17, a noise signal for reducing the pseudo contour is added to the digital signal, thereby preventing a sharp change in shading in adjacent pixels of the image to be displayed. Is done. The 10-bit digital signal to which the noise signal is added is a video signal with less pseudo contour generation.

  Then, the lower 2 bits of the 10-bit digital signal with little occurrence of pseudo contour are cut off to form an 8-bit digital signal, which is input to the display unit 11 having 8-bit display characteristics. The 8-bit digital signal input to the display unit 11 is a video signal in which the density of adjacent pixels of the image to be displayed is not shifted abruptly, that is, a video signal in which no pseudo contour is generated. .

  Therefore, by inputting this 8-bit digital signal to display means having 8-bit display characteristics, a high-quality display image in which almost no pseudo contour is generated can be obtained.

  The noise generating circuit 19 is a circuit that generates a noise signal for preventing a pseudo contour from being generated in the video signal.

  The average value of the signal level of the generated noise signal is set to be zero.

  Alternatively, noise can be generated even if a specific pattern table is used. For example, the noise generation circuit 19 includes a noise ROM 41 and an address counter 42 as shown in FIG. The address counter 42 receives a horizontal synchronization signal H, a vertical synchronization signal V, and a clock (not shown).

  The noise ROM 41 stores noise for one screen, while the address counter 42 increments the horizontal address for each horizontal pixel and the vertical address for each vertical line. Added to. As a result, noise for one screen is sequentially obtained from the noise ROM 41 for each pixel. This is added to the image signal by the addition circuit 20 shown in FIG.

  The noise ROM 41 may store noise in units of small blocks such as 16 × 16, 32 × 32, etc., instead of one screen. In this case, the address counter 42 is reset every 16 or 32, and is configured to repeatedly output the same noise data in units of blocks. Here, the horizontal synchronizing signal H and the vertical synchronizing signal V applied to the address counter 42 are used for this purpose. Further, since the noise data is a random signal as will be described later, the periodicity does not visually pose a problem even if the unit is a block such as 16 or 32. For this reason, by taking such a configuration, there is an advantage that the ROM capacity of the noise ROM 41 can be greatly reduced.

  Further, the address counter 42 can be configured as follows. That is, the head address is changed for each field of the screen (for each vertical synchronizing signal V) or for each block boundary.

  For example, when the noise is made into a 16 × 16 block configuration, the noise is read out to the address (15, 15) in order for each pixel in the first block, starting with the address (0, 0) of the noise ROM 41 first. In this block, the address (1, 1) of the noise ROM 41 is read to the address (15, 15) at the head, and further, the address (0, 0) (0, 15) is passed to the address (1, 0). In the next block, the address (2, 2) is read to the address (15, 15) in the next block, and then the addresses (0, 0) (0, 15) (1, 0) (1 , 15), the address (2, 1) is read out, and thereafter the same is read out.

  In this example, the start address is incremented one address at a time for each block boundary, that is, every time one block is read, but two or more addresses may be incremented, or the horizontal or vertical address may be incremented. Only one of them may be incremented.

  Alternatively, when the head address is changed in units of frames, the noise is read out to the address (15, 15) in order for each pixel, starting with the address (0, 0) of the noise ROM 41 in the first frame. Similarly, reading is performed in order from the address (0, 0), and then repeated sequentially in this frame, while in the next frame, the address (1, 1) of the noise ROM 41 is read to the address (15, 15) at the head, Further, it is configured to read out to the address (1, 0) through the address (0, 0) (0, 15), and thereafter, such a reading method is continued to the end in this frame. In the frame of, the address (2, 2) is read to the address (15, 15) at the head, and then the address (0, 0) ( , 15) via (1,0) (1, 15), so as to read up to the address (2,1), to continue this read way to the end.

  In this example, the start address is incremented by one address in both horizontal and vertical directions for each frame, but two or more addresses may be incremented, or only one of the horizontal and vertical addresses is incremented. May be.

  Here, a method for changing the read start address for each block in the frame and a method for changing the read start address for each frame have been shown, but such a combination is arbitrary. In this way, by sequentially changing the read start address, it is possible to make the block boundary that was originally unnoticeable more inconspicuous. This is because the noise block structure itself having a 16 × 16 block structure can be eliminated by performing such a reading method.

  In particular, the method of changing the start position for each frame has the following specific effects. In other words, a liquid crystal display device generally does not respond at a speed of one frame or less, and cannot completely follow noise that changes in units of one frame, and as a result, for each pixel, the average value of noise in the signal value Will be displayed. As a result, in this method, as will be described later, even when the signal is rounded to several bits, an error in the case of evenly rounding all the pixels can be generated. This means that all pixels can express all quantization level values.

  On the other hand, in the method in which the noise is not changed for each frame as described above, the gradation is expressed by the principle of the so-called area gradation method, and therefore, all quantization levels can be displayed by paying attention to each pixel. However, it can be said that all the gradations can be expressed on average with a certain size of the screen as a unit.

  Therefore, in the method of changing the noise for each frame, all gradations can be expressed in units of pixels, and when the method of changing the head address in units of blocks as described above is used in combination, the block can be obtained even with a small memory capacity. The feature is that the boundary is inconspicuous. Furthermore, as will be described later, by devising the nature of noise, it is possible to have characteristics suitable for liquid crystals.

  As a result, the average error is not accumulated in the digital signal to which the noise signal generated in the noise generation circuit 19 is added, and it is not necessary to provide a special circuit for preventing the error accumulation.

  In addition, in order to make the average value of the signal level of the generated noise signal zero, for example, an algorithm that generates random numbers using random number generation software and sets the average amplitude of the generated random number signals to zero Can be easily realized.

  The random number generation software is used to generate a random noise signal. It is desirable that this noise signal has a low amplitude autocorrelation between adjacent pixels and does not have an amplitude value having a frequency of zero in the distribution range. Further, the frequency distribution of the amplitude of the noise signal is desirably a Gaussian distribution centered on zero amplitude of the noise signal.

  That is, as shown in FIG. 8, the random noise signal has an amplitude of the noise level ΔV without deviating from the upper limit level and the lower limit level, and the average value of the level is within a predetermined range (for example, 1 field) is always zero. Further, as shown in FIG. 9, the frequency distribution of the noise level is considered to be the most natural when it is a Gaussian distribution.

  Here, if the autocorrelation between adjacent pixels of the noise signal is low, the noise signal to be added can be obtained with little regularity in the amplitude period and high randomness. This point is particularly effective when the present invention is used in a liquid crystal display device. That is, in a liquid crystal display device, in order to perform AC driving, dot inversion, line inversion, frame inversion driving, or the like is generally performed. However, this inversion cycle differs for each liquid crystal display device and is not unified.

  Due to such inversion driving, a killer pattern exists in the liquid crystal display device, and when the killer pattern needs to be displayed in rare cases, a large image quality degradation occurs. Therefore, any image cannot be displayed with satisfactory image quality. Further, since the inversion driving is performed based on an artificial regular cycle, the killer pattern is often an image having a regular cycle.

  Therefore, if there is a regularity in the period of the amplitude of the noise signal to be added, the rule and the inversion driving rule may rarely interfere with each other and cause a large image quality degradation. For example, even if there is no problem in one liquid crystal display device, it becomes a big problem in another liquid crystal display device, and it is often difficult to investigate the cause as well as to improve the image quality.

  On the other hand, when a noise signal having no regularity is used as an additional signal as in the present invention, the regularity of inversion driving does not cause interference and there is no fear of image quality deterioration. Further, no killer pattern is formed for any liquid crystal display device, and image quality is not deteriorated.

  Next, there is the following advantage because the average value of the amplitude of the noise signal is zero. In this circuit, a noise signal having a different value for each pixel is added in order to reduce the pseudo contour. Therefore, when the value is viewed for each pixel, it is necessary to change by the amount of the added noise signal. However, when viewed in a large area, the brightness of the screen changes and becomes a problem. In other words, when a noise signal is added, the brightness of the screen changes by the average value of the amplitude of the noise signal when viewed in a large area, so that the brightness does not change even if the noise signal is added. The average value of the noise signal needs to be zero. Therefore, by setting the average value of the amplitude of the noise signal to zero, it has only the effect of reducing the pseudo contour, and the adverse effect of changing the brightness of a large area can be prevented.

  In addition, there is no amplitude value whose frequency is zero in the distribution range of the noise signal, and the frequency distribution of the amplitude is a Gaussian distribution centered on zero, so that the video signal is rounded to how many bits Even if is performed, the pseudo contour can be made invisible evenly for all conditions. On the other hand, if an amplitude value having a frequency of 0 exists, the effect of the noise signal is lost when the value is rounded, and a pseudo contour may be generated.

  Further, when the frequency distribution of the amplitude of the noise signal is a Gaussian distribution, there is an advantage that the noise in the display image is least noticeable. Conversely, when the distribution is other than a Gaussian distribution, the noise itself is likely to be noticeable, and the image quality is degraded.

  In addition, when the accumulated error signal is added to the digital signal by the conventional error diffusion method, it is not necessary to use a means such as a memory or a feedback circuit that is necessary for preventing the accumulation of errors, so that the apparatus can be simplified. An inexpensive image processing apparatus can be provided.

  The 8-bit digital signal output from the second signal processing unit 17 is input to the source driver 14 of the display unit 11 shown in FIG. 1, converted into a predetermined voltage by the source driver 14, and the signal in the LCD 13. Applied to the line.

  In this way, since the 8-bit video signal is input to the display unit 11 having 8-bit display characteristics without dropping bits, it is possible to eliminate the pseudo contour caused by the dropped bits. Moreover, since the noise signal is added so as to reduce the pseudo contour on the way, the pseudo contour generated by the γ correction can also be reduced. As a result, an image with high display quality can be obtained.

  In the liquid crystal display device having the above configuration, when displaying a color image, the first signal processing unit 16 and the second signal processing unit 17 shown in FIG.

  For example, when a video signal having a signal level as shown in FIG. 10A is input to the first signal processing unit 16, the LUT 18 provided for each RGB color in the first signal processing unit 16 Signals corresponding to RGB as shown in FIGS. 10B to 10D are obtained. Here, as in the case described above, if the input signal is 8 bits, the LUT 18 may perform γ correction so that the output signal is 10 bits. The characteristics of each RGB are expected to be slightly different.

  Then, the γ-corrected RGB output signals are input to the corresponding second signal processing units 17, subjected to bit conversion processing, and output to the display unit 11 as 8-bit signals. .

  In the liquid crystal display device having the above-described configuration, the display quality of the liquid crystal display device can be adjusted on the image processing device 12 side. Therefore, the image processing device 12 may be configured separately from the display unit 11. In this case, even if there is an individual difference in the display unit 11, the display quality can be appropriately adjusted on the image processing apparatus 12, so that an image with a high display quality can be obtained using any display unit 11. be able to.

  Accordingly, when the liquid crystal display device having the above configuration is applied to a display device that performs display control using a video card, such as a personal computer, for example, the image processing device 12 provided in the liquid crystal display device is not the video card side. In order to achieve high image quality, it is possible to achieve high image quality without using an expensive video card and using a personal computer that has only an existing inexpensive video card.

  By the way, the LUT 18 included in the image processing apparatus 12 having the above-described configuration is set according to the display characteristics of the display unit 11 as described above, and a preset value may be used. As described below, it may be rewritable in real time.

  Here, a method of rewriting the value of the LUT 18 will be described below. A specific example of the method for rewriting the value of the LUT 18 is as follows.

  1. Rewrite according to LCD display characteristics (VT curve).

  2. Rewrite to absorb the variation of each IC (source).

  3. Rewrite bit allocation based on ambient brightness.

  4). The bit distribution is rewritten based on the average level of the input signal.

  5). Three RGB are prepared, and each color is adjusted and rewritten.

  An apparatus for realizing the above method is an image display apparatus shown in FIG. For convenience of explanation, the same members as those used in the above description will be given the same reference numerals and description thereof will be omitted.

  As shown in FIG. 11, the image display device includes a display unit 11 and an image processing device 32 having a LUT 18, a BDE 22, a control circuit 23, an area determination circuit 24, an average value calculation circuit 25, and a storage unit 26. Yes. The display unit 11 has the same configuration as that of the image display device shown in FIG.

  The region determination circuit 24 receives the same synchronization signal input to the source driver 14 and the gate driver 15 and determines the region to be displayed on the LCD 13. Then, the area determination circuit 24 outputs the determined area information to the control circuit 23.

  The average value calculation circuit 25 receives the same video signal input to the LUT 18 and calculates the average value of the brightness included in the video signal. Then, the average value calculation circuit 25 outputs the calculated value to the control circuit 23.

  Further, the image display device includes a brightness sensor 27 for detecting the brightness around the image display device, and a user adjustment circuit 28 for the user to change the value of the LUT 18, and each signal is controlled. The signal is input to the circuit 23.

  A signal can also be input from the personal computer 41 through the interface 40. In this case, there is an advantage that the user can give an instruction from the personal computer 41.

  As described above, the control circuit 23 in the image processing apparatus 32 receives signals from the region determination circuit 24, the average value calculation circuit 25, the brightness sensor 27, the user adjustment circuit 28, and the interface 40 described above. Based on the respective signals, the value of the LUT 18 is obtained independently. The obtained value is output to the storage unit 26 connected to the control circuit 23. Each input may be provided in whole or in part.

  The storage unit 26 includes a ROM and a RAM. Here, since new data cannot be written in the ROM, a value for correcting the VT curve of the LCD 13 according to the display characteristics of the display unit 11 is written in advance. Further, since the RAM can rewrite data, the RAM stores values from the control circuit 23.

  From the storage unit 26, the control circuit 23 outputs a value stored in order to rewrite the value of the LUT 18 as necessary, as the value of the LUT 18. As a result, the value of the LUT 18 is rewritten according to various conditions.

  In this way, by rewriting the value of the LUT 18 according to various conditions, the display image can always be kept in high quality.

  Here, a method of rewriting the value of the LUT 18 so as to absorb the variation for each IC will be described below with reference to FIGS.

  As shown in FIG. 12, the source driver 14 is composed of a plurality of source driving ICs 29, and the gate driver 15 is composed of a plurality of gate driving ICs 30.

  The source driving IC 29 is connected to a predetermined number of source signal lines (not shown) of the LCD 13, and the gate driving IC 30 is connected to a predetermined number of gate signal lines (not shown) of the LCD 13. Has been. For example, when the resolution of the LCD 13 is 800 × 600, if there are eight source drive ICs 29 and six gate drive ICs 30, there are 100 source signal lines connected to one source drive IC 29. The number of gate signal lines connected to one gate driving IC 30 is 100.

  In addition, a synchronization signal is input to the source driving IC 29 and the gate driving IC 30. As a result, a region surrounded by the source driving ICs 29 and the gate driving ICs 30, that is, a region 13a surrounded by 100 × 100 signal lines is detected by the synchronization signal.

  Each of these areas is an area driven by a specific driving IC, and there is a problem that, for example, a luminance difference is perceived for each area when the characteristics of the driving IC vary. Such a luminance difference for each block is equivalent to a pseudo contour which is a problem in the present invention. However, since the method of the present invention is effective in suppressing such pseudo contours, the combined use of the present invention can also reduce variations in screen display characteristics originally caused by variations in characteristics of drive ICs. Further, by configuring in advance to detect the characteristic variation of each area 13a of the LCD 13, it becomes possible to completely suppress the difference in characteristics for each area.

  In the region 13a detected using the synchronization signal as described above, the display characteristics are determined in advance by the shipping inspection device, and the variation in the performance of the driving ICs (source driving IC 29, gate driving IC 30) is detected. The variation of the driving IC is stored in the storage unit 26. Then, the value of the LUT 18 is rewritten so as to absorb the variation of the driving IC. As a result, it is possible to absorb variations in display characteristics for each display area that occur in the display unit 11, and therefore, it is also possible to absorb variations in display characteristics for each display unit 11, and differences between individuals in the image display device. Can be eliminated.

  Specifically, a value corresponding to the characteristics of the source drive IC 29 corresponding to the area of the display unit 11 determined by the area determination circuit 24 described above is written in the LUT 18. At this time, since the video signal is input to the source driving IC 29 in time series, the value of the LUT 18 is sequentially rewritten in time series. Accordingly, the display quality of the display image on the display unit 11 can be improved by sequentially rewriting the value of the LUT 18.

  The number of the LUTs 18 provided is the same as the number of the source driving ICs 29, so that values corresponding to the characteristics of the respective source driving ICs 29 can be written in advance. In this case, the LUT 18 itself can be included in the source driving IC 29.

  In the image display device, the appearance of the display image differs depending on the surrounding environment where the image is displayed. In such a case, for example, if the surroundings of a room or the like in which the image display device is arranged are bright, the gradation of the bright part of the image displayed on the display unit 11 is increased, and if the surroundings are dark, the display unit 11 is displayed. The value of the LUT 18 is rewritten so as to increase the gradation of the dark part of the displayed image. That is, the value of the LUT 18 may be rewritten so that the bit distribution of the display image is rewritten based on the brightness around the image display device.

  Specifically, the brightness sensor 27 is used to detect the brightness around the image display device, and the control circuit 23 sets an appropriate value based on this detection signal, and the storage unit The value of the LUT 18 may be rewritten via the H.26.

  As described above, by rewriting the value of the LUT 18 according to the brightness of the surroundings where the image display device is arranged, the image displayed on the display unit 11 can always be easily seen.

  Even in the case of a dark image or a bright image as a whole regardless of the periphery of the image display device, the display image is difficult to see. Therefore, an average value of the signal level of the input video signal may be obtained, and the value of the LUT 18 may be rewritten so that the bit distribution of the display image is rewritten to this value.

  Specifically, an average value of the signal level of the video signal is obtained in the average value calculation circuit 25. Then, an appropriate value may be set by the control circuit 23 based on the average value, and the value of the LUT 18 may be rewritten via the storage unit 26. That is, the value of the LUT 18 may be rewritten so that the bit distribution is rewritten based on the average value of the signal level of the video signal that is the input signal.

  When considering colorization of the display image as described above, three LUTs 18 whose values are rewritten in real time according to the various conditions as described above are prepared, and rewritten by adjusting each color. do it.

  In this embodiment, an example in which an 8-bit digital signal is expanded to 10 bits and converted back to 8 bits is shown. However, the present invention is not limited to this. For example, the display has a display characteristic of 10 bits. The present invention can also be applied to a case where a 10-bit signal is displayed or a case where a 4-bit signal is displayed on a display having a 4-bit display characteristic used in a game machine, a cellular phone, or the like.

  As described in detail above, the image processing apparatus according to the embodiment of the present invention displays n bits (n is a natural number) for displaying an image corresponding to a digital signal as a video signal is input. First used in an image display device having a display means having characteristics, and converts an n-bit digital signal input as the video signal into an m-bit digital signal (m> n: m is a natural number). After adding a noise signal for reducing the pseudo contour to the m-bit digital signal from the signal processing circuit and the first signal processing circuit, lower (mQ) bits (Q ≦ n: Q is a natural number) And a second signal processing circuit for outputting a Q-bit digital signal obtained by truncating to the display means.

  According to the above configuration, the input n-bit digital signal is first subjected to γ correction and expanded to an m-bit digital signal, and then the m-bit digital signal is used to reduce the pseudo contour. The noise signal is added, and the lower (mQ) bits are rounded down to be converted into a Q-bit digital signal, and then the n-bit digital signal is input to display means having Q-bit display characteristics.

  As a result, a digital signal with no bits dropped is input to the display means. That is, an 8-bit digital signal is input to the display means having 8-bit display characteristics.

  In addition, a noise signal for reducing the pseudo contour is added to the m-bit digital signal, thereby preventing a rapid change in shading in adjacent pixels of the image to be displayed. Here, the m-bit digital signal is a video signal with less pseudo contour generation.

  Then, the lower (mQ) bits of the m-bit digital signal with less occurrence of pseudo contour are discarded and converted into a Q-bit digital signal having the same display characteristics as the display means. This Q-bit digital signal is a video signal in which the density of adjacent pixels of an image to be displayed is not rapidly shifted, that is, a video signal in which no pseudo contour is generated.

  Therefore, by inputting this Q-bit digital signal to display means having Q-bit display characteristics, a high-quality display image with almost no pseudo contour can be obtained.

  In addition, the image display apparatus according to the embodiment of the present invention adds a noise signal for reducing the pseudo contour to an input m-bit (m is a natural number) digital signal, and then adds a lower (mQ) bit ( A signal processing circuit that outputs a Q-bit digital signal obtained by rounding down Q <m: Q is a natural number).

  According to the above configuration, after adding a noise signal to an m-bit digital signal, the lower (mQ) bits are truncated, so that the lower (mQ) bits are not simply thinned out. Display characteristics equivalent to m bits can be expressed in a pseudo manner by digital signals.

  The average value of the signal level of the noise signal added to the m-bit digital signal may be set to be zero. Even if the noise signal set in this way is randomly added to the digital signal, the signal error due to the addition of the noise signal is not accumulated.

  As a result, when the accumulated error signal is added to the digital signal by the conventional error diffusion method, it is not necessary to use a memory, a feedback circuit, or the like, which was necessary to prevent the accumulation of errors, thereby simplifying the apparatus. And an inexpensive image processing apparatus can be provided.

  The noise signal may be a random noise signal having no regularity in the period of amplitude.

  In this case, since there is no regularity in the period of the amplitude of the noise signal, there is no interference with the regularity of inversion driving when a liquid crystal display device is used as the image display device. There is no worry about it occurring.

  The noise signal may be a noise signal obtained by using an arbitrary noise pattern table and switching the start point of the noise pattern table for each field or for each noise pattern table.

  In this case, when the start point of the noise pattern table is switched for each field, the noise level is uniformly rounded for all the pixels, so that all the pixels can express the values of all the quantization levels.

  Further, when the start point of the noise pattern table is switched for each noise pattern table, level averaging can be performed in units of the noise pattern table.

  The frequency distribution of the amplitude of the noise signal may be a Gaussian distribution centering on zero amplitude of the noise signal.

  In this case, since the frequency distribution of the amplitude of the noise signal is a Gaussian distribution, the noise is least noticeable, and as a result, the image quality of the display image is not deteriorated.

  The first signal processing circuit may include bit conversion means for converting an input n-bit digital signal into an m-bit digital signal based on a preset value.

  In this case, if the value set in the bit conversion means is set in consideration of various conditions such as the display characteristics of the display means and the surrounding environment in the image display device, the display quality of the display image can be further improved. it can.

  For example, it is conceivable that the value set in the bit conversion means can be rewritten so as to absorb variations in the performance of the driving means for driving the display means.

  In this case, it becomes possible to absorb the variation in the display performance that occurs for each display means, so it is not necessary to strictly consider the difference in display performance between the individual display means. As a result, the yield of the entire image display device can be improved, so that the cost for manufacturing the image display device can be significantly reduced.

  The value set in the bit conversion means can be rewritten based on the brightness around the image display device.

  In this case, when the periphery of the image display device is dark, the set value is rewritten so as to increase the number of gradations of the dark portion of the display image. On the other hand, when the periphery of the image display device is bright, the display image is bright. If the set value is rewritten so as to increase the number of gradations of the portion, it is possible to always display a high-quality image regardless of the brightness around the image display device.

  Further, it is conceivable that the value set in the bit conversion means is rewritten based on display characteristics in an image displayed on the display means.

  In this case, when the entire display image is dark, the set value is rewritten so as to increase the number of gradations in the dark part of the display image. When the entire display image is bright, the gradation number of the bright part of the display image is changed. If the set value is rewritten so as to increase, a high-quality image can always be displayed regardless of the brightness of the image displayed on the image display device.

  The bit conversion means may comprise a look-up table that replaces an input signal with a corresponding preset output value.

  In this case, since the output value corresponding to the input value is preset in the lookup table, the processing in the bit conversion means can be performed quickly. Moreover, since the structure of the bit conversion means can be simplified, the configuration of the entire image processing apparatus can also be simplified.

  The bit conversion means may be composed of an arithmetic element that converts an n-bit digital signal into an m (m> n) -bit digital signal by numerical calculation.

  In this case, a CPU (Central Processing Unit) or a DSP (Digital Signal Processor) can be considered as the arithmetic element.

  Since these CPUs, DSPs, and the like are programmable elements, there is an advantage that the user interface associated with the rewriting of the set value in the bit conversion means is simplified and easy to operate.

  Further, when a color image is displayed on the image display device, the first signal processing circuit and the second signal processing circuit may be provided for each color of RGB.

  Further, the image display device having the above-described configuration may be provided in the image display device. In this case, since the signal input to the display unit in the image display apparatus is processed on the image processing apparatus side, an expensive apparatus for improving display quality is not required on the display unit side. Thus, since a conventional image display device can be used, a high-quality image display device can be provided at low cost.

  As described above, the image processing apparatus according to the embodiment of the present invention has n bits (n is a natural number) for displaying an image corresponding to the digital signal when the digital signal is input as the video signal. The n-bit digital signal input as the video signal is converted into an m-bit (m> n: m is a natural number) digital signal used in an image display device having display means having display characteristics. After adding a noise signal for reducing the pseudo contour to one signal processing circuit and the m-bit digital signal from the first signal processing circuit, lower (mQ) bits (Q ≦ n: Q is a natural number) ), And a second signal processing circuit for outputting a Q-bit digital signal obtained to the display means.

  Therefore, by inputting an n-bit digital signal to a display means having display characteristics of n bits or less, it is possible to obtain a high-quality display image with almost no pseudo contour. There is an effect.

  In addition, the image display apparatus according to the embodiment of the present invention adds a noise signal for reducing the pseudo contour to an input m-bit (m is a natural number) digital signal, and then adds a lower (mQ) bit ( Q <m: Q is a natural number), and a signal processing circuit that outputs a Q-bit digital signal obtained by truncating (Q is a natural number).

  Therefore, the display characteristic equivalent to m bits can be expressed in a pseudo manner by a Q-bit digital signal, instead of simply thinning out the lower (mQ) bits.

  Further, noise is created so that the average value of the signal level of the noise signal added to the m-bit digital signal is zero.

  Even if the noise signal thus created is randomly added to the digital signal, the signal error due to the addition of the noise signal is not accumulated.

  As a result, when the accumulated error signal is added to the digital signal by the conventional error diffusion method, it is not necessary to use a memory, a feedback circuit, or the like, which was necessary to prevent the accumulation of errors, thereby simplifying the apparatus. And an inexpensive image processing apparatus can be provided. In addition, it is possible to include the entire circuit in the source driving IC, which provides a great economic effect.

  The noise signal may be a random noise signal having no regularity in the period of amplitude.

  In this case, since the period of the amplitude of the noise signal is not regular, there is no interference with the regularity of inversion driving when a liquid crystal display device is used as the image display device. As a result, the display quality of the display image is improved. There is an effect that it can be improved.

  The noise signal may be a noise signal obtained by using an arbitrary noise pattern table and switching the start point of the noise pattern table for each field or for each noise pattern table.

  In this case, when the start point of the noise pattern table is switched for each field, the noise level is uniformly rounded for all the pixels, so that all the pixels can express the values of all the quantization levels. Play.

  Further, when the start point of the noise pattern table is switched for each noise pattern table, there is an effect that level averaging can be performed in units of the noise pattern table.

  That is, in a liquid crystal display device, in order to perform AC driving, dot inversion, line inversion, frame inversion driving, or the like is generally performed. However, the inversion cycle differs for each liquid crystal display device and is not unified. Because of such inversion driving, if there is regularity in the period of the amplitude of the noise signal, a killer pattern will exist in the liquid crystal display device. Is produced. However, as described above, if there is no regularity in the period of the amplitude of the noise signal, there is no killer pattern at all, and image quality degradation does not occur.

  The frequency distribution of the amplitude of the noise signal may be a Gaussian distribution centering on zero amplitude of the noise signal.

  In this case, since the frequency distribution of the amplitude of the noise signal is a Gaussian distribution, noise becomes the least noticeable, and as a result, the display quality of the display image can be improved.

  The first signal processing circuit may include bit conversion means for converting an input n-bit digital signal into an m-bit digital signal based on a preset value.

  In this case, if the value set in the bit conversion means is set in consideration of various conditions such as the display characteristics of the display means and the surrounding environment in the image display device, the display quality of the display image can be further improved. There is an effect that can be done.

  For example, it is conceivable that the value set in the bit conversion means can be rewritten so as to absorb variations in the performance of the driving means for driving the display means.

  In this case, it becomes possible to absorb the variation in the display performance that occurs for each display means, so it is not necessary to strictly consider the difference in display performance between the individual display means. As a result, the yield of the entire image display device can be improved, and the cost for manufacturing the image display device can be greatly reduced.

  The value set in the bit conversion means can be rewritten based on the brightness around the image display device.

  In this case, when the periphery of the image display device is dark, the set value is rewritten so as to increase the number of gradations of the dark portion of the display image. On the other hand, when the periphery of the image display device is bright, the display image is bright. If the set value is rewritten so as to increase the number of gradations of the portion, it is possible to always display a high-quality image regardless of the brightness around the image display device.

  Further, it is conceivable that the value set in the bit conversion means is rewritten based on display characteristics in an image displayed on the display means.

  In this case, when the entire display image is dark, the set value is rewritten so as to increase the number of gradations in the dark part of the display image. When the entire display image is bright, the gradation number of the bright part of the display image is changed. If the set value is rewritten so as to increase, it is possible to always display a high-quality image regardless of the brightness of the image displayed on the image display device.

  The bit conversion means may comprise a look-up table that replaces an input signal with a corresponding preset output value.

  In this case, since the output value corresponding to the input value is preset in the lookup table, the processing in the bit conversion means can be performed quickly. In addition, since the structure of the bit conversion means can be simplified, there is an effect that the configuration of the entire image processing apparatus can be simplified.

  The bit conversion means may be composed of an arithmetic element that converts an n-bit digital signal into an m (m> n) -bit digital signal by numerical calculation.

  In this case, a CPU (Central Processing Unit) or a DSP (Digital Signal Processor) can be considered as the arithmetic element.

  Since these CPUs, DSPs, and the like are programmable elements, there is an advantage that the user interface associated with the rewriting of the set value in the bit conversion means is simplified and easy to operate.

  When a color image is displayed on the image display device, the first signal processing circuit and the second signal processing circuit may be provided for each of RGB colors.

  Further, the image display device having the above-described configuration may be provided in the image display device.

  In this case, since the signal input to the display unit in the image display apparatus is processed on the image processing apparatus side, an expensive apparatus for improving display quality is not required on the display unit side. Thereby, there is an effect that an inexpensive and high-quality image display device can be provided.

1 is a schematic configuration diagram of an image display device including an image processing device of the present invention. 1 shows a first signal processing unit provided in the image processing apparatus shown in FIG. 1, (a) is a schematic configuration diagram of the first signal processing unit, and (b) is an input value in the first signal processing unit shown in (a). It is a graph which shows the relationship between output value. It is a graph which shows the relationship between the signal level of the input signal in the 1st signal processing part shown in FIG. 2, and the transmittance | permeability. 2 is a graph showing display characteristics of an LCD of a display unit provided in the image display device shown in FIG. 1. It is a graph which shows the relationship between the signal level of the output signal in the 1st signal processing part shown in FIG. 2, and the transmittance | permeability. It is a schematic block diagram of the 2nd signal processing part with which the image processing apparatus shown in FIG. 1 was equipped. It is a schematic block diagram of the noise generation circuit with which the 2nd signal processing part shown in FIG. 6 was equipped. It is a figure which shows a random noise signal. FIG. 9 is a distribution diagram showing a frequency distribution of the level of the noise signal shown in FIG. 8. 1 shows the relationship between the input signal and the output signal in the first signal processing unit shown in FIG. 1 when colorized, (a) is a graph showing the relationship between the signal level of the input signal and the transmittance of the LCD, (b) Is a graph showing the relationship between the signal level of the R (red) signal of the output signal and the transmittance of the LCD, and (c) is the relationship between the signal level of the G (green) signal of the output signal and the transmittance of the LCD. (D) is a graph which shows the relationship between the signal level of B (blue) signal among output signals, and the transmittance | permeability of LCD. It is a schematic block diagram of the image display apparatus which showed the connection state of each circuit for rewriting the value of LUT in the image processing apparatus of this invention. FIG. 12 is an explanatory diagram illustrating a state in which a video signal and a synchronization signal are input to a driving IC used in a display unit in the image display device illustrated in FIG. 11.

Explanation of symbols

11 Display section (display means)
12 Image processing device 13 LCD
14 Source driver 15 Gate driver 16 First signal processing unit (first signal processing circuit)
17 Second signal processing unit (second signal processing circuit)
18 LUT (bit conversion means)
19 Noise generation circuit 20 Adder 21 Bit number conversion circuit 22 BDE
24 Area determination circuit 25 Average value calculation circuit 27 Brightness sensor 29 Source drive IC
30 Gate drive IC

Claims (16)

An n-bit (n is a natural number) digital signal that represents the number of 2 ⁿ gradations input as a video signal, and an m-bit (m> n: m is a natural number) digital signal that represents a 2 ^m gradation number First signal processing means for converting to
A Q-bit digital signal obtained by adding a noise signal to the m-bit digital signal from the first signal processing means and then truncating the lower (m-Q) bits (Q ≦ n: Q is a natural number) Second signal processing means for outputting,
The noise signal, an image processing apparatus characterized by obtained by switching a plurality of noise patterns, the average value of the signal level is a signal which becomes zero. The first signal processing means includes bit conversion means for converting the inputted n-bit digital signal into the m-bit digital signal based on a preset value. The image processing apparatus according to 1. The image processing apparatus according to claim 2, wherein the bit conversion unit includes a lookup table that is replaced with a preset output value corresponding to an input signal. The said 1st signal processing means is provided with the bit conversion means which converts the said n bit digital signal input into the said m bit digital signal by predetermined | prescribed numerical calculation. Image processing apparatus. The image processing apparatus according to any one of claims 2 to 4,
The value set in the bit conversion means is rewritten according to the display characteristics of the display means provided in the image display apparatus provided with the image processing apparatus. The image processing apparatus according to any one of claims 2 to 4,
The value set in the bit conversion means is rewritten so as to absorb the variation in the performance of the drive means for driving the display means provided in the image display device provided with the image processing device. Processing equipment. The image processing apparatus according to any one of claims 2 to 4,
The value set in the bit conversion means is rewritten based on the brightness around the display means provided in the image display apparatus provided with the image processing apparatus. The image processing apparatus according to any one of claims 2 to 4,
The value set in the bit conversion means is rewritten based on the brightness of the entire display image of the display means provided in the image display apparatus provided with the image processing apparatus. The image processing apparatus according to any one of claims 2 to 4,
The value set in the bit conversion means is rewritten based on an average level of an input signal inputted to an image display device provided with the image processing device. The image processing apparatus according to claim 1, wherein the noise signal is a noise signal having randomness with no regularity in an amplitude period. 11. The image processing apparatus according to claim 1, wherein the noise memory for storing the noise signal stores the noise signal for one screen. 11. The image processing apparatus according to claim 1, wherein the noise memory for storing the noise signal stores the noise signal in units of blocks smaller than one screen. The image processing apparatus according to claim 12, wherein the noise signal is a signal obtained by using an arbitrary noise pattern table and switching a start point of the noise pattern table for each block. The image processing apparatus according to claim 1, wherein the frequency distribution of the amplitude of the noise signal is a Gaussian distribution centered on zero amplitude of the noise signal. An image display apparatus comprising the image processing apparatus according to claim 1. An n-bit (n is a natural number) digital signal that represents the number of 2 ⁿ gradations input as a video signal, and an m-bit (m> n: m is a natural number) digital signal that represents a 2 ^m gradation number Converted to
After adding a noise signal to the converted m-bit digital signal, a Q-bit digital signal obtained by truncating the lower (mQ) bits (Q ≦ n: Q is a natural number) is output,
The noise signal, an image processing method, characterized in that is obtained by switching the plurality of noise patterns, the average value of the signal level is a signal which becomes zero.

Images