JP3933151B2 - Printed wiring board, semiconductor device, and manufacturing method thereof - Google Patents

Description

  The present invention relates to a printed wiring board, a semiconductor device, and a manufacturing method thereof, and more particularly to a printed wiring board, a semiconductor device, and a manufacturing method thereof having high reliability when a semiconductor element is flip-chip mounted on the printed wiring board. .

  In a conventional printed wiring board (semiconductor device package), one side of a multilayer substrate body in which conductor wiring is formed in multiple layers via an insulating resin layer is a semiconductor connected to an electrode terminal of a mounted semiconductor element The semiconductor element mounting surface on which element pads are formed, and the other surface side of the multilayer substrate body is an external connection terminal mounting surface on which external connection terminal pads are formed. In such a package for a semiconductor device, the external connection terminal mounting surface has an insulating metal whose entire surface including an inner wall surface of a through hole formed so as to correspond to each of the external connection terminal pads is subjected to an insulation treatment. A plate is bonded, a metal frame is bonded to the semiconductor element mounting surface, and a semiconductor element pad has a bump-like shape with a tip portion protruding from the semiconductor element mounting surface of the multilayer substrate body ( Patent Document 1). According to such a configuration, the mounting surface on which the semiconductor element is mounted can be as flat as possible and the thickness can be as thin as possible, warping due to a difference in thermal expansion between the constituent members can be prevented, and the end surface The electrode terminal of the semiconductor element formed on the flat surface can be directly bonded to the corresponding pad for semiconductor element.

JP 2003-142617 A

  However, in the conventional printed wiring board, the height of a plurality of semiconductor element pads protruding from the semiconductor element mounting surface may be uneven, and the heat from the semiconductor element causes heat conduction between the semiconductor element pads and the conductor wiring. As a result, stress is applied to the pad for a semiconductor element and a crack may occur.

  Further, as the spacing between the semiconductor element pads on the printed wiring board becomes fine pitch (less than 200 μm), short-circuiting between the respective semiconductor element pads is likely to occur, and bumps (solder balls) are formed on the respective semiconductor element pads. (Screen printing, inkjet printing, etc.) has become difficult.

  In addition, in order to prevent warping of the printed wiring board, if a metal frame (metal plate) joined to the printed wiring board is left as it is as a reinforcing plate (stiffener), the portion where the semiconductor element is accommodated is recessed. Thus, it is difficult to form bumps (screen printing, ink jet printing, etc.) at an accurate position within the region of the concave portion.

  Further, in the conventional printed wiring board, the solder serving as the semiconductor element pad and the copper plating serving as the conductor wiring are directly joined. When there is a difference in coefficient of thermal expansion between the semiconductor element and the printed wiring board, stress is generated by heat from the semiconductor element or the like. Since the semiconductor element and the semiconductor element pad are bonded, the stress is concentrated on the bonded portion between the semiconductor element pad and the conductor wiring. Therefore, cracks are likely to occur in the printed wiring board, reducing the reliability of the semiconductor device.

  A first object of the present invention is to provide a printed wiring board, a semiconductor device, and a manufacturing method thereof having high reliability when a semiconductor element is flip-chip mounted on a printed wiring board.

  A second object of the present invention is to provide a printed wiring board, a semiconductor device, and a manufacturing method thereof, in which bumps are formed at accurate positions of the pads for semiconductor elements.

  A third object of the present invention is to provide a printed wiring board, a semiconductor device, and a semiconductor device having good adhesion between the semiconductor element pad and the conductor wiring and having high reliability when the semiconductor element is flip-chip mounted on the printed wiring board. It is to provide a manufacturing method.

In a first aspect of the present invention, in a printed wiring board, a plurality of wiring layers and insulating layers are alternately stacked, and a multilayer wiring layer in which the wiring layers are via-connected, and a first of the multilayer wiring layers And a plurality of first conductive pads formed in a columnar shape protruding from the first surface and a plurality of second conductive pads formed on the second surface opposite to the first surface. A second conductive pad, and the first conductive pad has a diameter in the middle portion of the column smaller than the diameter of the surface on the multilayer wiring layer side when viewed from the cross-sectional direction, and on the top side. The diameter of the middle part of the column is smaller than the diameter of the surface, the first conductive pad is made of nickel, and the first conductive pad and the wiring layer connected to the first conductive pad Between the first conductive pad and the wiring layer than the case where the first conductive pad and the wiring layer are directly bonded to each other. Conductive layer to enhance the sexual characterized in that the interposed.

In a second aspect of the present invention, in a printed wiring board, a metal plate having an opening for mounting a semiconductor element, and a plurality of wiring layers and insulating layers are alternately stacked on the metal plate. A multilayer wiring layer that is laminated and via-connected between the wiring layers, and is formed in an opening of the metal plate on a first surface of the multilayer wiring layer on which the metal plate is disposed, and the first A plurality of first conductive pads formed in a column shape protruding from the surface of the first conductive pad; and a plurality of second conductive pads formed on a second surface opposite to the first surface; The height from the boundary surface between the metal plate and the multilayer wiring layer to the top of the first conductive pad is configured to be the same as the thickness of the metal plate.

  In the printed wiring board of the present invention, the first conductive pad has a diameter of the middle portion of the column smaller than the diameter of the surface on the multilayer wiring layer side when viewed from the cross-sectional direction, and on the top side. It is preferable that the diameter of the middle part of the column is smaller than the diameter of the surface.

  In the printed wiring board of the present invention, it is preferable that the first conductive pad is made of nickel.

  In the printed wiring board of the present invention, it is preferable that the first conductive pad is made of a conductive paste.

  In the printed wiring board of the present invention, between the first conductive pad and a wiring layer connected to the first conductive pad, the first conductive pad and the wiring layer It is preferable to interpose a conductive layer that enhances the adhesiveness than when directly bonding.

  In the printed wiring board of the present invention, the opening formed in the insulating layer in contact with the metal plate in the multilayer wiring layer so as to communicate with the first conductive pad is formed by the first conductive pad. It is preferably formed within the range of the arranged region.

  In the printed wiring board of the present invention, it is preferable that a top portion of the first conductive pad is flat.

  According to a third aspect of the present invention, a semiconductor device includes the printed wiring board and a semiconductor element connected to the first conductive pad.

  In a fourth aspect of the present invention, in the method for manufacturing a printed wiring board, a first etching resist having a first opening is formed on the first surface of the metal plate and is opposite to the first surface. Forming a second etching resist having a second opening corresponding to the first opening on the side surface, and the metal plate exposed from the first opening and the second opening Etching a portion to form a through hole having a diameter of an intermediate portion smaller than the diameter of the plate surface portion of the metal plate, and forming a conductive pad at least in the through hole. Features.

  According to a fifth aspect of the present invention, in the method for manufacturing a printed wiring board, a step of forming a through hole at a predetermined position of the metal plate by punching, and a diameter of the through hole on the first surface of the metal plate A first etching resist having a larger first opening, corresponding to the first opening on the surface opposite to the first surface, and larger than the diameter of the through hole Forming a second etching resist having a second opening, and etching the metal plate portion exposed from the first opening and the second opening, thereby forming the through-hole into the metal. The method includes a step of forming a diameter of the intermediate portion to be smaller than a diameter of a plate surface portion of the plate, and a step of forming a conductive pad in at least the through hole.

  According to a sixth aspect of the present invention, in the method for manufacturing a printed wiring board, a front end of the metal plate from a first surface side to the opposite second surface side by a laser at a predetermined position on the first surface of the metal plate. Forming a first hole with a small diameter, and a laser at a position corresponding to the first hole on the second surface from the second surface side to an intermediate portion of the metal plate. Forming a second hole to be smaller and forming a through hole configured to have a diameter of the intermediate portion smaller than a diameter of the plate surface portion of the metal plate; and at least a conductive pad in the through hole Forming the step.

  According to the present invention (claims 1 to 11), the height of the plurality of first conductive pads (semiconductor element pads) protruding from the semiconductor element mounting surface is substantially the same as the thickness of the metal plate. Since the stress between the element and the printed wiring board is relieved, the reliability when the semiconductor element is flip-chip mounted on the printed wiring board is increased. Thereby, a decrease in the yield of the semiconductor device can be suppressed.

  According to the present invention (claims 1 to 11), since the first conductive pad (semiconductor element pad) replaced with the bump is formed in advance, the bump is formed at an accurate position of each semiconductor element pad. It can be said.

  According to the present invention (claims 1 and 3), since the first conductive pad (semiconductor element pad) when viewed from the longitudinal cross-sectional direction has a drum shape, the sealing resin is easily filled. Further, the stress between the semiconductor element and the printed wiring board is relieved by the shape of the pad.

  According to the present invention (Claim 6), a conductive layer for improving the adhesion of a conductive paste or the like is interposed between the first conductive pad and the wiring layer. The conductive layer increases the adhesion between the first conductive pad and the wiring layer, and can prevent the printed wiring board from cracking. That is, the stress generated by the difference in thermal expansion coefficient between the printed wiring board and the semiconductor element is transmitted to the printed wiring board through the first conductive pad coupled to the semiconductor element, but the stress is absorbed by the conductive layer. . Therefore, it is possible to prevent the occurrence of cracks between the first conductive pad and the wiring layer or at other parts of the printed wiring board, and reliability when the semiconductor element is flip-chip mounted on the printed wiring board. Is even higher. Thereby, it is possible to further suppress the decrease in the yield of the semiconductor device.

(Embodiment 1)
A semiconductor device and a printed wiring board according to Embodiment 1 of the present invention will be described with reference to the drawings. 1A is a perspective view from the front side, FIG. 1B is a perspective view from the back side, and FIG. 1C is a partial cross-sectional view schematically showing the configuration of the semiconductor device according to the first embodiment of the present invention. is there. The semiconductor device according to the first embodiment applies a flip chip ball grid array (FCBGA).

  Referring to FIG. 1A, the semiconductor device 1 includes a printed wiring board 10 and a semiconductor element 30. The printed wiring board 10 includes a metal plate 11 and a multilayer wiring layer 23. The metal plate 11 is laminated on the multilayer wiring layer 23 and has an opening 11a penetrating through a region excluding a region where the semiconductor element 30 is mounted. The multilayer wiring layer 23 is a build-up layer without a substrate serving as a core, and a plurality of wiring layers and insulating layers are alternately stacked, and the wiring layers are via-connected. The multilayer wiring layer 23 can be formed by a known build-up method. The semiconductor element 30 is mounted in the region of the opening 11 a of the metal plate 11 on the multilayer wiring layer 23.

  Referring to FIG. 1B, a first bump 22 is mounted on a surface (back surface) opposite to the surface (front surface) on which the metal plate 11 is disposed in the multilayer wiring layer 23.

  Referring to FIG. 1C, the semiconductor device 1 includes a metal plate 11, a first insulating layer 14, a first conductive pad 15, a conductive layer 16, a first wiring layer 17, and a second insulating layer 18. , Second wiring layer 19, third insulating layer 20, second conductive pad 21, first bump 22, semiconductor element 30, second bump 31, and sealing resin 40. The layer in which the first insulating layer 14, the first wiring layer 17, the second insulating layer 18, the second wiring layer 19, and the third insulating layer 20 are stacked is the multilayer wiring layer 23 in FIG. Corresponding to

  The metal plate 11 is a frame-shaped reinforcing plate (stiffener) in which an opening 11a penetrating in the center is formed. Further, since the metal plate 11 is made of metal, it can have a function as the ground of the outermost layer. A first conductive pad 15 and a sealing resin 40 are accommodated in the opening 11 a of the metal plate 11. For the metal plate 11, for example, at least one metal selected from the group consisting of stainless steel, iron, nickel, copper and aluminum can be used, and an alloy thereof can be used. If so, copper is optimal. Moreover, the thickness of the metal plate 11 can be 0.1-1.5 mm, for example.

  The first insulating layer 14 is an insulating resin layer that is bonded to the metal plate 11. The first insulating layer 14 has an opening at a position corresponding to the electrode terminal of the semiconductor element 30. At least the conductive layer 16 is disposed in the opening of the first insulating layer 14. As the first insulating layer 14, for example, epoxy resin, epoxy acrylate resin, urethane acrylate resin, polyester resin, phenol resin, polyimide resin, bismaleimide triazine resin, polyphenylene ether resin, fluorine resin, benzocyclobutene resin, liquid crystal polymer, etc. 1 type or 2 or more types of insulating resins selected from these insulating resins may be used, and may be a thermosetting resin or a photosensitive resin. For example, a photosensitive solder resist (manufactured by Taiyo Ink Manufacturing Co., Ltd.) PSR4000 NAS-90-TY, Tamura Kaken DSR 2200 BGX-8, etc.) can be used. In order to increase the substrate strength, a glass cloth, a glass nonwoven fabric, an aramid nonwoven fabric, an aramid film, a polyimide film, or the like may be laminated on the insulating resin as a reinforcing material. In addition, a resin film or a copper foil with resin (RCC) can be used for the first insulating layer 14.

  The first conductive pad 15 is a conductive medium for electrically connecting to the electrode terminal of the semiconductor element 30 and is a columnar pad protruding from the surface of the first insulating layer. The first conductive pad 15 has a drum shape when viewed from the longitudinal cross-sectional direction, that is, the diameter of the intermediate portion of the column is smaller than the diameter of the surface in contact with the conductive layer 16 and the diameter of the surface in contact with the second bump 31. The diameter of the middle part of the column is smaller. The first conductive pad 15 is disposed for each opening of the first insulating layer 14. The height of the protruding portion of the first conductive pad 15 (the height from the surface of the first insulating layer 14 to the tip portion) is substantially equal to the thickness of the metal plate 11 (for example, 0.1 to 1.5 mm). It is uniform. The surface of the first conductive pad 15 that is in contact with the second bump 31 is substantially flat along the surface of the metal plate 11 opposite to the surface on the first insulating layer 14 side. For example, nickel or the like can be used for the first conductive pad 15.

  The conductive layer 16 is a conductive medium that enhances adhesion compared to when the first conductive pad 15 and the first wiring layer 17 are directly bonded. For each opening of the first insulating layer 14, It is interposed between one conductive pad 15 and the first wiring layer 17. For the conductive layer 16, a material that has higher adhesion than that when the first conductive pad 15 and the first wiring layer 17 are directly bonded is selected. For example, an insulating resin such as an epoxy resin or a silicon resin is used as a metal. (Copper, silver, gold, solder, etc.), one or more conductive pastes dispersed with conductive fine particles such as carbon, polypyrrole, polyacetylene, polyaniline, polyarylene, polyarylene vinylene, polythiophene, poly- A conductive polymer such as 3-alkylthiophene can be used, and a conductive copper paste is optimal from the viewpoint of cost. The conductive layer 16 also serves as a cushion for absorbing the stress transmitted through the first conductive pad 15 when a stress due to a difference in thermal expansion coefficient occurs between the semiconductor element 30 and the printed wiring board 10.

  The first wiring layer 17 is a conductive layer patterned on the surface of the first insulating layer 14 including the conductive layer 16. For the first wiring layer 17, for example, at least one metal selected from gold, silver, copper, nickel, or the like or an alloy thereof can be used, and copper is optimal from the viewpoint of cost. The formation is performed by electroless plating, electrolytic plating, or the like.

The second insulating layer 18 is an insulating resin layer formed on the surface of the first insulating layer 14 including the first wiring layer 17. The second insulating layer 18 has an opening (via) that communicates with the first wiring layer 17. The second insulating layer 18 may be made of the same material as that of the first insulating layer 14, and may be made of a material different from that of the first insulating layer 14, but from the viewpoint of buildup, resin-coated copper Foil may be used.

  The second wiring layer 19 is a conductive layer patterned on the surface of the second insulating layer 18 and is electrically connected to the first wiring layer 17 through the opening of the second insulating layer 18 (via connection). ) The second wiring layer 19 may be further formed in multiple layers via the second insulating layer 18 to connect vias between the layers. The second wiring layer 19 can be made of the same material as that of the first wiring layer 17, and copper is optimal from the viewpoint of cost.

  The third insulating layer 20 is an insulating resin layer formed on the surface of the second insulating layer 18 including the second wiring layer 19. The third insulating layer 20 has an opening that communicates with the second wiring layer 19. A second conductive pad 21 is disposed in the opening of the third insulating layer 20. A material similar to that of the first insulating layer 14 can be used for the third insulating layer 20, and a material different from that of the first insulating layer 14 and the second insulating layer 18 may be used. In consideration of the surface layer, a solder resist is desirable.

  The second conductive pad 21 is a conductive medium formed on the surface of the second wiring layer 19 in the opening of the third insulating layer 20. The second conductive pad 21 is electrically connected to the corresponding first conductive pad 15 through at least the second wiring layer 19, the first wiring layer 17, and the conductive layer 16. For the second conductive pad 21, for example, at least one metal selected from gold, tin, nickel and solder can be used, and an alloy thereof can be used. Perform by plating, electrolytic plating, etc. The second conductive pad 21 may have not only a single layer structure but also two or more layers. If the adhesiveness between the second conductive pad 21 and the second wiring layer 19 is taken into consideration, the second conductive pad 21 A two-layer structure of a nickel plating layer and a gold plating layer is optimal in order from the wiring layer 19 side.

  The first bump 22 is a conductive protrusion medium that is formed on the surface of the second conductive pad 21 and is electrically connected to an external electronic component (not shown). The first bump 22 includes a metal material such as gold, copper, and solder (Sn—Pb eutectic solder, Sn—Ag—Cu solder, etc.), a conductive resin, and a composite material in which a metal material is coated on the surface of a resin member. From the viewpoint of handling and the like, solder balls are most suitable.

  The semiconductor element 30 is, for example, a semiconductor chip such as an LSI, and the electrode terminals of the semiconductor element 30 are connected to the first conductive pads 15 via the corresponding second bumps 31. A material similar to that of the first bump 22 can be used for the second bump 31, and solder is optimal from the viewpoint of handling and the like.

  The sealing resin 40 is an insulating resin that seals a gap between the semiconductor element 30 and the first insulating layer 14. A known sealing material (for example, epoxy resin) can be selected and used for the sealing resin 40 according to the required characteristics.

  Next, a method for manufacturing a semiconductor device and a printed wiring board according to Embodiment 1 of the present invention will be described with reference to the drawings. 2 and 3 are partial cross-sectional views schematically showing the cross-section of the printed wiring board according to Embodiment 1 of the present invention in the order of the steps in the main manufacturing process. 2 and 3 are simply separated for the convenience of drawing.

  First, the through-hole 11b for forming the 1st electroconductive pad 15 is formed in the metal plate 11 (for example, copper plate) (step A1; refer FIG. 2 (A)). The through hole 11b is formed by forming etching resists 12 and 13 having openings 12a and 13a on both surfaces of the metal plate 11, and then using the etching resists 12 and 13 as a mask. The portions of the metal plate 11 exposed from the openings 12a and 13a are etched. Etching to the metal plate 11 is isotropic. As the etching progresses, the metal plate 11 has recesses formed on both sides, and the recesses on both sides penetrate. By this method, the through hole 11b can be formed in a drum shape as viewed from the longitudinal cross-sectional direction, that is, the diameter of the intermediate portion can be made smaller than the diameter of the plate surface portion of the metal plate 11. The plurality of openings 12 a of the etching resist 12 are formed at positions corresponding to the respective openings 13 a of the etching resist 13. (1) When the etching resists 12 and 13 are liquid, the etching resists 12 and 13 are formed by laminating the etching resists 12 and 13 by a spin coating method, a die coating method, a curtain coating method, or a printing method. 2) When the etching resists 12 and 13 are dry films, the etching resists 12 and 13 are laminated by a laminating method or the like and then subjected to a treatment such as drying to solidify the etching resists 12 and 13, (3) the etching resists 12 and 13 When 13 is photosensitive, a method of patterning the etching resists 12 and 13 by a photolithography method or the like. (4) When the etching resists 12 and 13 are non-photosensitive, the etching resists 12 and 13 are patterned by a laser processing method or the like. There are methods. In addition, after forming the through-hole 11b, the etching resists 12 and 13 are removed.

  Next, a first conductive pad 15 is formed in the through hole 11b of the metal plate 11 (step A2; see FIG. 2B). Here, the first conductive pad 15 (for example, nickel) can be formed by, for example, an electrolytic plating method. That is, a plating metal is attached to the side wall of the through hole 11b by plating, and finally the through hole 11b is filled with a plating metal such as nickel.

  Next, after forming the first insulating layer 14 on the surface of one side of the metal plate 11, an opening 14a through which the first conductive pad 15 is exposed is formed at a predetermined position of the first insulating layer 14 (see FIG. Step A3; see FIG. 2 (C)). Here, as a method for forming the first insulating layer 14, for example, (1) a method in which a resin film is attached and the opening 14 a is formed by laser light such as a YAG laser or a carbon dioxide gas laser, and (2) resin is attached. A method of removing the unnecessary copper foil by attaching a copper foil (RCC), etching the copper foil of the opening 14a, forming the opening 14a by laser processing or plasma processing, and (3) thermosetting resin A method of forming an opening 14a by laser light such as a YAG laser or a carbon dioxide gas laser by printing, coating, etc., (4) As the first insulating layer 14, a photosensitive resin is printed, coated, and cured. There is a method of forming the opening 14a by a photolithography method, and the method using a copper foil with resin is optimal from the viewpoint of buildup. Moreover, when the opening part 14a is formed with a laser beam, in order to remove the contamination adhering to the wall surface of the opening part 14a, it is preferable to wash with a permanganate solution.

  Next, a conductive layer 16 is formed on the surface of the first conductive pad 15 in the opening 14a of the first insulating layer 14 (step A4; see FIG. 2D). Here, the conductive layer 16 (for example, conductive copper paste) can be formed by printing such as an inkjet method or a screen method.

  Next, the first wiring layer 17, the second insulating layer 18, the second wiring layer 19, and the third insulating layer 20 are stacked in this order on the surface of the first insulating layer 14 including the conductive layer 16. Then, the multilayer wiring layer 23 in which the wiring layers are via-connected is formed (step A5; see FIG. 2E). Here, the first wiring layer 17 (for example, copper plating) performs, for example, chemical roughening (desmearing, resin roughening, etc.) on the surface of the first insulating layer 14, and then the assembly surface (via). After the seed layer is formed by electroless copper plating on the bottom (including the bottom), a circuit-forming dry film is laminated to the substrate, mask exposure and development processes are performed, and a desired wiring pattern is formed, followed by electrolytic plating. The wiring pattern can be formed by the method, the dry film is peeled off, and then the seed layer is removed by etching. The second wiring layer 19 (for example, copper plating) can also be formed by the same method as the first wiring layer 17. The second insulating layer 18 (for example, copper foil with resin) can be formed by the same method as the first insulating layer 14 (for example, a method using a copper foil with resin). Note that a plurality of wiring layers and insulating layers may be formed on the second wiring layer 19 and the layers may be via-connected. The third insulating layer 20 can be formed by the same method as the first insulating layer 14 (for example, a method using a photosensitive resin (solder resist)). At a predetermined position of the third insulating layer 20, an opening 20a from which the second wiring layer 19 is exposed is formed.

  Next, a second conductive pad 21 is formed on the surface of the second wiring layer 19 exposed from the opening formed in the third insulating layer 20 (step A6; see FIG. 3A). Here, the second conductive pad 21 (for example, a laminated structure of a nickel plating layer and a gold plating layer) can be formed by, for example, an electrolytic plating method.

  Next, an opening 11a is formed in a region including the region where the first conductive pad 15 is formed in the metal plate 11, and the first insulating layer 14 is exposed (step A7; see FIG. 3B). ). Here, the opening 11a is formed with an etching resist 24 having an opening on the surface of the metal plate 11 on the surface opposite to the surface on which the multilayer wiring layer is disposed, and then the etching resist 24 is used as a mask. Then, only the portion of the metal plate 11 exposed from the opening of the etching resist 24 is etched. At this time, the first conductive pad 15 is left using an etching solution that etches the metal plate 11 and does not etch the first conductive pad 15. In the etching, an etching resist may be formed on the surface of the third insulating layer 20 including the second conductive pad 21 to protect the second conductive pad 21. The method for forming the etching resist 24 is the same as the method for forming the etching resists 12 and 13 (see FIG. 2A). Further, after the opening 11a is formed, the etching resists 12 and 13 are removed. Moreover, you may make it remove the metal plate 11 whole, without forming the opening part 11a. When the entire metal plate 11 is removed, a solder resist is formed in a predetermined region on the exposed surface of the first insulating layer 14.

  Next, after the connection electrodes (not shown) of the semiconductor element 30 and the corresponding first conductive pads 15 are flip-chip connected by the second bumps 31 such as solder, the sealing resin 40 is attached to the semiconductor element 30. And poured into a space between the first insulating layer 14 and the first insulating layer 14 (step A8; see FIG. 3C).

  Finally, the first bump 22 is mounted on the second conductive pad 21 (step A9; see FIG. 3D).

  According to the printed wiring board configured as described above, since the multilayer wiring layer 23 is provided on the flat metal plate 11, the flatness of the multilayer wiring layer 23 is good. Further, since the top of the first conductive pad 15 on the semiconductor element 30 side is flat, it is easy to flip-chip mount the semiconductor element 30 on the printed wiring board 10. Further, since the height of the first conductive pad 15 is uniform, the connection portion between the multilayer wiring layer 23 and the semiconductor element 30 is uniform, and when the semiconductor element 30 is flip-chip mounted on the printed wiring board 10. High reliability. Further, if the height of the first conductive pad 15 is increased, the stress between the semiconductor element 30 and the printed wiring board 10 can be relaxed. In addition, since the first conductive pad 15 has a drum shape when viewed from the longitudinal cross-sectional direction, the sealing resin 40 is easily filled, and the first conductive pad 15 having the drum shape is It is easy to deform and absorbs stress by deforming it. In the semiconductor device, since the semiconductor element 30 is disposed in the opening 11a region of the metal plate 11 and connected to the outermost surface of the flat multilayer wiring layer 23 without warping, the multilayer wiring layer 23 and the semiconductor element 30 are connected. The connecting part is stable and reliable. Further, when the conductive layer 16 is interposed between the first conductive pad 15 and the first wiring layer 17, the adhesion between the first conductive pad 15 and the first wiring layer 17 is improved. In addition, the stress transmitted to the printed wiring board 10 through the first conductive pad 15 is absorbed by the conductive layer 16, and between the first conductive pad 15 and the first wiring layer 17, or the printed wiring board. It is possible to prevent the occurrence of cracks at other portions of the semiconductor device 10, and the reliability when the semiconductor element 30 is flip-chip mounted on the printed wiring board 10 is further increased.

(Embodiment 2)
A semiconductor device and a printed wiring board according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 4 is a partial cross-sectional view schematically showing the configuration of the semiconductor device according to the second embodiment of the present invention. The semiconductor device according to the second embodiment is different in that it does not have the conductive layer (see 16 in FIG. 1C) in the semiconductor device according to the first embodiment.

  Referring to FIG. 4, in the semiconductor device according to the second embodiment, the first wiring layer 17 (for example, copper) and the first conductive pad 15 are directly connected to ensure adhesion. A conductive paste or the like is used for the first conductive pad 15. When the conductive paste is used, the second bumps 31 connecting the electrode terminals of the semiconductor element 30 are preferably Au stud bumps. The shape of the first conductive pad 15 when viewed from the longitudinal cross-sectional direction is the same as the shape (the drum shape) of the first conductive pad of the first embodiment. The height of the protruding portion of the first conductive pad 15 (the height from the surface of the first insulating layer 14 to the tip portion) is the same as that of the first embodiment (for example, 0. 0). 1 to 1.5 mm) and substantially uniform.

  Next, a method for manufacturing a semiconductor device and a printed wiring board according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 5: is the fragmentary sectional view which showed typically the cross section of the printed wiring board based on Embodiment 2 of this invention about the main manufacturing process in order of the process.

  First, the through-hole 11b for forming the 1st electroconductive pad 15 is formed in the metal plate 11 (for example, copper plate) (step B1; refer FIG. 5 (A)). In addition, about the formation method of the through-hole 11b, it is the same as that of step A1 in Embodiment 1. FIG.

  Next, a first conductive pad 15 is formed in the through hole 11b of the metal plate 11 (step B2; see FIG. 5B). Here, the 1st conductive pad 15 (for example, conductive paste) can be formed by printing, such as an ink jet system or a screen system, for example.

  Next, after forming the first insulating layer 14 on the surface of one side of the metal plate 11, an opening 14a through which the first conductive pad 15 is exposed is formed at a predetermined position of the first insulating layer 14 (see FIG. Step B3; see FIG. 5C). Here, the opening 14a is not exposed when the opening (see 11a in FIG. 3B) is formed in the metal plate 11 by etching so that the first wiring layer 17 is not etched. Thus, it is necessary to form the first conductive pad 15 within the region where it is disposed. Note that the method for forming the first insulating layer 14 and the opening 14a is the same as that in step A3 in the first embodiment.

  Next, the first wiring layer 17, the second insulating layer 18, the second wiring layer 19, and the third insulating layer 20 are formed on the surface of the first insulating layer 14 including the first conductive pad 15. By laminating in this order, the multilayer wiring layer 23 in which the wiring layers are via-connected is formed (step B4; see FIG. 5D). The method for forming the multilayer wiring layer 23 is the same as step A5 in the first embodiment. The processes after Step B4 are the same as Steps A6 to A9 (see FIG. 3) in the first embodiment.

  According to the second embodiment, since the adhesion between the first conductive pad 15 and the first wiring layer 17 is ensured, the conductive layer of the first embodiment (see 16 in FIG. 1C) is formed. The cost of the semiconductor device can be reduced by reducing the number of manufacturing steps. In addition, the same effects as those of the first embodiment are obtained.

(Embodiment 3)
Next, a semiconductor device and a printed wiring board according to Embodiment 3 of the present invention will be described with reference to the drawings. FIG. 6 is a partial cross-sectional view schematically showing, in the order of steps, the main manufacturing process of the cross section of the printed wiring board according to Embodiment 3 of the present invention. The configuration of the semiconductor device according to the third embodiment is the same as that of the semiconductor device according to the first embodiment, but the manufacturing method is different. Refer to FIG. 1 for the configuration of the semiconductor device according to the third embodiment.

  First, the through-hole 11b is formed in the metal plate 11 (for example, copper plate) by punching (step C1; refer FIG. 6 (A)). The diameter of the through hole 11b of the metal plate 11 at this stage is substantially uniform.

  Next, etching resists 12 and 13 having openings 12a and 12b at positions corresponding to the through holes formed by punching are formed on both surfaces of the metal plate 11 (step C2; see FIG. 6B). The method for forming the etching resists 12 and 13 is the same as that in Step A1 in the first embodiment.

  Next, using the etching resists 12 and 13 as a mask, the portion of the metal plate 11 exposed from the opening of the etching resist is etched (step C3; see FIG. 6C). In this etching, isotropic etching is performed on both ends of the through-hole 11b, so that the through-hole 11b can be formed into a drum shape when viewed from the longitudinal cross-sectional direction. That is, the diameter of the intermediate portion can be made smaller than the diameter of the plate surface portion of the metal plate 11. After the through hole 11b is formed, the etching resists 12 and 13 are removed. Steps subsequent to Step C3 are the same as Steps A2 to A9 in Embodiment 1 (see FIGS. 2B to 2E and FIG. 3).

  According to the third embodiment, the same effects as those of the first embodiment are obtained.

(Embodiment 4)
Next, a semiconductor device and a printed wiring board according to Embodiment 4 of the present invention will be described with reference to the drawings. FIG. 7: is the fragmentary sectional view which showed typically the cross section of the printed wiring board concerning Embodiment 4 of this invention the main manufacturing processes in order of the process. The configuration of the semiconductor device according to the fourth embodiment is the same as that of the semiconductor device according to the first embodiment, but the manufacturing method is different. Refer to FIG. 1 for the configuration of the semiconductor device according to the fourth embodiment.

  First, the first hole 11c is formed in the metal plate 11 by laser from the first surface side (step D1; see FIG. 7A). The first hole 11c may be a bottomed hole or a through hole.

  Next, the through-hole 11b is formed with a laser in the position corresponding to the 1st hole 11c from the 2nd surface side on the opposite side to the 1st surface of the metal plate 11 (step D2; refer FIG.7 (B)). . By this laser drilling, the through hole 11b can be formed into a drum shape when viewed from the longitudinal cross-section direction, that is, the diameter of the intermediate portion can be made smaller than the diameter of the plate surface portion of the metal plate 11. The processes after Step D2 are the same as Steps A2 to A9 in Embodiment 1 (see FIGS. 2B to 2E and FIG. 3).

  According to the fourth embodiment, the same effects as those of the first embodiment are obtained.

1A is a perspective view from the front surface side, FIG. 2B is a perspective view from the back surface side, and FIG. 2C is a partial cross-sectional view schematically showing the configuration of the semiconductor device according to the first embodiment of the present invention. It is the fragmentary sectional view which showed typically the cross section of the printed wiring board which concerns on Embodiment 1 of this invention about the first half of the main manufacturing processes in order of the process. It is the fragmentary sectional view which showed typically the cross section of the printed wiring board which concerns on Embodiment 1 of this invention about the latter half of the main manufacturing processes in order of the process. It is the fragmentary sectional view which showed typically the structure of the semiconductor device which concerns on Embodiment 2 of this invention. It is the fragmentary sectional view which showed typically the cross section of the printed wiring board which concerns on Embodiment 2 of this invention about the main manufacturing process in order of the process. It is the fragmentary sectional view which showed typically the cross section of the printed wiring board which concerns on Embodiment 3 of this invention about the main manufacturing process in order of the process. It is the fragmentary sectional view which showed typically the cross section of the printed wiring board which concerns on Embodiment 4 of this invention about the main manufacturing process in order of the process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Printed wiring board 11 Metal plate 11a Opening part 11b Through-hole 11c 1st hole 12, 13 Etching resist 12a, 13a Opening part 14 1st insulating layer 14a Opening part 15 1st electroconductive pad 16 Conductive layer Reference Signs List 17 first wiring layer 18 second insulating layer 19 second wiring layer 20 third insulating layer 20a opening 21 second conductive pad 22 first bump 23 multilayer wiring layer 24 etching resist 30 semiconductor element 31 Second bump 40 sealing resin

Claims (11)

A multilayer wiring layer in which a plurality of wiring layers and insulating layers are alternately stacked, and the wiring layers are via-connected, and
A plurality of first conductive pads formed on the first surface of the multilayer wiring layer and formed in a column shape protruding from the first surface;
A plurality of second conductive pads formed on a second surface opposite to the first surface;
With
In the first conductive pad, the diameter of the middle part of the column is smaller than the diameter of the surface on the multilayer wiring layer side as viewed from the cross-sectional direction, and the diameter of the middle part of the column is smaller than the diameter of the surface on the top side. Composed of small,
The first conductive pad is made of nickel,
Adhesion is improved between the first conductive pad and the wiring layer connected to the first conductive pad than when the first conductive pad and the wiring layer are directly bonded. A printed wiring board comprising a conductive layer. A metal plate having an opening for mounting a semiconductor element;
Laminated on the metal plate, a plurality of wiring layers and insulating layers are alternately laminated, and a multilayer wiring layer in which the wiring layers are via-connected, and
A plurality of first conductive pads formed in the openings of the metal plate on the first surface of the multilayer wiring layer on which the metal plate is disposed and formed in a column shape protruding from the first surface When,
A plurality of second conductive pads formed on a second surface opposite to the first surface;
With
The printed wiring board, wherein a height from a boundary surface between the metal plate and the multilayer wiring layer to a top portion of the first conductive pad is configured to be equal to a thickness of the metal plate.   In the first conductive pad, the diameter of the middle part of the column is smaller than the diameter of the surface on the multilayer wiring layer side as viewed from the cross-sectional direction, and the diameter of the middle part of the column is smaller than the diameter of the surface on the top side. The printed wiring board according to claim 2, wherein the printed wiring board is small.   The printed wiring board according to claim 2, wherein the first conductive pad is made of nickel.   The printed wiring board according to claim 2, wherein the first conductive pad is made of a conductive paste.   Adhesion is improved between the first conductive pad and the wiring layer connected to the first conductive pad than when the first conductive pad and the wiring layer are directly bonded. The printed wiring board according to claim 2, wherein a conductive layer is interposed. An opening formed in the insulating layer in contact with the metal plate in the multilayer wiring layer so as to communicate with the first conductive pad is formed within a region where the first conductive pad is disposed. The printed wiring board according to claim 2 , wherein the printed wiring board is a printed wiring board. A printed wiring board according to any one of claims 1 to 7,
A semiconductor element connected to the first conductive pad;
A semiconductor device comprising: A first etching resist having a first opening is formed on the first surface of the metal plate, and a second opening corresponding to the first opening is formed on a surface opposite to the first surface. Forming a second etching resist having:
Etching the metal plate portion exposed from the first opening and the second opening to form a through hole having a diameter of the intermediate portion smaller than the diameter of the plate surface portion of the metal plate;
Forming a conductive pad in at least the through hole;
A printed wiring board manufacturing method comprising: Forming a through hole by punching at a predetermined position of the metal plate;
A first etching resist having a first opening larger than the diameter of the through hole is formed on the first surface of the metal plate, and the first opening is formed on a surface opposite to the first surface. Forming a second etching resist corresponding to a portion and having a second opening larger than the diameter of the through hole;
By etching the metal plate portion exposed from the first opening and the second opening, the through hole is formed so that the diameter of the intermediate portion is smaller than the diameter of the plate surface portion of the metal plate. And the process of
Forming a conductive pad in at least the through hole;
A printed wiring board manufacturing method comprising: Forming a first hole with a gap between the first surface side and the opposite second surface side by a laser at a predetermined position on the first surface of the metal plate;
A second hole is formed in the second surface at a position corresponding to the first hole by a laser to form a second hole having a small opening from the second surface side to an intermediate portion of the metal plate. A step of forming a through hole configured to make the diameter of the intermediate portion smaller than the diameter of the plate surface portion of the plate;
Forming a conductive pad in at least the through hole;
A printed wiring board manufacturing method comprising:

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