JP3906003B2 - プロセッサおよびその命令処理方法 - Google Patents

プロセッサおよびその命令処理方法 Download PDF

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Publication number
JP3906003B2
JP3906003B2 JP2000027755A JP2000027755A JP3906003B2 JP 3906003 B2 JP3906003 B2 JP 3906003B2 JP 2000027755 A JP2000027755 A JP 2000027755A JP 2000027755 A JP2000027755 A JP 2000027755A JP 3906003 B2 JP3906003 B2 JP 3906003B2
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instruction
bit
circuit
processor
arithmetic logic
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JP2000027755A
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Japanese (ja)
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JP2000227858A (ja
JP2000227858A5 (enExample
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ラキッシュ、アグラワル
カムラン、マリック
山 竜 生 照
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Toshiba Corp
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Toshiba Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP2000027755A 1999-02-04 2000-02-04 プロセッサおよびその命令処理方法 Expired - Fee Related JP3906003B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/244,443 US6308252B1 (en) 1999-02-04 1999-02-04 Processor method and apparatus for performing single operand operation and multiple parallel operand operation
US244443 1999-02-04

Publications (3)

Publication Number Publication Date
JP2000227858A JP2000227858A (ja) 2000-08-15
JP2000227858A5 JP2000227858A5 (enExample) 2006-01-05
JP3906003B2 true JP3906003B2 (ja) 2007-04-18

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JP2000027755A Expired - Fee Related JP3906003B2 (ja) 1999-02-04 2000-02-04 プロセッサおよびその命令処理方法

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US (1) US6308252B1 (enExample)
JP (1) JP3906003B2 (enExample)

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US7506136B2 (en) * 1999-04-09 2009-03-17 Clearspeed Technology Plc Parallel data processing apparatus
US7627736B2 (en) * 1999-04-09 2009-12-01 Clearspeed Technology Plc Thread manager to control an array of processing elements
US7966475B2 (en) 1999-04-09 2011-06-21 Rambus Inc. Parallel data processing apparatus
US8762691B2 (en) 1999-04-09 2014-06-24 Rambus Inc. Memory access consolidation for SIMD processing elements using transaction identifiers
US8174530B2 (en) * 1999-04-09 2012-05-08 Rambus Inc. Parallel date processing apparatus
US7802079B2 (en) * 1999-04-09 2010-09-21 Clearspeed Technology Limited Parallel data processing apparatus
US20080007562A1 (en) * 1999-04-09 2008-01-10 Dave Stuttard Parallel data processing apparatus
US8169440B2 (en) * 1999-04-09 2012-05-01 Rambus Inc. Parallel data processing apparatus
US20080016318A1 (en) * 1999-04-09 2008-01-17 Dave Stuttard Parallel data processing apparatus
US20070294510A1 (en) * 1999-04-09 2007-12-20 Dave Stuttard Parallel data processing apparatus
US20080184017A1 (en) * 1999-04-09 2008-07-31 Dave Stuttard Parallel data processing apparatus
JP5285828B2 (ja) * 1999-04-09 2013-09-11 ラムバス・インコーポレーテッド 並列データ処理装置
US7401205B1 (en) * 1999-08-13 2008-07-15 Mips Technologies, Inc. High performance RISC instruction set digital signal processor having circular buffer and looping controls
US6766440B1 (en) * 2000-02-18 2004-07-20 Texas Instruments Incorporated Microprocessor with conditional cross path stall to minimize CPU cycle time length
US7308559B2 (en) * 2000-02-29 2007-12-11 International Business Machines Corporation Digital signal processor with cascaded SIMD organization
US6665790B1 (en) * 2000-02-29 2003-12-16 International Business Machines Corporation Vector register file with arbitrary vector addressing
US7233998B2 (en) * 2001-03-22 2007-06-19 Sony Computer Entertainment Inc. Computer architecture and software cells for broadband networks
JP2003186567A (ja) * 2001-12-19 2003-07-04 Matsushita Electric Ind Co Ltd マイクロプロセッサ
DE10206830B4 (de) * 2002-02-18 2004-10-14 Systemonic Ag Verfahren und Anordnung zur Zusammenführung von Daten aus parallelen Datenpfaden
US6944744B2 (en) * 2002-08-27 2005-09-13 Advanced Micro Devices, Inc. Apparatus and method for independently schedulable functional units with issue lock mechanism in a processor
US7017028B2 (en) * 2003-03-14 2006-03-21 International Business Machines Corporation Apparatus and method for updating pointers for indirect and parallel register access
JP4502662B2 (ja) * 2004-02-20 2010-07-14 アルテラ コーポレイション 乗算器−累算器ブロックモード分割
US9098932B2 (en) * 2004-08-11 2015-08-04 Ati Technologies Ulc Graphics processing logic with variable arithmetic logic unit control and method therefor
US7577869B2 (en) * 2004-08-11 2009-08-18 Ati Technologies Ulc Apparatus with redundant circuitry and method therefor
US10454106B2 (en) 2004-12-31 2019-10-22 Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University) Double-layer cathode active materials for lithium secondary batteries, method for preparing the active materials, and lithium secondary batteries using the active materials
US7711934B2 (en) * 2005-10-31 2010-05-04 Mips Technologies, Inc. Processor core and method for managing branch misprediction in an out-of-order processor pipeline
US7734901B2 (en) * 2005-10-31 2010-06-08 Mips Technologies, Inc. Processor core and method for managing program counter redirection in an out-of-order processor pipeline
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US20070204139A1 (en) 2006-02-28 2007-08-30 Mips Technologies, Inc. Compact linked-list-based multi-threaded instruction graduation buffer
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US6308252B1 (en) 2001-10-23

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