JP3905054B2 - Thin film transistor substrate manufacturing method and liquid crystal display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a thin film transistor substrate used in, for example, a liquid crystal display device and a liquid crystal display device.
[0002]
[Prior art]
Recently, with the increase in size and definition of liquid crystal display devices, liquid crystal display devices that perform active matrix driving have been actively developed. In a liquid crystal display device that performs active matrix driving, liquid crystal is sealed between a thin film transistor substrate and a color filter substrate, and display is performed by changing the light transmission state of the liquid crystal by applying a voltage. In the thin film transistor substrate, gate bus lines and drain bus lines are arranged in a matrix, and thin film transistors and pixel electrodes are arranged at intersections of the gate bus lines and the drain bus lines.
[0003]
In manufacturing a thin film transistor substrate, a gate bus line and a gate electrode are first formed on a transparent insulating plate and patterned into a predetermined shape using a first photomask. An insulating layer is formed thereon, a semiconductor film for forming a thin film transistor is then formed, and a channel protective film is further formed thereon. The channel protective film is patterned into a predetermined shape using a second photomask so as to exist only on the gate electrode. Then, an ohmic contact layer and a conductor layer for forming a drain bus line, a drain electrode, and a source electrode are formed and patterned into the shape of a thin film transistor using a third photomask. Then, a final protective film is formed, and a contact hole for connecting the pixel electrode to the gate electrode of the thin film transistor is formed in the final protective film using a fourth photomask. Thereafter, a material layer (for example, ITO) of the pixel electrode is formed and patterned into a predetermined shape using a fifth photomask.
[0004]
In forming the pixel electrode, conventionally, an inorganic etchant (for example, phosphoric acid, nitric acid, ferric chloride or other Hagen-type hydrochloric acid, hydrofluoric acid, hydrobromic acid, hydroiodic acid, etc.) is used. I used it. Patent Document 1 describes the use of an oxalic acid solution as an organic etchant.
[Patent Document 1]
Japanese Patent Laid-Open No. 4-48631
[Problems to be solved by the invention]
As described above, in manufacturing the thin film transistor substrate, each patterning process is performed using a photomask. Each patterning step includes application of a resist to be a photomask, exposure of the resist using the mask, etching of the resist, a predetermined process using the photomask thus formed, and peeling of the photomask. Conventionally, there are many patterning processes using photomasks (in the case of the above example, 5 photomasks are used), so the number of processes is large and not only productivity is low, but also yield is lowered. It was connected.
[0006]
When an inorganic etchant is used in forming the pixel electrode, overetching is likely to occur, or there is a problem in the etching selectivity between the pixel electrode material layer and the underlying material layer, and the pixel electrode etching is problematic. sometimes there is a possibility that damage to the insulating film and the drain bus line or the like. These problems can be solved to some extent by using an organic etchant such as an oxalic acid solution, but there are still problems such as insufficient dimensional accuracy of the pixel electrode, and more reliable etching can be performed. It has been demanded.
[0007]
An object of the present invention is to provide a method of manufacturing a thin film transistor substrate and a liquid crystal display device that can simplify the manufacturing process.
Another object of the present invention is to provide a method of manufacturing a thin film transistor substrate and a liquid crystal display device capable of reliably forming pixel electrodes.
[0008]
[Means for Solving the Problems]
The method of manufacturing a thin film transistor substrate according to the present invention includes a step of forming a material layer of the pixel electrode 18 in an amorphous state, a step of etching the material layer of the pixel electrode 18 with an organic acid, and an amorphous after etching. And a step of performing a heat treatment to bring the pixel electrode 18 in the quality state into a crystalline state. According to this method, the etching of the pixel electrode is more reliably achieved, and the pixel electrode is finished in a desired predetermined shape without damaging the base of the pixel electrode.
The method of manufacturing a thin film transistor substrate according to the present invention includes a gate bus line that is a first electrode layer formed on an insulating transparent substrate and a gate insulation that is a first insulating layer formed on the gate bus line. A film, a drain bus line which is a second electrode layer disposed on the gate insulating film so as to intersect the gate bus line, a thin film transistor disposed at an intersection of the gate bus line and the drain bus line, and A transparent pixel electrode which is a third electrode layer formed on a protective film which is a second insulating layer formed on the thin film transistor is connected to the thin film transistor through a contact hole formed in the second insulating film. In the method for manufacturing an electrically connected thin film transistor substrate, a step of forming a material layer of the transparent pixel electrode in an amorphous state, and the transparent Etching the material layer of the pixel electrode by an acid organic, and performing heat treatment of the transparent pixel electrode of the amorphous state to the crystalline state after the etching. According to this method, a pixel electrode having excellent film quality can be obtained.
[0009]
【Example】
FIG. 1 is a plan view showing a thin film transistor substrate 10 according to an embodiment of the present invention, and shows an active matrix formed on the thin film transistor substrate 10. 2 is a cross-sectional view taken along line II-II in FIG. 1, and FIG. 3 is a cross-sectional view taken along line III-III in FIG.
The thin film transistor substrate 10 is used in a liquid crystal display device. In this case, the liquid crystal is sealed between the thin film transistor substrate 10 and a color filter substrate (not shown). The thin film transistor substrate 10 includes the active matrix and the alignment film shown in FIG. 1, but the alignment film is omitted here.
[0010]
1 to 3, the active matrix formed on the thin film transistor substrate 10 is arranged at the intersection of the gate bus lines 12 and drain bus lines 14 and the gate bus lines 12 and drain bus lines 14 arranged in a matrix. The thin film transistor 16 and the pixel electrode 18 are formed.
[0011]
The thin film transistor 16 includes a gate electrode 20, a gate insulating film 22, a semiconductor film 24, a channel protective film 26, an ohmic contact layer 28, a drain electrode 30, and a source electrode 32. The pixel electrode 18 is connected to the source electrode 32 through a contact hole 36 provided in the passivation film (insulating film) 34. The gate bus line 12 and the gate electrode 22 are integrally formed on a transparent insulating plate 40 such as glass (FIG. 5), and have a two-layer structure of, for example, aluminum and titanium. The drain bus line 14 is formed integrally with the drain electrode 30 and the source electrode 32, and the source electrode 32 is separated from the drain electrode 30. Further, the storage capacitor electrode 42 is formed as the same material layer as the drain bus line 14. The storage capacitor electrode 42 is connected to the pixel electrode 18 through a contact hole 44 provided in the passivation film 34.
[0012]
As shown in FIG. 3, the gate bus line 12 and the gate electrode 20 are integrally formed, and the semiconductor film 24 is formed above the gate electrode 20 and above the gate bus line 12. The channel protective film 26 is formed on the semiconductor film 24 in the same pattern as the gate electrode 20. An element isolation hole 50 is formed in the passivation film 34, the channel protection film 26, the semiconductor film 24, and the gate insulating film 22 at a position close to the thin film transistor 10 on the gate bus line 12. Are separated from each other.
[0013]
FIG. 4 is a diagram showing a manufacturing procedure of the thin film transistor substrate 10. 4A, titanium and aluminum are deposited on a transparent insulating plate 40 such as glass by sputtering to form a gate bus line 12 and a gate electrode 20, and a photomask is used. Patterning into a shape as shown in FIG.
[0014]
As shown in FIG. 4B, a gate insulating film 22 made of silicon nitride, a semiconductor film 24 made of amorphous silicon, and a channel protective film 26 made of silicon nitride are formed by plasma CVD. Therefore, back exposure is performed using the gate electrode 20 and the gate bus line 12 as a mask while irradiating ultraviolet rays as indicated by arrows.
[0015]
Then, as shown in FIG. 4C, etching is performed using an etchant that dissolves the portion of the channel protective film 26 exposed to ultraviolet rays. Then, the channel protective film 26 is formed in a pattern aligned with the gate bus line 12 and the gate electrode 20. The semiconductor film 24 remains as an overall film. As described above, in the present invention, since the photomask is not used in the process of forming the channel protective film 26, the process becomes simpler than the case where the photomask is used in this process as in the prior art.
[0016]
Next, as shown in FIG. 4D, an ohmic contact layer 28 made of (n ⁺ a-Si), a drain bus line 14 made of chromium, a drain electrode 30 and a source electrode 32 are formed. Therefore, etching is performed using a photoresist to form the drain bus line 14 , the drain electrode 30, the source electrode 32, the ohmic contact layer 28, and the semiconductor film 24 in a predetermined shape corresponding to each element. Here, since the layer of the channel protective film 26 exists on the gate bus line 12, the semiconductor film 24 on the gate bus line 12 is not etched. That is, the semiconductor film 24 remains on the gate bus line 12 and the gate electrode 20 in the hatched shape of FIG. 5B, and the adjacent thin film transistors 16 are electrically connected.
[0017]
Next, as shown in FIG. 4E, a passivation film 34 made of a silicon nitride film is formed and etched using a photomask, and contact holes 36 and 44 and element isolation holes are formed in the passivation film 34. 50 is formed. This etchant can dissolve the passivation film 34, the channel protective film 26, the semiconductor film 24, and the gate insulating film 22, and is dry-etched using, for example, a fluorine-based etchant.
[0018]
In this way, the element isolation hole 50 is formed as shown in FIGS. 5C and 3, and the semiconductor film 24 on the gate bus line 12 is cut. Will be separated. In addition, the photomask used at this time can simultaneously make holes (not shown) for the gate terminal and the drain terminal. Finally, as shown in FIG. 2, a pixel electrode 18 made of ITO is formed, etched using a photomask, and the pixel electrode 18 is finished into a predetermined shape.
[0019]
FIG. 6 is a diagram showing an embodiment of the present invention. Also in this embodiment, the element isolation hole 50 is formed as in the previous embodiment, and basically has the same features as in the previous embodiment. However, in the previous embodiment, the storage capacitor electrode 42 was substantially at the center of the pixel electrode 18, whereas in this embodiment the storage capacitor electrode 42 overlaps the gate bus line 12 at the end of the pixel electrode 18. Formed in position. The storage capacitor electrode 42 is formed as the same material layer as the drain bus line 14, and is connected to the pixel electrode 18 through a contact hole 44 provided in the passivation film 34. In this case, the storage capacitor electrode 42 is formed so as not to interfere with the element isolation hole 50.
[0020]
FIG. 7 is a view showing an embodiment of the present invention, and shows a state in an etching process for forming the pixel electrode 18. The principle of this embodiment can be applied to the thin film transistor substrate 10 similar to the embodiment of FIGS. 1 to 6, or can be applied to other thin film transistor substrates in which the channel protective film 26 is formed using a photomask. Can.
[0021]
In FIG. 7, the thin film transistor substrate 10 includes an active matrix, and the thin film transistor 16 includes a gate electrode 20, a gate insulating film 22, a semiconductor film 24, a channel protective film 26, an ohmic contact layer 28, and a drain electrode. 30 and a source electrode 32. The pixel electrode 18 is connected to the source electrode 32 through a contact hole provided in the passivation film 34. In FIG. 7, the drain electrode 30 and the source electrode 32 (and the drain bus line) have a three-layer structure of titanium, aluminum, and titanium.
[0022]
In FIG. 7, a material layer of the pixel electrode 18 made of ITO is formed on the passivation film 34, and a photomask 60 for forming the pixel electrode 18 in a predetermined shape is formed, and is immersed in an etchant 62. It shows where it is. An ultrasonic generator 64 is attached to the etching tank, and etching is performed while vibrating the etchant 62 at an ultrasonic frequency of 30 to 35 KHz or higher. The etchant 62 is maintained at a temperature of 50 ° C. or lower.
[0023]
One of the features of this embodiment is that the material layer of the pixel electrode 18 is formed in an amorphous state. In order to form the material layer of the pixel electrode 18 in an amorphous state, it has been confirmed that ITO may be sputtered while injecting water or oxygen at room temperature (a state where it is not heated specially).
[0024]
Next, when forming the photomask 60, it is necessary to perform the resist post-baking temperature after the exposure and etching below the temperature at which the material layer of the pixel electrode 18 transitions from the amorphous state to the crystalline state. It is. Since the transition point of crystallization of ITO is 150 to 200 ° C., it is preferable to perform post-baking of the photomask 60 at about 110 ° C. In this way, the photomask 60 is maintained in an amorphous state until it is etched.
[0025]
Next, the etching is performed with an organic acid. The preferred etchant 62 is oxalic acid, and other organic acids having a carboxylic group (—COOH) such as malonic acid, maleic acid, citric acid, acetic acid, salicylic acid, mulkylacetic acid, and the like, and derivatives thereof can also be used. By using the etchant 62 made of an organic acid, the pixel electrode 18 can be etched with high selectivity with respect to the underlying layer, and the passivation film 34 and the drain bus line 14 that are the underlying layer can be damaged. As a result, aluminum that can realize low resistance can be used for the drain bus line 14.
[0026]
Further, when etching, etching is performed on the amorphous ITO while maintaining the temperature of the etchant 62 made of an organic acid at 50 ° C. or less. It was found that the pixel electrode 18 can be patterned with a shape that is almost the same. For this reason, the etching process can be carried out more smoothly, and the influence on the underlying layer becomes smaller.
[0027]
Further, heat treatment is performed to bring the amorphous pixel electrode 18 into a crystalline state after etching. As described above, since the transition point of crystallization of ITO is 150 to 200 ° C., heat treatment was performed at 200 ° C. in the examples. Thereby, the pixel electrode 18 with excellent quality could be formed.
The liquid crystal display device is manufactured using the above-described method for manufacturing a thin film transistor substrate.
[0028]
【The invention's effect】
As described above, according to the present invention, the manufacturing process can be simplified, or the pixel electrodes can be reliably formed with high throughput.
[Brief description of the drawings]
FIG. 1 is a plan view showing a thin film transistor substrate according to an embodiment of the present invention.
2 is a cross-sectional view taken along line II-II in FIG.
FIG. 3 is a cross-sectional view taken along line III-III in FIG.
4 is a diagram showing a manufacturing procedure of the thin film transistor substrate of FIG. 1. FIG.
FIG. 5 is a diagram for explaining characteristics of element isolation holes;
FIG. 6 is a plan view showing a thin film transistor substrate according to an embodiment of the present invention.
FIG. 7 is a diagram showing etching of a thin film transistor substrate according to an embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Thin-film transistor substrate 12 ... Gate bus line 14 ... Drain bus line 16 ... Thin-film transistor 18 ... Pixel electrode 24 ... Semiconductor film 26 ... Channel protective film 34 ... Passivation film (insulating film)
36: Contact hole 50 ... Element isolation hole

Claims (6)

  A gate bus line which is a first electrode layer formed on an insulating transparent substrate, a gate insulating film which is a first insulating layer formed on the gate bus line, and the gate crossing the gate bus line A drain bus line as a second electrode layer disposed on the insulating film, a thin film transistor disposed at an intersection of the gate bus line and the drain bus line, and a second insulating layer formed on the thin film transistor In a method of manufacturing a thin film transistor substrate, a transparent pixel electrode which is a third electrode layer formed on a protective film is electrically connected to the thin film transistor through a contact hole formed in the second insulating film A step of forming the transparent pixel electrode material layer in an amorphous state; and a step of etching the transparent pixel electrode material layer with an organic acid. When a thin film transistor substrate manufacturing method characterized by performing heat treatment of the transparent pixel electrode of the amorphous state after etching to a crystalline state. 2. The method of manufacturing a thin film transistor substrate according to claim 1 , wherein Al is contained in at least one material of the first or second electrode. The organic acid is oxalic acid, a method of manufacturing the thin film transistor substrate according to claim 1 or 2. Applying ultrasonic during etching, a method of manufacturing the thin film transistor substrate according to one of claims 1 3, characterized by maintaining the temperature of the etching solution at 50 ° C. or less. A pixel electrode of almost the same pattern with no photomasks side etching method of manufacturing a thin film transistor substrate according to one of claims 1 4. The liquid crystal display device manufactured by the manufacturing method of the thin film transistor substrate according to one of claims 1 5.

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