JP3894640B2 - Wiring board manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a wiring board and a semiconductor device, and more particularly to a method of manufacturing a wiring board capable of high-density mounting and a semiconductor device using the wiring board.
[0002]
[Prior art]
In recent years, wiring boards for mounting semiconductor elements (or semiconductor devices) have been required to have a compact and highly functional mounting circuit. In response to this requirement, high-density wiring or fine wiring is required. Is underway. That is, when mounting electronic components such as semiconductor elements at a high density, a short connection wiring length between electronic components and a high-density wiring network are required. For this reason, it is inevitably desired to make the connection pads finer or finer pitches.
[0003]
By the way, this type of high-density mounting wiring board is generally used as a base wiring base material with a thick film multilayer wiring board made of ceramics as an insulator, and is used on the surface of this base wiring base material by so-called thin film technology. A wiring board on which a thin film wiring layer is formed by repeatedly applying photolithographic technology and insulating varnish coating / drying or baking operations is used.
[0004]
However, if the base wiring substrate is ceramic, surface smoothness
Since it is difficult to ensure (flatness), there is a limit to high-density wiring or fine-pitch wiring in the thin film wiring layer as a result. In addition, the lack of flatness on the surface of the wiring board makes it difficult to mount, position accuracy, and secure bonding of flip chips, for example. There is an inconvenience that it cannot be achieved.
[0005]
On the other hand, in consideration of versatility, it is desired that the product can be manufactured at a relatively low cost and with a high yield in mass production. From such a point of view, for example, a general multilayer wiring board having glass / epoxy resin as an interlayer insulator is used as a base wiring base, and the surface of the base wiring base is made of a photolithographic technique and an insulating varnish used in so-called thin film technology. Attempts have been made to use a wiring board on which a thin film wiring layer is formed by repeating coating, drying or baking operations.
[0006]
[Problems to be solved by the invention]
However, in the case of a base substrate using the above glass / epoxy resin or the like as an interlayer insulator, there are the following problems due to manufacturing restrictions. That is, a general multilayer wiring board (base wiring substrate) has a hole for connection (through hole) formed in an interlayer insulator layer in order to electrically connect wiring pattern layers, and the inner wall surface of the hole. In addition, an electroless copper plating process involving complicated processes is applied to form a conductor layer on the inner wall surface of the hole. Therefore, when manufacturing the wiring board, it is configured to avoid wiring and mounting at least on the surface of the through hole drilling region.
[0007]
In other words, when the thin film wiring layer is formed by repeating the photolithography technique and the application / drying / baking operation of the insulating varnish on the surface of the base wiring substrate, it is necessary to apply wiring to the surface excluding the through hole drilling region. There is.
[0008]
In addition, the formation of the connection through hole at this time is set as small as possible, but from the viewpoint of ensuring the reliability of electrical connection, the degree of miniaturization is the wiring pitch 150-200μm, the through hole diameter 300μm However, this is the limit (in this case, the pitch of the drill holes is about 600 to 700 μm), which is not sufficient in terms of high-density mounting and high-density wiring. When forming the thin film wiring layer on the base substrate, it is also necessary to pre-fill the through hole of the base substrate with an insulating resin or a conductive resin.
[0009]
On the other hand, in order to make a flat conductor circuit (wiring pattern) surface, a structure in which an interlayer connection portion is formed by filling a conductor is known (Japanese Patent Laid-Open No. 6-314883). That is, a hole for forming an interlayer connection is formed at a required position of the interlayer insulating layer, an electroless plating layer is grown in the perforation, and the inside of the perforation is entirely filled, so that the main surface is entirely Means for flattening are known.
[0010]
However, since the formation of the connection through hole by the electroless plating process is premised on the drilling work for the interlayer insulator layer and the complicated plating process, the productivity of the base wiring substrate and the connection reliability are only inferior. In addition, since there is a limit to miniaturization of wiring and the like, it cannot be said that it is a practically satisfactory means.
[0011]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method of manufacturing a wiring board capable of high-density mounting and having high reliability such as connection, and a semiconductor device using the wiring board. .
[0012]
[Means for Solving the Problems]
The invention of claim 1 has a front surface and a back surface, and includes a wiring pattern on at least the front surface. Of the surface Wiring pattern Connection terminals with other wiring patterns through an insulator layer Continuity Let Wiring interlayer connection Said Consists of interlayer connection conductor with insulating layer inserted by pressure Have multiple layers of wiring patterns A step of preparing a base wiring substrate and the base wiring substrate; On the wiring pattern on the surface of Providing an insulating resin layer; A region corresponding to the connection terminal of the insulating resin layer Incineration removal by selective laser light irradiation Forming an opening exposing the connection terminal; Process, and Inner wall surface of the opening Insulating resin layer containing Table The surface is subjected to electroless plating, Connecting terminal A method of manufacturing a wiring board, comprising: a step of forming a conductive plating layer electrically connected to the substrate; and a step of wiring patterning the conductive plating layer.
[0013]
In this wiring board manufacturing method, it is desirable that the surface of the insulating resin layer is roughened as a pretreatment for the electroless plating treatment.
[0014]
The invention of claim 2 has a front surface and a back surface, and has a wiring pattern on at least the surface, Of the surface Wiring pattern Connection terminals with other wiring patterns through an insulator layer Continuity Let Wiring interlayer connection Said Consists of interlayer connection conductor with insulating layer inserted by pressure Have multiple layers of wiring patterns A step of preparing a base wiring substrate; and Surface wiring pattern A step of bonding and integrating a conductor layer via an insulating resin layer; The region corresponding to the connection terminal of the insulating resin layer is exposed by etching the conductor layer. A step of patterning a resist on the conductor layer, and using the patterned resist as a mask Said Selectively etching the conductor layer; Said Exposed by etching conductor layer A region corresponding to the connection terminal of the insulating resin layer is selectively selected. Laser light irradiation By Remove by incineration Forming an exposed opening of the connection terminal; Process, and Inner wall surface of the opening An electroless plating treatment is applied to the conductor layer and the Connecting terminal A method of manufacturing a wiring board, comprising: a step of forming a conductive plating layer that is electrically connected to each other; and a step of patterning the conductor layer.
[0015]
The invention of claim 3 is the method of manufacturing a wiring board according to claim 2, Said The conductor layer is copper or a copper alloy.
[0016]
According to a fourth aspect of the present invention, in the method for manufacturing a wiring board according to any one of the first to third aspects, Said Not required by vacuum drying before electroless plating Residue It is characterized by removing.
[0017]
In the method for manufacturing a wiring substrate according to the invention of claim 4, the vacuum drying treatment is preferably chemical dry etching, reactive ion etching, or reverse sputtering.
[0018]
Further, in the method for manufacturing a wiring board according to any one of claims 1 to 5, the interlayer connection conductor having the layered insulating layer inserted by pressurization is a conductive composition containing silver powder, copper powder It is preferable to form the conductive composition containing copper, metallic copper, or solder. The insulating resin layer is preferably formed of an epoxy resin or an epoxy resin composition.
[0019]
A semiconductor device using the method for manufacturing a wiring board of the present invention is, for example, A semiconductor device comprising a wiring board and a semiconductor element mounted and mounted on the wiring board surface, wherein the wiring board has a front surface and a back surface, and has a wiring pattern on at least the front surface. A wiring interlayer connection portion for connecting a connection terminal in the wiring pattern with another wiring pattern through an insulator layer is composed of an interlayer connection conductor in which the insulator layer is inserted under pressure. And a base wiring substrate having an insulating resin provided on a wiring pattern on the surface of the base wiring substrate and having an opening formed by incineration removal by selective laser light irradiation in a region corresponding to the connection terminal A wiring pattern formed on the insulating resin layer, a wiring pattern formed on an inner wall surface of the opening of the insulating resin layer, and a connection terminal for connecting the connection terminal. A semiconductor device characterized by having a sexual plating layer.
[0020]
In each of the above inventions, examples of the insulating layer between the wiring pattern layers of the base wiring substrate include, for example, a thermoplastic resin sheet, a thermosetting resin (prepreg) sheet held in a state before curing, and the thickness thereof. Is preferably about 40 to 800 μm. Here, examples of the thermoplastic resin sheet include sheets such as polycarbonate resin, polysulfone resin, thermoplastic polyimide resin, tetrafluoropolyethylene resin, hexafluoropolypropylene resin, and polyetherketone resin. In addition, as a thermosetting resin (prepreg) sheet held in a state before curing, epoxy resin, bismaleimide triazine resin, polyimide resin, phenol resin, polyester resin, melamine resin, butadiene rubber, butyl rubber, natural Examples thereof include raw rubber sheets such as rubber, neoprene rubber and silicone rubber.
[0021]
These resins may be used alone or may contain an insulating inorganic or organic filler, and are further combined with a reinforcing material such as glass cloth, mat, organic synthetic fiber cloth or mat, or paper. It may be a sheet.
[0022]
In the base wiring substrate of each of the above inventions, the interlayer connection conductor that penetrates the interlayer insulator layer by pressurization and electrically connects the opposing wiring patterns is a conductive composition or a conductive metal. It can be formed and arranged by such means. For example, a projection (columnar body) having a high aspect ratio is formed at a predetermined position of a copper foil or a wiring pattern by a printing method using a relatively thick metal mask. The height, diameter, and distribution of the protrusions or columnar bodies are appropriately set according to the configuration of the through-type conductor wiring portion to be formed.
[0023]
Specifically, it is determined in consideration of the arrangement and structure of the through-type interlayer connection portion to be finally configured. For example, if the synthetic resin sheet is a B-stage epoxy resin layer containing glass cloth, when it is pressed from both sides, it is about 80 to 200% of the thickness of the B-stage epoxy resin layer, and pressed from one side. A height of about 180 to 400% of the B-stage epoxy resin layer thickness is preferable.
[0024]
The protrusions (columnar bodies) are arranged, for example, at a predetermined position of a stainless steel plate having a thickness of about 5 mm with a mask having a 0.3 mm hole formed on the front surface of the housing, and the conductive material housed in the housing. It is formed by, for example, a stamp method in which a composition (paste) is pressed and extruded from a hole in a mask.
[0025]
Here, the conductive composition (paste) is prepared, for example, by mixing conductive powder such as silver, gold, copper, solder powder, alloy powder or composite (mixed) metal powder, and resin binder component. Pasted pastes. Examples of the resin binder component generally include thermoplastic resins such as polycarbonate resin, polysulfone resin, polyester resin, and phenoxy resin, and thermosetting resins such as phenol resin, polyimide resin, and epoxy resin.
[0026]
Other acrylic esters such as methyl methacrylate, diethyl methyl methacrylate, trimethylol propane triacrylate, diethylene glycol diethyl acrylate, methyl acrylate, ethyl acrylate, diethylene glycol ethoxylate acrylate, ε-caprolactone modified dipentaerythritol acrylate, Examples thereof include ultraviolet curable resins such as methacrylic acid esters and electron beam irradiation curable resins.
[0027]
In the manufacturing process, the base wiring substrate according to each of the above inventions has conductive protrusions.
A laminated body formed by sequentially laminating and arranging an insulator layer and a conductor layer (conductor foil) on the support base surface on which the (columnar body) is formed is heated, pressurized, and integrated. At this time, use metal plates or heat-resistant resin plates with small dimensions and deformation, such as stainless steel plates, brass plates, polyimide resin plates (sheets), polytetrafluoroethylene resin plates (sheets), etc., as backing plates on both sides. However, it is desirable to make a base wiring substrate that exhibits a smoother surface.
[0028]
In addition, when the laminate is pressed in a state where the resin component of the insulator layer is softened by heating, the conductive protrusions (columnar bodies) can easily penetrate the insulator layer.
[0029]
The formation of the stacked layer according to each of the above inventions is performed by a method combining a normal printed wiring board manufacturing process, a general thin film process, and a laser processing technique. For example, multilayer press technology and plating technology are used in the manufacturing process of printed wiring boards, and photolithographic technology and vacuum drying (vacuum drying) processing technology are used in thin film processes. Interlayer connection to the stacked layers Laser processing technology or the like is used to form the holes.
[0030]
Moreover, it is desirable that the surface conductor pattern of the base wiring substrate according to each of the above inventions has a conductor pattern (preferably mesh shape) on almost the entire surface except for the connection terminal (or connection pad) portion to the stacked layer. In other words, the surface of the base wiring substrate can be smoothed by forming a mesh pattern or the like in addition to the connection terminals. In addition, when a semiconductor element is mounted and mounted, the electrical characteristics of the stacked signal wiring can be controlled as the speed of the semiconductor element is increased by handling the mesh pattern as a reference plane (stable potential). High performance is achieved.
[0031]
Further, when the mesh pattern or the like is arranged on the base wiring substrate surface, the ground capacity of the signal wiring in the stacked layer can be reduced, so that the stacked layer can be made thin, and the material cost is reduced. Costs can be reduced.
[0032]
According to the first to fourth aspects of the present invention, the high-density wiring, the fine pitch wiring, and the interlayer connection of the wiring board can be easily miniaturized, the base wiring substrate has good flatness of the main surface, and the through-hole connecting portion. Since the notches (holes) to be formed are not exposed, the main surface can be used as a wiring area or a mounting area as a whole. In other words, along with the good flatness of the base wiring substrate, the wiring pattern of the stacked layer formed on the surface can be easily miniaturized, and it becomes easy to ensure the reliability of mounting and connection. Functions as a wiring board for high-density mounting.
[0033]
By using the method for manufacturing a wiring board of the present invention, Combined with the ease of securing the mounting / connection reliability on the wiring board, it is possible to provide a compact, high-performance mounting circuit-like semiconductor device with a high yield.
[0034]
DETAILED DESCRIPTION OF THE INVENTION
The embodiment will be described below with reference to FIGS. 1, 2 (a) to (g) and FIGS. 3 (a) to (e). Example 1
FIG. 1 is a cross-sectional view showing the main configuration of a base substrate used in the manufacture of a wiring board according to this embodiment. In FIG. 1, reference numeral 1 denotes a base wiring substrate, a wiring pattern layer 3 disposed via an interlayer insulator layer 2, and an interlayer connection that penetrates the interlayer insulator layer 2 and electrically connects the wiring patterns 3 to each other. The structure has a portion 4. Here, the interlayer insulator layer 2 is, for example, a glass / epoxy resin system, and the wiring pattern 3 is, for example, a pattern of copper foil. Furthermore, the interlayer connection portion 4 is a conductive composition containing silver powder dispersed in, for example, an epoxy resin as a binder, and presses and penetrates the interlayer insulator layer 2 to electrically connect the wiring patterns 3 to each other. ing.
[0035]
Next, an embodiment of this embodiment will be described with reference to FIGS.
[0036]
First, a conductor layer (copper foil) 6 having a thickness of about 12 μm is laminated on one main surface of the base wiring substrate 1 having the structure shown in FIG. 1 with an insulator layer 5 having a thickness of about 30 μm. In accordance with a typical manufacturing process of a wiring board, pressure integration is performed as shown in a sectional view in FIG. Here, the insulator layer 5 is, for example, an epoxy resin, a polyimide resin, or the like, and is applied to one main surface of the copper foil 6 with a substantially uniform thickness. The copper foil 6 is preferably as thin as possible, and a copper foil with a resin film (layer) commercially available for printed wiring boards can be used.
[0037]
After the copper foil 6 is laminated and integrated with the base wiring board 1, an opening for forming an electrical connection portion between the connection terminal or pattern (not shown) on the surface of the base wiring substrate 1 and the copper foil 5 is formed. In order to provide the portion, patterning 7 is performed with a photosensitive resist on the surface of the copper foil 6 forming the integrated conductor layer, as shown in a cross-sectional view in FIG. Here, examples of the photosensitive resist to be patterned 7 include a novolak resin-based liquid resist, a dry film, and an electrodeposition resist, but most resists can be used. Further, the diameter of the opening 7a by the resist patterning 7 is appropriately selected depending on the thickness of the insulator layer 5, the thickness of the copper foil 6, or the necessary current density, for example, 50 μm.
[0038]
Next, the copper foil 6 subjected to the resist patterning 7 is etched, and the exposed surface (opening 7a portion) is selectively etched away. Here, as the etchant, for example, an aqueous solution such as copper chloride or iron chloride can be used, but it is not particularly limited as long as copper can be etched. Thereafter, the resist pattern 7 is removed as shown in cross section in FIG.
[0039]
Next, a part of the copper foil 6 which is selectively removed by etching is used as a mask, laser light is used (laser light irradiation), and as shown in a sectional view in FIG. Selectively incinerate and remove the exposed areas. By selective incineration / removal of the insulator layer 5, a part of the insulator layer 5 is opened 5a, and the connection terminal or pattern on the surface of the base wiring substrate 1 is exposed. Here, the laser beam to be irradiated includes, for example, a carbon dioxide laser, a YAG laser, and the like, and is determined by the components of the insulator layer 5 and the material of the base (a connection terminal or connection pad of the base substrate).
[0040]
In addition, after the selective incineration / removal of the insulator layer 5 by the laser light, if necessary, for example, by dry etching such as an ashing method using oxygen plasma, a chemical dry etching method, a reactive ion etching method, a reverse sputtering method, It is desirable to remove the resin remaining at the bottom of the hole (opening) 5a formed by incineration / removal of the insulator layer 5.
[0041]
After forming an opening (hole) 5a communicating with the base wiring board in the insulator layer 5, an electroless copper plating layer 8 is formed on the copper foil 6 including the opening (hole) 5a. Here, the thickness of the electroless copper plating layer 8 is set to about 10 μm, for example, but the reliability, the thickness of the insulator layer 5 and the copper foil 6, the controllability of the copper plating layer thickness, the pattern of the plating layer 8, and the like. It can be changed and set arbitrarily according to the ease of operation.
[0042]
In this embodiment, the entire surface is plated with copper, but in some cases, only the opening (opening hole) 5a region including the periphery may be electrolessly plated. For example, the copper plating layer 8 may be formed only on a necessary portion by using masking by the resist pattern 7 or the like. At this time, if the surface to be plated in the region of the opening (opening hole) 5a is rough, the adhesion strength of the plating film can be increased. When the copper plating layer 8 is selectively formed in this way, the thickness other than the opening of the copper foil 6 is not built up, which is advantageous in forming a fine pattern.
[0043]
Next, as shown in cross section in FIG. 2 (f), a resist patterning pattern 9 for forming a desired conductor pattern is formed on the surface of the copper plating layer 8 including the copper plating layer 8 built up on the copper foil 6. Do. Here, the resist patterning 9 is performed similarly to the case of forming the resist pattern 7 in the selective etching of the copper foil 6.
[0044]
After the resist patterning 9, using the resist pattern 9 as a mask, the copper plating layer 8 and the copper foil 6 are selectively etched to obtain a wiring substrate 10 as shown in cross section in FIG. The selective etching here is performed in the same manner as in the selective etching of the copper foil 6.
[0045]
In the manufactured wiring board, the surface wiring layer formed by the thin insulating layer 5 and the thin wiring pattern electrically connected to the surface of the base wiring substrate 1 is integrally formed on the surface of the base wiring substrate 1 having good flatness. Is provided. Here, the formation of a thin surface wiring layer means that the interlayer connection portion between this surface wiring layer and the base wiring substrate 1 side can be miniaturized, and in combination with the flatness of the surface, High-density mounting is possible by increasing the density and miniaturizing and increasing the density of the connection pads.
[0046]
That is, the fact that the insulator layer constituting the surface wiring layer is thin enables fine drilling by a laser beam and the like, facilitates the miniaturization of the interlayer connection portion, and forms the wiring pattern of the surface wiring layer. The thinness facilitates the fine patterning of the conductor layer. These mutual actions result in the formation of a high-density wiring pattern network or fine electrical connection with semiconductor elements (including bare chips), which is suitable for highly reliable high-density mounting. Function as.
[0047]
In the above embodiment, as shown in FIG. 3, the base wiring substrate is provided with a conductor pattern (preferably mesh) 1b on almost the entire surface except for the connection terminal (or connection pad) portion region 1a on the surface. In the case of having the configuration, the surface of the base layer 1 is smoothed by arranging the mesh pattern 1b and the like in addition to the connection terminals. In addition, when a semiconductor element is mounted / mounted, the electrical characteristics of the stacked signal wiring can be controlled by increasing the speed of the semiconductor element by treating the mesh pattern 1b as a reference plane (stable potential). The performance of the device is improved.
[0048]
Example 2
4A to 4E are cross-sectional views schematically showing an embodiment of a method for manufacturing a wiring board according to a second embodiment. In this embodiment, first, as shown in FIG. 4A, an insulator layer 5 made of an insulating resin is formed on one main surface of the base wiring substrate 1. Here, the components of the insulating resin forming the insulator layer 5 are the same as those in the first embodiment, and the thickness of the insulator layer 5 is also selected in the same manner.
[0049]
The formation of the insulator layer 5 includes, for example, a coating / drying method, a printing / drying method, a transfer method, and the like. Generally, the thickness of the insulator layer 5 to be formed increases in the order of the forming method. Therefore, it can select suitably.
[0050]
Next, the insulating layer 5 region corresponding to the position to be connected to the connection terminal or pattern (not shown) on the surface of the base wiring substrate 1 is selectively irradiated with a laser beam to insulate the irradiation region of the laser beam. The body layer 5 is selectively incinerated and removed, and connection holes are formed (opened) in the insulator layer 5 as shown in FIG. Here, the laser light is the same as in the first embodiment, and for example, a carbon dioxide laser, a YAG laser, or the like is used, and the opening (drilling) is, for example, a method using a laser light mask, a prism, or the like. The method of drawing directly using is used.
[0051]
Thereafter, the electroless plating process of copper including the opening 5a is performed on the surface of the insulating layer 5 having the opening (drilled), and copper is grown to a desired thickness as shown in FIG. 4 (c). A conductor layer 6 'is formed. This electroless plating process is the same as in the case of Example 1. However, in this example, if only the opening and its periphery are electrolessly plated, a surface conductor pattern cannot be formed. A copper plating layer 6 'is formed. In addition, in the electroless copper plating process, it is preferable to subject the insulator layer 5 to a surface treatment (for example, to roughen the surface) prior to the electroless copper plating process.
[0052]
Next, in order to make the formed copper plating layer 6 'into a desired conductor pattern, resist patterning 9 is performed as shown in FIG. 4D, and the electroless copper plating layer 6 using the resist pattern 9 as a mask. The etching process of ′ is performed according to the case of the first embodiment, and the wiring board 10 as shown in FIG.
[0053]
Further, the conductor pattern of the surface layer can be formed by the following means. That is, the process is the same up to the drilling (opening) for connection by selective incineration / removal of the insulator layer 5, but thereafter, regions other than the required conductor pattern forming part are subjected to resist patterning. Next, after performing an electroless copper plating process, the resist pattern is swelled and dissolved and peeled off, and a required conductor pattern remains, and an unnecessary copper plating layer is removed together with the resist pattern.
[0054]
In the case of this embodiment, the manufacturing process can be shortened or simplified as compared with the case of the first embodiment. Also, in the case of this wiring board, as in the case of Example 1, it is formed on the base wiring base material surface having good flatness with a thin insulating layer and a thin wiring pattern electrically connected to the base base material surface. A surface wiring layer is integrally provided.
[0055]
As the thin surface wiring layer is formed, the interlayer connection between the surface wiring layer and the base wiring substrate surface side can be miniaturized. High-density mounting is possible by miniaturization and high-density connection pads. For example, a semiconductor device (or mounting circuit device) configured by mounting and mounting a semiconductor element (including a bare chip) on a surface wiring layer of the wiring board by a conventional means is a compact and highly reliable device. there were.
[0056]
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the invention. For example, the configuration of the base substrate, that is, the number of wiring pattern layers and the interlayer insulator The material of the layer can be appropriately selected according to the use of the wiring board.
[0057]
【The invention's effect】
According to the first to fourth aspects of the present invention, along with the good flatness of the base substrate, the wiring pattern of the stacked layer formed on the surface can be easily miniaturized, and the mounting / connection reliability can be improved. It is possible to easily manufacture a wiring board that can be easily secured. That is, high-density wiring, fine pitch wiring, and interlayer connection can be easily miniaturized, and the base substrate has good flatness of the main surface, and notches (holes) that form through-hole connections are exposed. Therefore, it is possible to provide a wiring board whose main surface can be used as a wiring area or a mounting area as a whole.
[0058]
When manufacturing a semiconductor device using the method for manufacturing a wiring board of the present invention, Since a wiring board suitable for high-density mounting is used, a compact, high-performance and high-reliability semiconductor device is provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a main configuration of a base wiring substrate used in an example.
FIG. 2 (a), (b), (c), (d), (e), (f), (g) are cross sections schematically showing the embodiment of the first embodiment in the order of steps. Figure.
FIG. 3 is a top view showing a main configuration of another base wiring substrate.
4 (a), (b), (c), (d), and (e) are cross-sectional views schematically showing the embodiment of the second embodiment in the order of steps.
[Explanation of symbols]
1 …… Base wiring substrate
1a …… Base wiring substrate connection terminal area
1b ...... Mesh pattern on base wiring substrate surface
2. Interlayer insulator layer
3. Wiring pattern layer
4 …… Interlayer connection
5 …… Insulator layer
6,6 '…… Copper foil (conductor layer)
7, 9 ... Resist pattern (resist patterning)
7a …… Open
8 …… Copper plating layer
10 …… Wiring board

Claims (4)

A wiring interlayer connection portion that has a front surface and a back surface, has a wiring pattern on at least the front surface, and connects a connection terminal in the wiring pattern on the surface with another wiring pattern through the insulating layer, adds the insulating layer. A step of preparing a base wiring substrate having a plurality of layers of wiring patterns composed of interlayer connection conductors inserted by pressure; and
Providing an insulating resin layer on the wiring pattern on the surface of the base wiring substrate;
Forming an opening that exposes the connection terminal by burning and removing the region corresponding to the connection terminal of the insulating resin layer by selective laser light irradiation;
Performing electroless plating on the surface of the insulating resin layer including the inner wall surface of the opening, and forming a conductive plating layer electrically connected to the connection terminal;
Wiring patterning the conductive plating layer;
A method for manufacturing a wiring board, comprising: A wiring interlayer connection portion that has a front surface and a back surface, has a wiring pattern on at least the front surface, and connects a connection terminal in the wiring pattern on the surface with another wiring pattern through the insulating layer, adds the insulating layer. A step of preparing a base wiring substrate having a plurality of layers of wiring patterns composed of interlayer connection conductors inserted by pressure; and
On the wiring pattern on the surface of the base wiring substrate, a step of bonding and integrating a conductor layer via an insulating resin layer;
Patterning a resist on the conductor layer to expose a region corresponding to the connection terminal of the insulating resin layer by etching the conductor layer;
Selectively etching the conductor layer using the patterned resist as a mask;
A step of incinerating and removing a region corresponding to the connection terminal of the insulating resin layer exposed by etching of the conductor layer by selective laser light irradiation to form an opening that exposes the connection terminal;
Performing an electroless plating process on the inner wall surface of the opening, and forming a conductive plating layer that electrically connects the conductor layer and the connection terminal;
Wiring patterning the conductor layer;
A method for manufacturing a wiring board, comprising:   3. The method of manufacturing a wiring board according to claim 2, wherein the conductor layer is copper or a copper alloy.   The method for manufacturing a wiring board according to any one of claims 1 to 3, wherein unnecessary residues are removed by a vacuum drying process before the electroless plating process.

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