JP3889636B2 - Manufacturing method of semiconductor device and manufacturing method of liquid crystal display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device including a semiconductor element on a substrate, and a method for manufacturing a liquid crystal display device including a switching element for driving liquid crystal.
[0002]
[Prior art]
In recent years, a thin film transistor (hereinafter referred to as “TFT”) using a p-Si film formed on a transparent insulating substrate as a pixel driving element of an active matrix LCD (Liquid Crystal Display) as an active layer. Development) is underway.
[0003]
A polycrystalline silicon (Poly Silicon Thin Film: hereinafter referred to as “p-Si”) TFT is an a- having an amorphous silicon (hereinafter referred to as “a-Si”) film as an active layer. Compared to SiTFT, it has the advantage of high electric field mobility and high driving capability. Therefore, if p-SiTFT is used, a high-performance LCD can be realized, and not only the pixel unit but also the peripheral drive circuit are integrated on the same substrate. Can be formed.
[0004]
In such a p-Si TFT, in order to form a source region and a drain region in a p-Si film as an active layer, a heat treatment is performed for activation after ion implantation is performed in both regions.
[0005]
FIG. 13 is a process cross-sectional view of an activation process after ion implantation of a conventional source region and drain region.
[0006]
Step A (FIG. 13A): A gate electrode 2 made of a refractory metal is formed on an insulating substrate 1, and insulating thin films 3 and 4 and an a-Si film are formed on the gate electrode 2. . A p-Si film 6 is formed by melting and recrystallizing the a-Si film with a laser. Next, an SiO2 film is formed on the entire surface of the p-Si film 6, and a stopper 7 is formed by a photolithography technique and a dry etching technique. Ions are implanted into the p-Si film 6 using the stopper 7 as a mask. By doing so, the source region 6 s and the drain region 6 d are formed in the p-Si film 6.
[0007]
Thereafter, heat treatment is performed to activate the implanted ions.
[0008]
Examples of the heat treatment include an RTA method and a heating method using a heating furnace.
[0009]
RTA (Rapid Thermal Annealing) methods include a lamp RTA method using a lamp and a laser method, for example, an ELA (Excimer Laser Annealing) method using an excimer laser.
[0010]
In the ELA method, the beam size of the laser light is relatively small, about 0.5 mm × 150 mm, so that the throughput is small. In addition, since the oscillation wavelength is short, it is easily absorbed by the gate electrode material, and since the time width of the oscillation pulse is relatively short as 10 to 30 ns, the time during which the temperature of the film is raised is extremely short so that sufficient activation cannot be performed. . Since it is necessary to raise the temperature of the p-Si film in order to perform sufficient activation, it is easily affected by the material, size, and pattern density of the gate electrode. There is a possibility that the electrode is melted or blown off by ablation.
[0011]
In addition, when the RTA method using a lamp is used, the xenon arc lamp light having a relatively broad emission wavelength is used in a large beam having a width of 10 mm and a length of 400 mm or more. It is difficult to produce a difference in light absorption efficiency, and since the irradiation time is relatively long, it is not necessary to raise the temperature of the p-Si film as much as ELA. Therefore, the throughput is high and the gate electrode structure is not easily affected.
[0012]
However, when the semiconductor layer is activated by using the RTA method, since the irradiation beam size is large and the irradiation time is long, the temperature of the glass substrate on which the semiconductor layer is formed becomes very high. If it is too much, the substrate temperature at the light irradiated portion becomes high, and the temperature difference from the portion other than the irradiated portion becomes too large, causing a substrate crack due to thermal strain.
[0013]
[Problems to be solved by the invention]
Accordingly, the present invention has been made in view of the above-described conventional drawbacks, and provides a method for manufacturing a semiconductor device and a method for manufacturing a liquid crystal display device that prevent substrate cracking due to thermal distortion and has high throughput. Let it be an issue.
[0014]
[Means for Solving the Problems]
The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is heated by a semiconductor device formed on the substrate by an RTA method, and the heating temperature is different before the heat treatment of the substrate by the RTA method. The substrate is heated so that the temperature of the substrate is raised step by step by a plurality of preheating means set in the above.
[0015]
A method for manufacturing a semiconductor device according to claim 2 is the method for manufacturing a semiconductor device according to claim 1, wherein the plurality of preheating means are further provided with a plurality of preheating substrates set so that the temperature becomes higher in order. It is what.
[0016]
The method for manufacturing a semiconductor device according to claim 3 is the method for manufacturing a semiconductor device according to claim 1 or 2, further comprising cooling that is arranged so that the temperature is lowered stepwise after the heat treatment of the substrate by the RTA method. The substrate is sequentially cooled by means.
[0017]
The method for manufacturing a liquid crystal display device according to claim 4 is a method for manufacturing a liquid crystal display device in which a switching element for driving liquid crystal on a substrate is formed by an RTA method, and before the heat treatment of the substrate by the RTA method, A plurality of preheating means set to different heating temperatures are used to heat the substrate so that the temperature is raised stepwise.
[0018]
The method of manufacturing a liquid crystal display device according to claim 5 is the method of manufacturing a liquid crystal display device according to claim 4, wherein the plurality of preheating units are configured to have a plurality of preheatings set so that the temperature becomes higher in order. It is a substrate.
[0019]
The method for manufacturing a liquid crystal display device according to claim 6 is the method for manufacturing a liquid crystal display device according to claim 4 or 5, wherein the temperature is lowered stepwise after the heat treatment of the substrate by the RTA method. The substrate is sequentially cooled by a cooling means.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
<First Embodiment>
A method for manufacturing a semiconductor device and a method for manufacturing a liquid crystal display device according to the present invention will be described below.
[0021]
1 to 3 are sectional views showing the steps of the semiconductor device manufacturing method according to the present invention.
[0022]
Step 1 (FIG. 1A): A metal film 2 made of a refractory metal such as chromium (Cr) or molybdenum (Mo) is sputtered on an insulating substrate 1 made of quartz glass, non-alkali glass or the like. 1500 Å is formed and processed into a predetermined shape by using a photolithography technique and a dry etching technique by RIE (Reactive Ion Etching) method to form the gate electrode 2.
[0023]
Step 2 (FIG. 1B): An SiO2 film 3 and a SiN film 4 are formed as insulating thin films on the gate electrode 2 in this order using an atmospheric pressure CVD method or a low pressure CVD method at a formation temperature of 350 ° C., respectively. A film thickness of 1300 and 500 mm is formed. On the insulating thin film, a monosilane gas is thermally decomposed by a low pressure CVD method to form 400 a-Si films 5 at a temperature of 550 ° C. or lower.
[0024]
Step 3 (FIG. 1 (a)): The surface of the a-Si film 5 is irradiated with a KrF excimer laser beam while scanning and annealed to melt and recrystallize the a-Si film 5. A p-Si film 6 is formed.
[0025]
The laser irradiation conditions at this time are as follows: annealing atmosphere: 1E (−4) Pa or less, substrate temperature: room temperature to 600 ° C., irradiation energy density: 100 to 500 mJ / cm 2, scanning speed: 1 to 10 mm / sec (in practice, The scanning speed in the range of 0.1 to 100 mm / sec can be set).
[0026]
As the laser beam, an XeCl excimer laser with a wavelength λ = 308 nm may be used, or an ArF excimer laser with a wavelength λ = 193 nm may be used. The laser irradiation conditions at this time are as follows: annealing atmosphere: 1E (−4) Pa or less, substrate temperature: room temperature to 600 ° C., irradiation energy density: 100 to 500 mJ / cm 2, scanning speed: 1 to 10 mm / sec (actually Can set a scanning speed in the range of 0.1 to 100 mm / sec).
[0027]
Regardless of the laser beam mentioned above, the particle size of p-Si increases in proportion to the irradiation energy density and the number of irradiations, so the energy density is adjusted so that the desired particle size can be obtained. do it.
[0028]
In this embodiment, a high-throughput laser irradiation method is used for excimer laser annealing.
[0029]
In FIG. 5, 201 is a KrF excimer laser, 202 is a reflecting mirror that reflects the laser beam from the laser 201, and 203 is a laser beam control optics that processes the laser beam from the reflecting mirror 201 into a predetermined state and irradiates the substrate. It is a system.
[0030]
In such a configuration, the high-throughput laser irradiation method is a method in which a laser beam processed into a sheet (150 mm × 0.5 mm) by the laser beam control optical system 203 is irradiated by superimposing a plurality of pulses. Scanning and pulsed laser irradiation are completely synchronized, and the laser beam is irradiated with extremely high accuracy to increase the throughput.
[0031]
Step 4 (FIG. 1 (d)): A SiO2 film 7 is formed on the entire surface of the p-Si film 6 by CVD, and a resist film 8 is formed on the entire surface thereof. The resist film 8 is left only in a portion shielded by the gate electrode 2 by so-called self-aligned back exposure, which is exposed from one side (the lower direction in FIG. 1D).
[0032]
Step 5 (FIG. 2E): Then, the SiO2 film 7 in the region not covered with the resist film 8 is removed by a dry etching technique based on the RIE method to form a stopper 9 made of SiO2. This stopper 9 functions as a mask for shielding ions by ion doping when forming the LDD structure later.
[0033]
Using the stopper 9 as a mask, P-type or N-type ions are implanted into the p-Si film 6.
[0034]
That is, depending on the type of TFT to be formed, P-type or N-type ions are implanted into the p-Si film 6 not covered with the stopper 9.
[0035]
When forming a P-channel TFT, P-type ions such as boron (B) are implanted, and when forming an N-channel TFT, N-type ions such as phosphorus (P) are implanted. As a result, the portion of the p-Si film 6 that is the active layer covered with the stopper 9 becomes the channel region 6c, and the portions on both sides thereof become the source region 6s and the drain region 6d.
[0036]
Step 6 (FIG. 2F): Rapid annealing is performed by the RTA method using a lamp on the p-Si film 6 in which the source region 6s and the drain region 6d are formed.
[0037]
The impurity ions in the source region 6s and the drain region 6d are activated by annealing the substrate by the RTA method. Then, the p-Si film 6 is patterned in an island shape leaving a predetermined width on both sides of the stopper 9 and the gate electrode 2, and the TFTs are separated and independent. At this time, the p-Si film 6 and the SiO2 film 10 in the peripheral region are also removed at the same time.
[0038]
The rapid annealing by the RTA method using a lamp will be described.
[0039]
FIG. 6 shows a rapid annealing apparatus by the RTA method using the lamp of the present invention.
[0040]
As shown in the figure, a light source that emits sheet-like light is a pair of a xenon (Xe) arc lamp 301 and a reflecting mirror 302 provided so as to cover it. Is provided.
[0041]
The substrate 1 is transported at a transport speed of 15 mm / sec by a roller 303 from the right to the left in FIG. The substrate 1 is sequentially heated by first, second and third preheating (preheating) substrates 304, 305 and 306 that heat the substrate in advance. Each of the preheat substrates 304, 305, and 306 is set so that the preheat substrate temperature sequentially increases in order to prevent the substrate 1 from cracking due to thermal distortion. The temperature of each of these preheat substrates may be set to a temperature at which the substrate 1 is not distorted or cracked. Specifically, in this embodiment, the first preheat substrate 304 is set to 400 ° C., the second preheat substrate 305 is set to 480 ° C., and the third preheat substrate 306 is set to 580 ° C.
[0042]
After passing through the third preheat substrate 306, rapid annealing is performed by the xenon arc lamp (width 10 mm × length 400 mm) 301.
[0043]
The heating conditions by the RTA method at this time are light source: Xe arc lamp, atmosphere: N2, heating time: 0.5 to 1 second, and heating temperature is 650 ° C.
[0044]
After the RTA, the substrate 1 conveyed further to the right in the figure is once lowered to 580 ° C. by the auxiliary heat substrate 307 for preventing cracks due to rapid cooling of the substrate after rapid heating. Naturally cooled. Of course, as described above, after the RTA is performed as in the case before the RTA is performed, a plurality of cooling substrates 307, 308, and 309 whose temperatures are lowered stepwise are provided, and the substrates subjected to the RTA are sequentially transported by the transport roller 303. It is also possible to cool it. Specifically, the temperature of the first cooling substrate 307 immediately after the RTA is 580 ° C., the second cooling substrate 308 is 480 ° C., and the temperature of the next third cooling substrate 309 is 400 ° C. It may be set.
[0045]
Step 7 (FIG. 2G): An SiO 2 film 10 and a silicon nitride (SiN) film 11 are stacked on the p-Si film 6 by using the CVD method, and an interlayer composed of two layers of the SiO 2 film 10 and the SiN film 11 is formed. An insulating film 12 is formed. The thickness of the SiO2 film 10 is 500 mm, and the thickness of the SiN film 11 is 3000 mm. After forming the SiO 2 film 10 and the SiN film 11, heating is performed at 400 ° C. for 1 hour in a nitrogen atmosphere to introduce hydrogen ions contained in the SiN film 11 into the p-Si film 6. Thereby, the crystal defects in the p-Si film 6 are filled with hydrogen ions.
[0046]
Step 8 (FIG. 2H): A first contact hole 13 penetrating the interlayer insulating film 12 is formed so as to reach the p-Si layer 6 at a position corresponding to the source region 6s and the drain region 6d. A source electrode 14s and a drain electrode 14d made of a metal such as aluminum are formed in the first contact hole 13 portion. The source electrode 14s and the drain electrode 14d are formed, for example, by patterning sputtered aluminum on the SiN film 11 in which the first contact hole 13 is formed.
[0047]
Thus, a p-Si TFT which is a semiconductor element is formed.
[0048]
A liquid crystal display device using this p-Si TFT will be described below.
[0049]
FIG. 3 is a manufacturing process diagram illustrating a method for manufacturing a liquid crystal display device.
[0050]
A liquid crystal display device is manufactured by further adding the following steps to the p-Si TFT manufactured by the steps up to step 8 described above.
[0051]
Step 9 (FIG. 3I): The interlayer insulating film 12 on which the source electrode 14s and the drain electrode 14d are formed and the planarizing film 15 are formed on each electrode to planarize the surface. The flattening film 15 is formed by applying an acrylic resin solution and baking it to form an acrylic resin layer 26. The acrylic resin layer fills unevenness due to the stopper 9, the source electrode 14s, and the drain electrode 14d. The surface can be planarized.
[0052]
Further, a second contact hole 16 that penetrates the acrylic resin layer that is the planarizing film 15 is formed on the source electrode 14s, and the acrylic resin layer is connected to the source electrode 14s in the second contact hole 16 portion. A display electrode 17 extending upward is formed. The display electrode 17 is formed by laminating a transparent conductive film, for example, ITO (Indium Thin Oxide) on the planarizing film 15 in which the second contact hole 16 is formed, and a resist is formed on the transparent conductive film. After coating the film, a predetermined electrode pattern is formed, and the transparent conductive film exposed by dry etching, for example, RIE, is etched using HBr gas and Cl2 as etching gases.
[0053]
Step 10 (FIG. 3 (j)): An alignment film 18 made of polyimide, SiO2, or the like and orienting liquid crystal is formed on the display electrode 17 and the planarizing film 15 by a printing method or a spinner method.
[0054]
Thus, a TFT substrate on one side of the liquid crystal display device using the TFT for driving the liquid crystal as a switching element is completed.
[0055]
Next, FIG. 4 shows a partial cross-sectional view of the liquid crystal display device.
[0056]
As shown in the figure, a counter electrode 21 made of a transparent conductive film such as an ITO film is sequentially formed on a counter electrode substrate 20 which is an insulating substrate made of quartz glass or non-alkali glass, and then a liquid crystal is formed thereon. An alignment film 22 made of polyimide, SiO 2 or the like is formed.
[0057]
In this way, the counter electrode substrate 20 is provided at a position facing the TFT substrate 1 described above, and both are formed between the TFT substrate and the counter electrode substrate using the sealing agent 23 made of resin having adhesive properties around the TFT substrate and the counter electrode substrate. The substrates are bonded and the liquid crystal 24 is filled between the substrates to complete the liquid crystal display device.
<Second Embodiment>
The case where the semiconductor device manufacturing method and the liquid crystal display device manufacturing method of the present invention are used in a top gate type semiconductor device will be described below.
[0058]
7 and 8 show manufacturing process diagrams for explaining a method of manufacturing a semiconductor device according to the present invention.
[0059]
First, a method for manufacturing a semiconductor device will be described.
[0060]
Step 1 (FIG. 7A): An insulating thin film of SiO2 film 32 and SiN film 33 are formed in this order on an insulating substrate 31 made of quartz glass, non-alkali glass, or the like by using an atmospheric pressure CVD method or a low pressure CVD method. The film thickness is 1300 and 500 mm, respectively, at a forming temperature of 350 ° C. On the insulating thin film, monosilane gas is thermally decomposed by a low pressure CVD method to form 400 a-Si films 34 at a temperature of 550 ° C. or lower.
[0061]
Then, the surface of the a-Si film 34 is irradiated with a KrF excimer laser beam while scanning to perform annealing treatment, and the a-Si film 34 is melted and recrystallized to form a p-Si film. This p-Si film 35 becomes an active layer of the p-Si TFT.
[0062]
The laser irradiation conditions at this time are as follows: annealing atmosphere: 1E (−4) Pa or less, substrate temperature: room temperature to 600 ° C., irradiation energy density: 100 to 500 mJ / cm 2, scanning speed: 1 to 10 mm / sec (in practice, The scanning speed in the range of 0.1 to 100 mm / sec can be set).
[0063]
As the laser beam, an XeCl excimer laser with a wavelength λ = 308 nm may be used, or an ArF excimer laser with a wavelength λ = 193 nm may be used. The laser irradiation conditions at this time are as follows: annealing atmosphere: 1E (−4) Pa or less, substrate temperature: room temperature to 600 ° C., irradiation energy density: 100 to 500 mJ / cm 2, scanning speed: 1 to 10 mm / sec (actually Can set a scanning speed in the range of 0.1 to 100 mm / sec).
[0064]
Regardless of the laser beam mentioned above, the particle size of p-Si increases in proportion to the irradiation energy density and the number of irradiations, so the energy density is adjusted so that the desired particle size can be obtained. do it.
[0065]
Step 2 (FIG. 7B): A gate insulating film 36 made of SiO2 is formed on the entire surface of the p-Si film 35 by the CVD method, and the SiO2 film is dry etched by the photolithography technique and the RIE technique. The film and the p-si film are processed into a predetermined shape.
[0066]
Step 3 (FIG. 7 (c)): A metal film 37 made of a refractory metal such as chromium (Cr) or molybdenum (Mo) is formed on the gate insulating film 36 by a sputtering method to form a photolithography technique. Then, the gate electrode 37 is formed by processing into a predetermined shape using a dry etching technique by the RIE method.
[0067]
Simultaneously with the formation of the gate electrode, a gate signal line connected to the gate electrode and supplying a gate signal is also formed (not shown).
[0068]
P-type or N-type ions are implanted into the p-Si film 35 using the gate electrode 37 as a mask.
[0069]
That is, depending on the type of TFT to be formed, P-type or N-type ions are implanted into the p-Si film 35 not covered with the gate electrode 37.
[0070]
When forming a P-channel TFT, P-type ions such as boron (B) are implanted, and when forming an N-channel TFT, N-type ions such as phosphorus (P) are implanted. Thereby, in the p-Si film 17 under the gate electrode, the channel region 35c is directly below the gate electrode, and the portions on both sides of the gate electrode are the source region 35s and the drain region 35d.
[0071]
Step 5 (FIG. 8D) Then, rapid annealing is performed on the p-Si film 35 in which the source region 35s and the drain region 35d are formed by an RTA method using a lamp.
[0072]
As shown in FIG. 6 described above, the light source that emits sheet-like light is a pair of xenon (Xe) arc lamps and a reflector provided so as to cover the xenon (Xe) arc lamp. Is provided.
[0073]
The substrate is transported at a transport speed of 15 mm / sec by rollers from the right to the left in FIG. The substrate is sequentially heated by first, second and third preheating (preheating) substrates that heat the substrate in advance. Each of these preheat substrates is set so that the preheat substrate temperature sequentially increases in order to prevent cracking due to cooling of the substrate. Specifically, the first preheat substrate is set to 400 ° C., the second preheat substrate is set to 480 ° C., and the third preheat substrate is set to 580 ° C.
[0074]
After passing through the third preheat substrate, rapid annealing is performed by the arc xenon lamp (width 10 mm × length 400 mm).
[0075]
The heating conditions by the RTA method at this time are light source: Xe arc lamp, atmosphere: N2, heating time: 0.5 to 1 second, and heating temperature is 650 ° C.
[0076]
After the RTA is applied, the substrate conveyed further to the right in the figure is naturally cooled after being heated to 580 ° C. with an auxiliary heat substrate to prevent cracking due to rapid substrate cooling after rapid heating. Is done. Of course, as described above, it is also possible to provide a plurality of substrates whose temperatures are lowered stepwise in the same manner as before the RTA and cool them in order.
[0077]
By annealing the substrate by the RTA method, impurity ions in the source region 35s and the drain region 35d are activated.
[0078]
Step 6 (FIG. 8E): Thereafter, a SiO 2 film 38 and a SiN film 39 are stacked on the entire surface of the substrate including the p-Si film 35 by using the CVD method, and the two layers of the SiO 2 film 38 and the SiN film 39 are formed. An interlayer insulating film is formed. The thickness of the SiO2 film 38 is 500 mm, and the thickness of the SiN film 39 is 3000 mm. After the SiO 2 film 38 and the SiN film 39 are formed, heating is performed at 400 ° C. for 1 hour in a nitrogen atmosphere to introduce hydrogen ions contained in the SiN film 38 into the p-Si film 35. Thereby, the crystal defects in the p-Si film 25 are filled with hydrogen ions.
[0079]
Step 7 (FIG. 8F): A first contact hole 40 penetrating the interlayer insulating film is formed at a position corresponding to the source region 35s and the drain region 35d so as to reach the p-Si layer 35. A source electrode 41 s and a drain electrode 41 d made of a metal such as aluminum are formed in the first contact hole 40 portion. The source electrode 41s and the drain electrode 41d are formed by, for example, patterning sputtered aluminum on the SiN film in which the first contact hole 40 is formed.
[0080]
Thus, a p-Si TFT which is a semiconductor element is formed.
[0081]
A liquid crystal display device using this p-Si TFT will be described below.
[0082]
FIG. 9 is a manufacturing process diagram illustrating a method for manufacturing a liquid crystal display device.
[0083]
A liquid crystal display device can be manufactured by further adding the following steps to the p-Si TFT manufactured by the steps up to step 7 described above.
[0084]
Step 8 (FIG. 9): A flattening film is formed on the interlayer insulating film on which the source electrode 41s and the drain electrode 41d are formed and on each electrode to flatten the surface. The flattening film 42 is formed by applying an acrylic resin solution and baking to form an acrylic resin layer. The acrylic resin layer 26 fills the unevenness caused by the gate electrode 37, the source electrode 41s, and the drain electrode 41d. To flatten the surface.
[0085]
Further, a second contact hole 43 penetrating the acrylic resin layer, which is the planarizing film, is formed on the source electrode 41s, and the second contact hole 43 is connected to the source electrode 41s on the acrylic resin layer. A display electrode 44 is formed to spread. The display electrode 28 is formed by laminating a transparent conductive film, for example, ITO on the acrylic resin layer in which the second contact holes 43 are formed, and applying a resist film on the transparent conductive film, followed by a predetermined electrode pattern. The transparent conductive film exposed by dry etching, for example, RIE, is etched using HBr gas and Cl2 gas as etching gas.
[0086]
On the display electrode and the planarizing film, an alignment film 45 made of polyimide, SiO2, or the like and orienting liquid crystal is formed by a printing method or a spinner method.
[0087]
Thus, a TFT substrate on one side of the liquid crystal display device is completed.
[0088]
Next, FIG. 10 shows a partial cross-sectional view of the liquid crystal display device.
[0089]
As shown in the figure, a counter electrode 47 made of a transparent conductive film such as an ITO film is sequentially formed on a counter electrode substrate 46, which is an insulating substrate made of quartz glass or non-alkali glass, and then a liquid crystal is formed thereon. An alignment film 48 made of polyimide, SiO 2 or the like is formed.
[0090]
Thus, the counter electrode substrate is provided at a position facing the above-described TFT substrate, and the both substrates are bonded to each other between the TFT substrate and the counter electrode substrate using a sealing agent made of an adhesive resin. Then, the liquid crystal 50 is filled between the substrates to complete the liquid crystal display device.
[0091]
A block configuration when applied to the active matrix LCD in the first and second embodiments of the present invention will be described below.
[0092]
FIG. 11 is a block diagram when applied to an active matrix LCD.
[0093]
In the display pixel unit 100, scanning lines (gate wirings) G1,... Gn, Gn + 1,... Gm and data wirings (drain lines) D1,. Each gate line and the data line are orthogonal to each other, and the display pixel 101 is provided in the orthogonal part. Each gate wiring is connected to the gate driver 102 and a gate signal (scanning signal) is applied thereto. Each drain wiring is connected to a drain driver (data driver) 103 so that a data signal (video signal) is applied. These drivers 102 and 103 constitute a peripheral drive circuit 104.
[0094]
An LCD in which at least one of the drivers 102 and 103 is formed on the same substrate as the display pixel unit 100 is generally called a driver integrated type (driver built-in type) LCD. Note that gate drivers may be provided at both ends of the display pixel unit 100. In some cases, the drain driver 103 is provided at both ends of the display pixel unit 100.
[0095]
A p-Si TFT manufactured by a manufacturing method equivalent to the p-Si TFT is used as the switching element of the peripheral drive circuit 104, and is formed on the same substrate in parallel with the manufacture of the p-Si TFT. Note that this p-Si TFT for the peripheral drive circuit adopts an ordinary single drain structure instead of an LDD structure (of course, an LDD structure may also be used).
[0096]
Further, the p-Si TFT of this peripheral drive circuit is formed in a CMOS structure, thereby realizing a reduction in dimensions as each driver.
[0097]
FIG. 12 shows an equivalent circuit of the display pixel 101 provided in the orthogonal portion between the gate line Gn and the drain line Dn.
[0098]
The display pixel 101 includes a TFT as a pixel driving element, a liquid crystal cell LC, and an auxiliary capacitor Cs. The gate of the TFT is connected to the gate wiring Gn, and the drain of the TFT is connected to the drain wiring Dn. A display electrode (pixel electrode) and an auxiliary capacitor (additional capacitor) Cs of the liquid crystal cell LC are connected to the source of the TFT.
[0099]
The liquid crystal cell LC and the auxiliary capacitor Cs constitute a signal storage element. A voltage Vcom is applied to the common electrode (electrode opposite to the display electrode) of the liquid crystal cell LC. On the other hand, in the auxiliary capacitor Cs, a constant voltage VR is applied to the electrode on the side opposite to the side connected to the source of the TFT. The common electrode of the liquid crystal cell LC is literally a common electrode for all the display pixels 101. In the auxiliary capacitor Cs, the electrode on the side opposite to the side connected to the TFT source may be connected to the adjacent gate line Gn + 1.
[0100]
In the display pixel 101 configured as described above, when the gate line Gn is set to a positive voltage and a positive voltage is applied to the gate of the TFT, the TFT is turned on. Then, the electrostatic capacity and the auxiliary capacity Cs of the liquid crystal cell LC are charged by the data signal applied to the drain wiring Dn. On the other hand, when the gate wiring Gn is set to a negative voltage and a negative voltage is applied to the gate of the TFT, the TFT is turned off, and the voltage applied to the drain wiring Dn at that time is the capacitance and auxiliary capacitance of the liquid crystal cell LC. Held by Cs. In this way, by applying the drain wiring Dn to the data signal to be written to the pixel and controlling the voltage of the gate wiring, the display pixel can hold an arbitrary data signal. The transmittance of the liquid crystal cell LC changes according to the data signal held by the display pixel, and the display pixel is displayed.
[0101]
Here, there are a writing characteristic and a holding characteristic as important characteristics of the display pixel. What is required for the writing characteristics is that a desired video signal voltage is sufficiently written to the signal storage elements (the liquid crystal cell LC and the auxiliary capacitor Cs) within a unit time determined from the specification of the display pixel unit. Is whether or not Also, what is required for the holding characteristic is that the video signal voltage once written in the signal storage element can be held for a necessary time.
[0102]
The auxiliary capacitor Cs is provided in order to increase the electrostatic capacity of the signal storage element and improve the writing characteristics and the holding characteristics. That is, the liquid crystal cell LC has a limit in increasing the capacitance because of its structure. Therefore, the auxiliary capacitance Cs compensates for the lack of capacitance of the liquid crystal cell LC.
[0103]
【The invention's effect】
According to the method for manufacturing a semiconductor device according to claim 1, in the method for manufacturing a semiconductor device in which a semiconductor element is formed on a substrate by an RTA method, the temperature is increased stepwise before the heat treatment of the substrate by the RTA method. Since the substrate is sequentially preheated by a plurality of preheated substrates arranged to be heated, it is possible to suppress the occurrence of cracking due to thermal distortion of the substrate due to a rapid change in the substrate temperature to which RTA is applied. Throughput can be improved.
[0104]
The method for manufacturing a semiconductor device according to claim 2 is the method for manufacturing a semiconductor device according to claim 1, wherein the preheating means is a plurality of preheating substrates set so as to increase in temperature in order. Can be improved.
[0105]
According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the first or second aspect, further comprising: a plurality of semiconductor devices arranged so that the temperature is lowered stepwise after the heat treatment of the substrate by the RTA method. Since the above-mentioned cooling substrate sequentially cools the substrate, it is possible to suppress the occurrence of cracks due to thermal distortion of the substrate.
[0106]
The method for manufacturing a liquid crystal display device according to claim 4 is a method for manufacturing a liquid crystal display device in which a switching element for driving liquid crystal is formed on a substrate by an RTA method, and before the heat treatment of the substrate by the RTA method, Since the substrate is sequentially pre-heated by a plurality of pre-heating substrates arranged so as to increase the temperature stepwise, the generation of cracks due to the thermal strain of the substrate can be suppressed and the throughput can be improved. .
[0107]
The method for manufacturing a semiconductor device according to claim 5 is the method for manufacturing a semiconductor device according to claim 4, wherein the preheating means is a plurality of preheating substrates set so that the temperature becomes higher in order. Can be improved.
[0108]
The method for manufacturing a liquid crystal display device according to claim 6 further includes cooling the substrate sequentially with a plurality of cooling substrates arranged so as to decrease in temperature after the heating treatment of the substrate by the RTA method. Therefore, the generation of cracks due to the thermal strain of the substrate can be suppressed.
[Brief description of the drawings]
FIG. 1 is a manufacturing process cross-sectional view illustrating a first embodiment of the present invention.
FIG. 2 is a manufacturing process cross-sectional view showing the first embodiment of the present invention.
FIG. 3 is a manufacturing process sectional view showing the first embodiment of the invention;
FIG. 4 is a manufacturing process sectional view showing the first embodiment of the present invention;
FIG. 5 is a perspective view of a laser irradiation apparatus used in the method for manufacturing a semiconductor device of the present invention.
FIG. 6 is a cross-sectional view of an RTA apparatus for performing the RTA of the present invention.
FIG. 7 is a manufacturing process sectional view showing a second embodiment of the present invention;
FIG. 8 is a manufacturing process sectional view showing a second embodiment of the present invention;
FIG. 9 is a manufacturing process sectional view showing a second embodiment of the present invention;
FIG. 10 is a manufacturing process sectional view showing a second embodiment of the present invention;
FIG. 11 is a block diagram of a liquid crystal display device manufactured by the method for manufacturing a liquid crystal display device of the present invention.
FIG. 12 is an equivalent circuit diagram of a liquid crystal display device manufactured by the method for manufacturing a liquid crystal display device of the present invention.
FIG. 13 is a manufacturing process sectional view showing a manufacturing process of a conventional semiconductor device.
[Explanation of symbols]
1 Insulating substrate
301 Xenon arc lamp
302 Transport roller
304 Preheat substrate
305 Preheat substrate
306 Preheat substrate
307 Cooling substrate
308 Cooling substrate
309 Cooling substrate

Claims (2)

Amorphous silicon formed on a glass substrate is crystallized by an ELA method to form an active layer of a semiconductor element, the active layer is processed into a predetermined shape, and a gate electrode made of only a refractory metal is formed. Thereafter, in a method of manufacturing a semiconductor device that is activated by heating by a lamp RTA method, the substrate is sequentially formed by a plurality of preheating means set at different heating temperatures before the substrate is heated by the lamp RTA method. The substrate is heated so that the temperature is raised stepwise, and after the heat treatment by the lamp RTA method, a series of treatments for sequentially cooling the substrate is performed once by a plurality of cooling means arranged so as to lower the temperature stepwise. A method for manufacturing a semiconductor device. Amorphous silicon formed on a glass substrate is crystallized by an ELA method to form an active layer of a switching element that drives a liquid crystal, the active layer is processed into a predetermined shape, and is made of only a refractory metal. In a method of manufacturing a liquid crystal display device that is activated by heating by a lamp RTA method after forming a gate electrode, a plurality of preheatings set at different heating temperatures before the heat treatment of the substrate by the lamp RTA method The substrate is heated by the means so as to raise the temperature stepwise, and after the heat treatment by the lamp RTA method, the substrate is sequentially cooled by a plurality of cooling means arranged to lower the temperature stepwise . A method of manufacturing a liquid crystal display device, wherein the treatment is performed once .

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