JP3885247B2 - Image recording device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention provides an image recording apparatus for printing in band units by performing main scanning with a print head.In placeIt is related.
[0002]
[Prior art]
  An information recording apparatus such as a personal computer is usually connected with an image recording apparatus capable of recording these data on paper so as to record data consisting of characters and figures as visual information (see FIG. 4). This recording apparatus employs various printing systems such as impact system, thermal system, ink jet system, etc., but an ordinary recording apparatus has a print head provided with a plurality of recording elements of these systems (for example, 64 channels). Is printed on the entire surface of the sheet by repeating the printing process of performing one-band width sub-scanning on the sheet after the main scanning is performed.
[0003]
  That is, as shown in FIG. 11, the conventional recording apparatus includes a print buffer 61 capable of storing print data for at least one band, and a print head drive (not shown) that causes each recording element of the print head to perform a printing operation. And a print control unit 64 including a DMA controller 62 that outputs print data to the print head drive unit in units of dots, a 4-bit shift register unit 63, and the like so as to correspond to the channels of each recording element. .
[0004]
  The operation for printing will be described while paying attention to the 0-channel register 63a and the 1-channel register 63b of the 4-bit shift register unit 63. As shown in FIG. 12, the printing for 4 bits stored in the print buffer 61 is performed. After the data (O0-3, 0-3) is transferred to the 4-bit shift register 63 by the DMA controller 62 (S1), the print data (O0-3, 0-3) is transferred from the first bit. Printing is performed by outputting to each recording element of the print head 65 in units of 1 bit at the input timing of the print clock (S2 to S4). Thereafter, when the final print data (（3, ● 3) is output from the 4-bit shift register unit 63, the next 4-bit print data (○ 4-7, ● 4-7) is output to the print buffer 61. To the 4-bit shift register unit 63 (S5), and the subsequent printing is performed at the input timing of the printing clock (S6 to S8). By repeating such transfer and printing of print data, printing for one band is performed.
[0005]
[Problems to be solved by the invention]
  However, since the shift registers for all channels have a 4-bit configuration as in the conventional case, there is a problem that the circuit configuration is complicated. Further, for example, in S5 and S9, after the final print data is output from the 4-bit shift register unit 63, the print data for 4 bits is output from the print buffer 61 within a period until the next print clock is input. In the configuration in which the 4-bit shift register unit 63 transfers 64 channels, it is difficult to shorten the transfer time required for one channel due to restrictions such as the reading speed of the print buffer 61. There is also a problem that the printing speed must be reduced so that the printing clock is not input. These problems become even greater when color printing or the like is performed by a plurality of print heads because the number of channels further increases.
[0006]
  Therefore, the present invention, DoubleImage recording that can speed up the printing speed and simplify the circuit configuration by distributing the data processing for several print headsapparatusIs to provide.
[0007]
[Means for Solving the Problems]
  In order to solve the above problems, the invention of claim 1A recording element is formed andA plurality of print heads arranged in the main scanning direction are provided, and the print data stored in the print buffer is transferred to the print head driving unit corresponding to each of the plurality of print heads.Every predetermined amountIn an image recording apparatus for recording an image transferred through a shift register unitEach of the two recording elements formed on different print heads.CorrespondinglyProvided in the shift register unit, has a data capacity that is half of the predetermined amount of print data, and outputs print data bit by bit to the print head drive unit for each print clock.2 channelsshiftRegisters andA first selector that selects one of the two channel shift registers; and a shift register unit, which has a data capacity that is half of the predetermined amount of print data, through the first selector. Output print data by one bit for each print clock to one of the two channel shift registersshareshiftRegisters,The second selector that selects one of the two channel shift registers and the shared shift register, and each time the print data in the shared shift register disappears, the selection destination by each of the first and second selectors is the 2 A switching circuit that alternately switches between the two channel shift registers, and after the switching circuit switches the respective selection destinations, the upper half of the predetermined amount of print data is transferred through the second selector. Supply means for supplying the lower half of the predetermined amount of print data to the shared shift register to the other one of the channel shift registers, respectively..
  This allows sharingshiftRegister to channelshiftShare by sharing to registersshiftSince the number of registers can be reduced, the circuit configuration can be simplified.
  In addition, since the print data is alternately supplied to the two channel shift registers, the transfer can be completed in a shorter time than the case where the print data of all the print heads are transferred at the same time. It is possible to increase the speed.
[0008]
[0009]
[0010]
  A second aspect of the present invention is the image recording apparatus according to the first aspect, comprising the four print heads corresponding to four different colors, and the two channels.shiftRegister, one said sharedshiftregister,One of the aboveFirstselectorAnd one second selectorAre provided with two sets of circuits, and four channels included in the two sets of circuits.shiftA register is provided corresponding to each of the four print heads.
  Thereby, color printing of a plurality of colors can be performed with a simple circuit configuration.
[0011]
[0012]
[0013]
[0014]
DETAILED DESCRIPTION OF THE INVENTION
  An embodiment of the present invention will be described below with reference to FIGS.
  As shown in FIG. 4, the image recording apparatus according to the present embodiment is connected to an information processing apparatus 1 such as a personal computer. The information processing apparatus 1 is used for a processor main body 2 having a built-in auxiliary storage device such as a magnetic disk device and a central processing unit, a CRT (cathode-ray tube) 3 for displaying data and the like, and data input and instructions. A keyboard 4 and a mouse 5 are connected to, for example, a printer cable 6 of Centronics specification and connected to an ink jet printer 7 which is an image recording apparatus.
[0015]
  As shown in FIG. 5, the processing apparatus main body 2 includes, for example, a window system 8 as an operating system (OS). The window system 8 includes an application 9 such as a document creation program, a font driver 10 that manages fonts, a CRT driver 11 that manages CRT 3, a keyboard driver 12 that manages keyboard 4, and a mouse driver 13 that manages mouse 5. One or a plurality of applications 9 can be simultaneously executed in cooperation with various function groups such as a printer driver 14 that manages the printer 7.
[0016]
  The printer driver 14 can form dot image data in a color print mode and a black and white print mode. For example, in the color print mode, based on halftone image data to be printed, By binarization processing such as dither method or error diffusion method, dot image data of four colors of yellow (Y), magenta (M), cyan (C), and black (K) are formed. The data is output from the interface (I / F) unit 15 as 8-bit print data while being raster scanned in the horizontal direction.
[0017]
  The print data output in the raster scan format as described above is input to the I / F (interface) unit 16 of the printer 7. The printer 7 includes a printer controller 17, print buffers 18 a to 18 d for storing print data for yellow (Y), magenta (M), cyan (C), and black (K), and a print head. A drive unit 19 and a CR motor drive unit 20 are provided. The CR motor drive unit 20 is connected to the CR motor 22 and rotates the CR motor 22 forward and backward. On the other hand, the print head drive unit 19 is connected to print heads 21a to 21d for yellow (Y), magenta (M), cyan (C), and black (K). In each of these print heads 21a to 21d, nozzles (printing elements) (not shown) that eject ink by displacement of the piezoelectric elements are arranged in, for example, 64 channels in the sub-scanning direction. A drive voltage from the print head drive unit 19 is applied so as to displace the piezoelectric element.
[0018]
  The print head drive unit 19 will be described in detail. As shown in FIG. 6, the print head drive unit 19 includes buffer units 33a to 33 each including a buffer circuit provided corresponding to each nozzle of the print heads 21a to 21d. 33d, a gate part 32a to 32d composed of a two-input AND circuit connected to each buffer circuit of the buffer parts 33a to 33d, and a serial-connected to one input side of each AND circuit of the gate parts 32a to 32d And a parallel conversion circuit 31. The serial-parallel conversion circuit 31 takes in dot-unit print data serially output from the print buffers 18a to 18d of FIG. 5 via the printer controller 17 at the input timing of the transfer clock and outputs it in parallel. . The gate units 32a to 32d output the parallel output print data to the buffer units 33a to 33d when a high level print clock is input. The buffer units 33a to 33d are input. When the print data is at a high level, drive voltages (for Y, M, C, and K) are output to the print heads 21a to 21d, respectively.
[0019]
  In this way, the print heads 21a to 21d to which the drive voltage is supplied from the print head drive unit 19 are arranged in the main scanning direction X as shown in FIG. As shown in FIG. 2, the arrangement interval between the adjacent print heads 21a to 21d is an integral multiple of the print pitch (4 dots between the print heads 21a and 21b, 6 dots between the print heads 21b and 21c, and printing. The distance between the heads 21c and 21d is set to a distance of 4 dots). As will be described in detail later, the storage state of the dot image data (print data) in the print buffers 18a to 18d is set in units of 4 bits. It is designed to be shifted at equal intervals.
[0020]
  Further, as shown in FIG. 7, these print heads 21 a to 21 d are fixed to the carriage 23 so that the ink ejection direction is a predetermined angle with respect to the printing paper 25. A guide shaft 24 horizontally disposed in the main scanning direction is movably inserted into the carriage 23, and a scanning belt 26 driven by a CR motor 22 is connected to the carriage 23. A CR that drives the scanning belt 26 is connected to the carriage 23. The motor 22 moves the carriage 23 forward and backward along the guide shaft 24 in the main scanning direction, thereby main-scanning the print head 21 while maintaining the distance between the print head 21 and the paper 25 constant. .
[0021]
  An encoder element 27 made of a non-contact sensor such as an optical type or a magnetic type is provided on the lower surface of the carriage 23. In the detection direction of the encoder element 27, timing slits 28 having a large number of slit portions 28a at equal intervals are provided in parallel to the guide shaft 24. The encoder element 27 together with the carriage 23 is in the main scanning direction. When the movement is performed, the slit portion 28a of the timing slit 28 is detected and output as an encoder signal.
[0022]
  The encoder signal is input to the printer controller 17 as shown in FIG. The printer controller 17 includes a print timing generation unit 34, a buffer control unit 35, a CPU unit 38, an I / F control unit 42, and a print control unit 43 so as to function as buffer control means of the present invention. . The print timing generation unit 34, the buffer control unit 35, the I / F control unit 42, and the print control unit 43 are integrally formed by a hard logic circuit such as an ASIC (Application Specific Integrated Circuit). The ASIC unit 39 is configured.
[0023]
  The print timing generation unit 34 constituting the ASIC unit 39 forms a print timing signal serving as a print clock based on the encoder signal, and outputs the print timing signal to the buffer control unit 35 and the print control unit 43. It is supposed to be. The buffer control unit 35 has a DMA controller, an address generator, and the like, and stores the print data input via the I / F unit 16 in the print buffers 18a to 18d and the print buffers 18a to 18d. A read process for reading the print data and outputting it to the print control unit 43 is executed.
[0024]
  Specifically, the writing process and the reading process will be described in detail. As shown in FIGS. 9A and 9B, each print buffer 18a to 18d has a horizontal direction (raster direction) corresponding to the main scanning direction X. For example, a data table for 64 rasters is formed in a matrix formed of a vertical direction corresponding to the sub-scanning direction. This data table is divided into 8-bit data areas, which are print data transmission units, and when write processing is performed, the print data is sequentially output in the same raster scan format as that output from the information processing apparatus 1. It is stored in each data area. On the other hand, when the reading process is performed, print data in the vertical direction, which is the sub-scanning direction, is read in the horizontal direction sequentially from the left end in the figure.
[0025]
  The print data read by the above read process is output to the print control unit 43 as shown in FIG. The print control unit 43 temporarily stores the print data in the print buffer 18 and then sequentially sends the print data to the print head drive unit 19 in dot units.
[0026]
  Specifically, as shown in FIG. 10, the print control unit 43 includes a parallel-serial conversion unit 51 that serially transfers dot-unit print data to the print head drive unit 19 at a transfer clock input timing, and a parallel-serial conversion unit. 2 bits for black (K), magenta (M), cyan (C), and yellow (Y) so that print data of all channels (64 channels × 4 colors) is output in dot unit 51. And a 2-bit shift register section 54 having (64 × 4) shift registers in this order.
[0027]
  Further, the print control unit 43 includes a first selector unit 55 and a second selector unit 57 each having (64 × 2) selector circuits 55a... 57a. 64 × 2) 2-bit shared shift register section 56, data selector 53, and K / M, C / Y head switching circuit 58 for switching the connection direction of selector circuits 55a... 57a. .
[0028]
  The output terminal of the selector circuit 55a provided in the first selector unit 55 is connected to the shift registers (for example, the K0 channel register 54a and the M0 channel register 54b) of adjacent channels in the 2-bit shift register unit 54. On the other hand, the shift register of the 2-bit shared shift register unit 56 (for example, the K0 / M0 channel shared register 56a) is connected to the input terminal of the selector circuit 55a. As a result, the first selector unit 55 switches the output direction of the selector circuit 55a so that the shift register (K0 / M0 channel shared register 56a) of the 2-bit shared shift register unit 56 is adjacent to the 2-bit shift register unit 54. The channel shift registers (for example, the K0 channel register 54a and the M0 channel register 54b) are shared.
[0029]
  On the other hand, the output terminal of the selector circuit 57a provided in the second selector unit 57 is connected to the shift registers (for example, the K0 channel register 54a and the M0 channel register 54b) of adjacent channels in the 2-bit shift register unit 54. As a result, the second selector unit 57 directly stores the lower 2 bits of the print data in units of 4 bits from the data selector 53 to the shift register of the 2-bit shared shift register unit 56 (for example, the K0 / M0 channel shared register 56a). At the same time, the upper 2 bits of the print data are stored in one shift register (for example, the K0 channel register 54a or the M0 channel register 54b) of the 2-bit shift register unit 54 by switching the output direction of the selector circuit 57a. Yes.
[0030]
  In the above configuration, the operation of the image recording apparatus will be described.
  First, as shown in FIG. 4, when the instruction data is input by the keyboard 4 or the mouse 5 so as to start printing, the window system 8 in FIG. 5 activates the printer driver 14. When the instruction content is the color print mode, the color signal is converted from the RGB image signal to the CMY signal based on the color print data (halftone RGB image signal) to be printed, and the CMY signal The black amount (K value) is determined based on the above. Thereafter, the CMY signal is corrected based on the black amount (K value) (referred to as under color removal (UCR)), and further, binarization processing using a dither method, an error diffusion method, or the like is used. Dot image data is created.
[0031]
  Next, when a color print mode setting command is transmitted to the printer 7, data areas for the print buffers 18a to 18d are formed so that the printer controller 17 performs color printing. Thereafter, dot image data of yellow (Y), magenta (M), cyan (C), and black (K) are transmitted as print data and stored in the print buffers 18a to 18d, respectively. .
[0032]
  When one band of print data is stored in the print buffers 18a to 18d, as shown in FIGS. 7 and 8, the CR motor 22 is driven to rotate in the forward direction, and the main scanning direction X of the print heads 21a to 21d. Will be started. Thereafter, when the print heads 21a to 21d reach the print start position when moving to the right, the buffer control unit 35 instructed to read by the CPU unit 38, from each of the print buffers 18a to 18d, as shown in FIG. The print data of yellow (Y), magenta (M), cyan (C), and black (K) are read in the following procedure and transferred to the print controller 43.
[0033]
  That is, as shown in FIG. 1 and FIG. 2, the read processing operation is performed by the K0-Y0 channel registers 54a-54d of the 2-bit shift register unit 54, the K0 / M0 channel shared register 56a of the 2-bit shared shift register unit 56, and The description will be made while paying attention to the C0 / Y0 channel shared register 56b. First, at a predetermined print clock, for example, at the input timing of the first pulse, 4-bit print data (M0 to M3, Y0 to Y3) are read from the print buffers 18b and 18a for magenta (M) and yellow (Y), and the upper 2 bits of print data (M0, M1, Y0, Y1) are 2-bit shift register sections 54 are transferred to the M0 channel register 54b and the Y0 channel register 54d. The 2-bit print data (M2, M3, Y2, Y3) is stored in the K0 / M0 channel shared register 56a and the C0 / Y0 channel shared register 56b of the 2-bit shared shift register unit 56, and the first of FIG. The output directions of the selector circuits 55a and 57a in the selector unit 55 and the second selector unit 57 are switched to the M0 channel register 54b and the Y0 channel register 54d (S1).
[0034]
  At this time, the 2-bit shift register unit 54 outputs the data stored in the first register (the rightmost register in FIG. 1) of each channel to the parallel / serial conversion unit 51. Accordingly, the K0 to Y0 channel registers 54a to 54d are connected to the print head drive unit 19 via the parallel / serial conversion unit 51 until the next second print clock is input (between S1 and S2). The data in the first register is transferred, but since the print data (M0, M1, Y0, Y1) for 2 bits is stored only in the M0 channel register 54b and the Y0 channel register 54d, these print data The print data (M0, Y0) of the first bit stored in the top register is transferred in 1-bit units.
[0035]
  When the printing pulse of the second pulse is input, the 2-bit shared shift register unit 56 and the 2-bit shift register unit 54 are connected to the K0 / M0 channel shared register 56a and the M0 channel register 54b by the selector circuit 55a. Since the C0 / Y0 channel shared register 56b and the Y0 channel register 54d are connected by the selector circuit 55a, the print data (M2, M3, Y2, Y3) of each shared register 56a, 56b is set. ) Are transferred (shifted) to the M0 channel register 54b and the Y0 channel register 54d in 1-bit units, and the first print data (M0, Y0) is printed by the print heads 21b and 21a (S2). ).
[0036]
  Next, when the print clock of the third pulse is input, the print data (M1, Y1) of the second bit transferred to the print head drive unit 19 immediately before that is printed, and the K0 channel and C0 The 4-bit print data (K0 to K3, C0 to C3) corresponding to the channel is read from the print buffers 18d and 18c, and the upper 2-bit print data (K0, K1, C0 and C1) is a 2-bit shift register. Are transferred to the K0 channel register 54a and the C0 channel register 54c of the unit 54, and the lower 2 bits of print data (K2, K3, C2, C3) are transferred to the K0 / M0 channel shared register 56a of the 2-bit shared shift register unit 56 and The data is transferred to the C0 / Y0 channel sharing register 56b. The print data stored in the K0 / M0 channel sharing register 56a and the M0 channel register 54b, and the C0 / Y0 channel sharing register 56b and the Y0 channel register 54d, which have been connected until immediately before the input of the printing clock, are each 1 bit. After shifting in units, the output directions of the selector circuits 55a and 57a in the first selector unit 55 and the second selector unit 57 in FIG. 10 are switched between the K0 channel register 54a and the C0 channel register 54c, respectively (S3). .
[0037]
  Thereafter, when the print clock of the next fourth pulse is input, the print data (K0, C0, M2, Y2) transferred from the K0 to Y0 channel registers 54a to 54d to the print data drive unit 19 immediately before that is input. Printing is performed (S4). Then, the printing data is input while the storing of the printing data in a unit of 4 bits in units of 2 bits in the adjacent channel registers 54a to 54d and the channel sharing registers 56a and 56b is alternately repeated every two pulses of the printing clock. When the print data is transferred from the timing channel registers 54a to 54d to the print data driver 19 (S5 to S10), color printing for one band is performed.
[0038]
  As described above, the image recording apparatus according to the present embodiment stores print data in the magenta (M) and yellow (Y) channel registers such as the M0 channel register 54b and the Y0 channel register 54d, and K0. Printing data storage in the black (K) and cyan (C) channel registers such as the channel register 54a and the C0 channel register 54c is alternately repeated every two pulses of the printing clock. . That is, the print heads 21a to 21d are divided into two groups, and the print data corresponding to the print heads 21a and 21b of one group and the print data corresponding to the print heads 21c and 21d of the other group are at different timings. That is, the timing is shifted every two pulses of the print clock, and the data is alternately transferred to the 2-bit shift register unit 54 and the 2-bit shared shift register unit 56. Therefore, in one cycle of the print clock, the number of channels for reading print data from the print buffers 18a to 18d and storing it in the 2-bit shift register unit 54 is half of the total number of channels. As a result, printing data storage is completed in a shorter time than when printing data is stored in the shift registers of all channels, so that the printing speed of the image recording apparatus can be increased by shortening the printing clock cycle. It is possible.
[0039]
  Further, in the present embodiment, a 2-bit shift register unit 54 composed of (64 × 4) 2-bit shift registers and a 2-bit shared shift register unit 56 composed of (64 × 2) 2-bit shift registers. Since the 4-bit shift register for 64 channels × 4 colors is configured, the circuit configuration can be simplified as compared with the case where all channels are configured by the 4-bit shift register. That is, since the shift register requires an extremely large number of gate parts as compared with a selector or the like, it can be manufactured at a relatively low cost when these are constituted by an ASIC, for example, a gate array.
[0040]
  In this embodiment, the print heads 21a to 21d are arranged at intervals of 4 dots between the print heads 21a and 21b, 6 dots between the print heads 21b and 21c, and 4 dots between the print heads 21c and 21d. It is set to be a minute distance. Therefore, as apparent from FIG. 2, the print data (M4) of the fifth bit of magenta (M) is printed at the position where the print data (Y0) of the first bit of yellow (Y) is printed. ) And the print data (C4) of the fifth bit of cyan (C) are printed at the position where the print data (M0) of the first bit of magenta (M) is printed, Further, the print data (K4) of the fifth bit of black (K) is printed at the position where the print data (C0) of the first bit of cyan (C) is printed. That is, if the dot matrix image data is stored as it is in the print buffers 18a to 18d for each color, a 4-bit shift occurs between the colors.
[0041]
  Therefore, in order to eliminate such a shift, it is necessary to store dot image data (print data) shifted by 4 bits between the respective colors in the print buffers 18a to 18d of the respective colors. For example, when such correction processing is performed on the information processing apparatus 1 side, dot image data in consideration of a 4-bit shift may be created at the stage of creating dot image data by the printer driver 14. Alternatively, the dot image data may be corrected to the dot image data considering the 4-bit deviation at the stage of transferring the dot image data to the printer 7 side. When correction is performed on the printer 7 side, dot image data shifted by 4 bits may be stored when the dot image data received from the information processing apparatus 1 is stored in the print buffers 18a to 18d for the respective colors. good.
[0042]
  Further, when the dot image data (print data) is read from the print buffers 18a to 18d and stored in the 2-bit shift register unit 54 and the 2-bit shared shift register unit 56, the reading of the dot image data is shifted by 4 bits. As a result, the dot image data (print data) in consideration of the 4-bit shift may be stored in the 2-bit shift register unit 54 and the 2-bit shared shift register unit 56 in units of 4 bits. .
[0043]
  In the case of performing the correction process as described above, in the present embodiment, it is only necessary to eliminate the deviation of the 4-bit unit interval between the respective colors. Therefore, the correction process is extremely easy, but the present invention is not limited to this. For example, as shown in FIG. 3 as a modified example, the arrangement intervals of the print heads 21a to 21d may be set to be equal to 4 dots.
[0044]
  In this case, as apparent from FIG. 3, the print data (M4) of the fifth bit of magenta (M) is printed at the position where the print data (Y0) of the first bit of yellow (Y) is printed. Is printed, the print data (C2) of the third bit of cyan (C) is printed at the position where the print data (M0) of the first bit of magenta (M) is printed, and The print data (K4) of the fifth bit of black (K) is printed at the position where the print data (C0) of the first bit of cyan (C) is printed. That is, if the dot matrix image data is stored as it is in the print buffers 18a to 18d for each color, a shift of 4 bits or 2 bits occurs between the colors. However, by performing the correction process as described above, for example, dot image data (print data) shifted by 4 bits or 2 bits between colors is stored in the print buffers 18a to 18d for each color. It can be solved by etc.
[0045]
  By the way, in the above embodiment, the four print heads 21a to 21d are divided into two groups, and correspond to the yellow (Y) and magenta (M) print heads 21a and 21b belonging to one group. The print data and the print data corresponding to the print heads 21c and 21d for cyan (C) and black (K) belonging to the other group are alternately shifted by 2 bits at different timings every two pulses of the print clock. The data is transferred to the register unit 54 and the 2-bit shared shift register unit 56, but is not limited thereto, and may be transferred at different timings for each of the print heads 21a to 21d, for example.
[0046]
  That is, in the above-described embodiment shown in FIG. 1, at the input timing of the first printing clock (S1), 4 bits from the print buffers 18a to 18d for magenta (M) and yellow (Y) respectively. Print data (M0 to M3, Y0 to Y3) are read out and stored in the channel sharing registers 56a and 56b and the channel registers 54b and 54d, respectively, and at the input timing (S3) of the print pulse of the third pulse. 4 bits of print data (K0 to K3, C0 to C3) are read from the black (K) and cyan (C) print buffers 18d and 18c, respectively, and the channel sharing registers 56a and 56b and the channel registers 54a and 54a are read. 54c is stored in 2 bits each, but this may be changed as follows.
[0047]
  First, at the input timing (S1) of the print clock of the first pulse, print data (Y0 to Y3) for 4 bits is read from the yellow (Y) print buffer 18a, and the channel sharing register 56b and the channel register 54d are read out. 2 bits at a time, and at the input timing (S2) of the print pulse of the second pulse, print data (M0 to M3) of 4 bits is read from the print buffer 18b for magenta (M), and the channel Two bits are stored in the shared register 56a and the channel register 54b. Next, at the input timing (S3) of the print pulse of the third pulse, print data (C0 to C3) for 4 bits is read from the cyan (C) print buffer 18c, and the channel sharing register 56b and the channel register are read out. 54 c and 2 bits at a time, and at the input timing (S4) of the print pulse of the fourth pulse, print data (K0 to K3) for 4 bits is read from the black (K) print buffer 18d, and the channel Two bits are stored in the shared register 56a and the channel register 54a.
[0048]
  Thereafter, the print data (Y4 to Y7) for 4 bits is read from the print buffer 18a for yellow (Y) at the input timing (S5) of the print pulse of the fifth pulse, and the channel sharing register 56b and the channel register are read out. The print data reading operation in units of 4 bits is repeated in the order of yellow (Y), magenta (M), cyan (C), and black (K) so that 2 bits are stored in 54d. .
[0049]
  According to such an embodiment, in one cycle of the print clock, the number of channels for reading the print data from the print buffers 18a to 18d and storing it in the 2-bit shift register unit 54, etc. is one-fourth of the total number of channels. The storage of print data can be completed in a shorter time than in the case of the above-described embodiment, and higher-speed printing becomes possible. Moreover, since the first 2-bit shift register can be shared, the circuit configuration can be simplified. In such an embodiment as well, the arrangement interval of the print heads 21a to 21d is not limited, and it is a matter of course that printing misalignment can be eliminated by appropriately performing the correction processing as described above. However, for example, when the arrangement intervals of the print heads 21a to 21d are set to be equal to 5 dots, it is only necessary to eliminate the deviation of the equal intervals in units of 4 bits between the respective colors. Easy to process.
[0050]
  In the present invention, color printing is performed by ejecting different color inks from a plurality of print heads. For example, an image printed with a single color ink such as monochrome printing is used. Even a recording apparatus can be applied to a recording apparatus that performs printing for several bands at a time in one main scan by a plurality of print heads in which the arrangement positions of the nozzles are shifted in the sub-scanning direction. . Further, the present invention is not limited to an ink jet printer, and can be used for, for example, a wire dot printer mounted with a plurality of print heads.
[0051]
【The invention's effect】
  The invention of claim 1A recording element is formed andA plurality of print heads arranged in the main scanning direction are provided, and the print data stored in the print buffer is transferred to the print head driving unit corresponding to each of the plurality of print heads.Every predetermined amountIn an image recording apparatus for recording an image transferred through a shift register unitEach of the two recording elements formed on different print heads.CorrespondinglyProvided in the shift register unit, has a data capacity that is half of the predetermined amount of print data, and outputs print data bit by bit to the print head drive unit for each print clock.2 channelsshiftRegisters andA first selector that selects one of the two channel shift registers; and a shift register unit, which has a data capacity that is half of the predetermined amount of print data, through the first selector. Output print data by one bit for each print clock to one of the two channel shift registersshareshiftRegisters,The second selector that selects one of the two channel shift registers and the shared shift register, and each time the print data in the shared shift register disappears, the selection destination by each of the first and second selectors is the 2 A switching circuit that alternately switches between the two channel shift registers, and after the switching circuit switches the respective selection destinations, the upper half of the predetermined amount of print data is transferred through the second selector. Supply means for supplying the lower half of the predetermined amount of print data to the shared shift register to the other one of the channel shift registers, respectively..
[0052]
  This allows sharingshiftRegister to channelshiftShare by sharing to registersshiftSince the number of registers can be reduced, the circuit configuration can be simplified.In addition, since the print data is alternately supplied to the two channel shift registers, the transfer can be completed in a shorter time than the case where the print data of all the print heads are transferred at the same time. It is possible to increase the speed.
[0053]
[0054]
[0055]
  A second aspect of the present invention is the image recording apparatus according to the first aspect, comprising the four print heads corresponding to four different colors, and the two channels.shiftRegister, one said sharedshiftregister,One of the aboveFirstselectorAnd one second selectorAre provided with two sets of circuits, and four channels included in the two sets of circuits.shiftA register is provided corresponding to each of the four print heads.
  Thereby, color printing of a plurality of colors can be performed with a simple circuit configuration.
[0056]
[0057]
[0058]
[Brief description of the drawings]
FIG. 1 illustrates an embodiment of the present invention and is an explanatory diagram illustrating data processing in a print control unit.
FIG. 2 is an explanatory diagram illustrating a state in which each print head performs printing.
FIG. 3 is an explanatory diagram corresponding to FIG. 2, showing an example in which the arrangement interval of the print heads is changed.
FIG. 4 is a perspective view of an image recording apparatus to which an information processing apparatus is connected.
FIG. 5 is a block diagram of an information processing apparatus and an image recording apparatus.
FIG. 6 is a circuit diagram of a head driving unit.
FIG. 7 is a perspective view of a main part of the image recording apparatus.
FIG. 8 is a block diagram including an ASIC unit.
FIGS. 9A and 9B are explanatory diagrams showing a data area of a print buffer, where FIG. 9A is a diagram showing a bit state, and FIG. 9B is a diagram showing a dot state;
FIG. 10 is a block diagram of a print control unit.
FIG. 11 is a block diagram of a conventional print control unit.
FIG. 12 is an explanatory diagram showing data processing in a conventional print control unit.
[Explanation of symbols]
  16 I / F section
  17 Printer Controller
  18a-18d Print buffer
  19 Print head drive
  20 CR motor drive
  21a-21d Print head
  22 CR motor
  23 Carriage
  24 Guide shaft
  25 paper
  26 Scanning belt
  27 Encoder element
  28 Timing slit
  35 Buffer controller
  38 CPU section
  43 Print controller
  51 Parallel serial converter
  53 Data selector
  54 2-bit shift register section (first shift register section)
  55 First selector section
  56 2-bit shared shift register (second shift register)
  57 Second selector section

Claims (2)

A plurality of print heads having recording elements formed and arranged in the main scanning direction are provided, and print data stored in the print buffer is transferred to the print head driving unit corresponding to each of the plurality of print heads for each predetermined amount. In an image recording apparatus for recording an image by transferring it through a shift register unit ,
The shift register unit is provided corresponding to each of the two recording elements formed on different print heads, and has a data capacity half of the predetermined amount of print data, to the print head drive unit. Two channel shift registers that output print data bit by bit for each print clock ;
A first selector for selecting one of the two channel shift registers;
Provided in the shift register unit, has a data capacity that is half of the predetermined amount of print data, and passes one bit per print clock to one of the two channel shift registers via the first selector. A shared shift register that outputs print data ;
A second selector for selecting one of the two channel shift registers and the shared shift register;
A switching circuit for alternately switching the selection destination by the first and second selectors between the two channel shift registers each time the print data in the shared shift register runs out;
After the switching circuit switches the respective selection destinations, the upper half of the predetermined amount of print data is transferred to the other of the two channel shift registers via the second selector. An image recording apparatus comprising: supply means for supplying the lower half of the data to the shared shift register . Comprising four print heads corresponding to four different colors;
The two channel shift registers, the one shared shift register , one set of the first selector, and one set of the second selector are provided as two sets of circuits,
The image recording apparatus according to claim 1, wherein four channel shift registers included in the two sets of circuits are provided corresponding to the four print heads, respectively.

Images