JP3884218B2 - Spread spectrum receiver - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a spread spectrum receiver that employs a code division multiple access (CDMA) system using a spread spectrum modulation system, and in particular, spread spectrum that realizes a reduction in the number of bits of a digital processing unit. The present invention relates to a receiving device.
[0002]
[Prior art]
A conventional spread spectrum receiver will be described below. Currently, spread spectrum communication is being actively applied to mobile communications, and among them, CDMA, which is a multiple access method using the direct spread method, is capable of providing service flexibility and frequency bandwidth. It is considered that there are many advantages from the viewpoint of effective utilization of the mobile phone, and technological development is being advanced as one of the access methods of the mobile communication system in the third generation.
[0003]
In direct spread spectrum spread communication, in addition to information modulation performed for information transmission, spread modulation using a spread code having a wide bandwidth independent of an information signal is performed. That is, the transmitter spreads the information-modulated signal in a band wider than the information band, and the receiver performs a despreading process to recover the original information band. Note that despreading at the receiver is generally achieved by correlation processing between the spreading code used in the spreading process at the transmitter and the received signal, and processing such as information demodulation (synchronous detection) and error correction decoding is performed on the output. To obtain received data.
[0004]
Further, in the spread spectrum receiver, the circuit scale and the power consumption are reduced. For example, the wide dynamic range of the received signal is a factor that determines them. In mobile communications, the received signal has a wide dynamic range due to fading, distance attenuation, etc. Generally, in order to demodulate a received signal with a wide dynamic range without performance degradation, the circuit scale and power consumption increase. Accompany. For example, considering the influence on the digital unit in the receiver, it is necessary to increase the number of processing bits in order to express a strong signal to a weak signal without deterioration.
[0005]
Under such circumstances, recently, a spread spectrum receiver that realizes miniaturization and low power consumption while ensuring a dynamic range has been studied. As a specific example of a spread spectrum receiver that achieves downsizing and low power consumption while ensuring the dynamic range, for example, “a gain control device in spread spectrum communication” described in JP-A-8-307175, And “spread spread receiver and automatic gain control circuit of spread spectrum receiver” disclosed in Japanese Patent Application Laid-Open No. 11-88232. Hereinafter, the operation of the spread spectrum receiver described in the above publication will be briefly described.
[0006]
First, FIG. 11 is a diagram showing the configuration of a conventional spread spectrum receiver described in the above-mentioned Japanese Patent Application Laid-Open No. 11-88232. In FIG. 11, 101a and 101b are A / D converters, 102a and 102b are correlators, 103 is a gain controller (AGC), 104 is a reference signal generator, and 111a and 111b are absolute A value circuit, 112 is a maximum value detection circuit, 113 is a comparator, and 114a and 114b are selectors.
[0007]
In the conventional spread spectrum receiver configured as described above, the received analog baseband signal is A / D converted by the A / D converters 101a and 101b, and then subjected to despread processing in the correlators 102a and 102b. The output is sent to an information demodulation (synchronous detection) circuit (not shown). In the AGC 103 of the receiving apparatus, in order to narrow down the number of bits in the despread output, that is, in order to reduce the number of processing bits in the information demodulation (synchronous detection) circuit, first, the absolute value circuits 111a and 111b are each A / D. Convert the converter output to an absolute value. The maximum value detection circuit 112 detects the maximum amplitude value of the output, and the selectors 114a and 114b further capture the maximum amplitude value from m bits (m is an integer) to n bits of each correlator output. (N is an integer smaller than m). By this processing, the dynamic range can be suppressed from m bits to n bits.
[0008]
On the other hand, FIG. 12 is a diagram showing a configuration of a spread spectrum receiver described in Japanese Patent Laid-Open No. 8-307175. In FIG. 12, 201 is a gain control amplifier, 202 and 204 are frequency converters, 203 is an oscillator, 205a and 205b are A / D converters, 206a and 206b are correlators, and 207 Is a reference signal generator, 208 is a square sum route circuit, 209 is a synchronous demodulation circuit, 210 is an error signal generation circuit, 211 is a filter, and 212 is a control circuit.
[0009]
In the conventional spread spectrum receiver configured as described above, the received analog signal is amplified by the gain control amplifier 201 and then subjected to frequency conversion processing in each of the frequency converters 202 and 204 to become a baseband signal. The signals after A / D conversion by the A / D converters 205a and 205b are despread in each correlator. Here, in order to cope with the level fluctuation of the received signal, the synchronous demodulation circuit 209 extracts information on the amplitude value in the received signal, and further applies feedback control to the gain control amplifier 201 based on the amplitude value information. The signal amplitude value after despreading and after synchronous demodulation is kept substantially constant. With this processing, the synchronous demodulation circuit 209 makes the amplitude component of the received signal substantially constant while ensuring the dynamic range.
[0010]
[Problems to be solved by the invention]
However, the conventional spread spectrum receiver has the following problems. For example, when a signal for gain control of a received signal is obtained from the output of an A / D converter as in the conventional spread spectrum receiver described in Japanese Patent Application Laid-Open No. 11-88232, the received signal includes It is easily affected by components other than the desired component, that is, interference components and noise components from other channels in spread spectrum multiplex communication, especially when the interference components and noise components are dominant in the received signal. However, there is a problem in that it is impossible to perform gain control that keeps the level of a desired signal constant, and a dynamic range necessary for maintaining performance cannot be secured.
[0011]
Further, as in the spread spectrum receiver described in Japanese Patent Application Laid-Open No. 8-307175, when a feedback loop that performs gain control in a digital unit disposed at a subsequent stage of an analog circuit (gain control amplifier) is assembled, In order to stabilize the feedback loop operation and prevent oscillation, it is necessary to study / design appropriate operating conditions, and the process for that becomes complicated in design, resulting in an increase in manufacturing man-hours. there were.
[0012]
The present invention has been made in view of the above, and obtains a spread spectrum receiver capable of reducing the circuit scale and power consumption by reducing the number of processing bits while ensuring the dynamic range in the digital unit. For the purpose.
[0013]
[Means for Solving the Problems]
In order to solve the above-described problems and achieve the object, the spread spectrum receiving apparatus according to the present invention has an A / D conversion means for converting a received analog baseband signal into a digital signal (in an embodiment described later). A / D converters 1a and 1b), digital correlation means for performing despreading processing on the digital signal (corresponding to correlators 2a and 2b), and the received despread output as amplitude values, Effective bit position determining means (corresponding to the effective bit position determining circuit 30) for determining the effective bit position of the despread output based on the amplitude value, and narrowing down the number of bits of the despread output based on the effective bit position Bit selection means (corresponding to the selectors 34a and 34b).
[0014]
In the spread spectrum receiving apparatus according to the next invention, the effective bit position determining means detects the maximum value by observing the amplitude value over a predetermined time, and determines a predetermined value “the maximum value and the effective bit position. The effective bit position is determined so as to reduce the number of bits of the despread output based on
[0015]
In the spread spectrum receiver according to the next invention, the effective bit position determining means, when observing the amplitude value over a predetermined time, when observing instantaneously and when observing over a time longer than "instantaneous", It can be appropriately changed according to the transmission path state.
[0016]
In the spread spectrum receiver according to the next invention, the effective bit position determination means further averages the maximum value of the amplitude detected in the observation time unit (corresponding to the averager 35). .
[0017]
In the spread spectrum receiver according to the next invention, a plurality of the digital correlation means are arranged in parallel (corresponding to the despreading part (1) 41a to the despreading part (N) 41b), and each digital correlation means is provided. Are used for despreading each delay path during multipath reception.
[0018]
In the spread spectrum receiver according to the next invention, when the pilot signal is time-multiplexed in the received signal, the separating means (switch) for temporally separating the despread output data symbol and pilot symbol. 44a and 44b), and the effective bit position determining means and the bit selecting means are prepared for the separated pilot symbols and data symbols.
[0019]
In the spread spectrum receiver according to the next invention, when the pilot signal is code-multiplexed in the received signal, the digital correlation means includes a data channel for information transmission and a pilot channel for pilot transmission in the despread output. Are separated by despreading using the corresponding spreading codes (corresponding to the correlators 2a and 2b), and for the separated pilot symbols and data symbols, the effective bit position determining means and the A bit selection means is prepared.
[0020]
In the spread spectrum receiver according to the next invention, synchronous detection means (corresponding to the synchronous detection circuit 47) for performing synchronous detection processing on the despread output and the despread output are narrowed down by the bit selection means. Delay means (corresponding to the delay unit 48) for delaying information for the time required for the synchronous detection processing, and amplitude value correction means (amplitude value correction) for correcting the amplitude value of the synchronous detection output based on the delay information Equivalent to the circuit 49).
[0021]
In the spread spectrum receiver according to the next invention, the digital correlation means and the separation means are arranged in parallel by the number of fingers (corresponding to the despreading part (1) 51a to the despreading part (N) 51b), Furthermore, a plurality of effective bit position determination means (effective bit position determination) for detecting a maximum amplitude value from a plurality of despread outputs for each received physical channel and determining an effective bit position of the despread output based on the maximum amplitude value. Circuit equivalent to the circuits 46a and 46b) and bit selection means (corresponding to each selector) corresponding to the number of fingers required for RAKE reception arranged in each effective bit position determination means unit, and each digital correlation means These are used for despreading each delay path during multipath reception.
[0022]
In the spread spectrum receiver according to the next invention, the digital correlation means are arranged in parallel by the number of fingers (corresponding to the despreading unit 61a to the despreading unit 61d), and the maximum from a plurality of despread outputs is provided. A plurality of effective bit position determining means (corresponding to effective bit position determining circuits 46a and 46b) for detecting the amplitude value for each received physical channel and determining the effective bit position of the despread output based on the maximum amplitude value; Bit selectors (corresponding to each selector) corresponding to the number of fingers required for RAKE reception, arranged in units of effective bit position determining means, and each digital correlator means for each delay path during multipath reception. It is used for despreading.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a spread spectrum receiver according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.
[0024]
Embodiment 1 FIG.
FIG. 1 is a diagram showing a configuration of a first embodiment of a spread spectrum receiving apparatus according to the present invention. In FIG. 1, 1a and 1b are A / D converters, 2a and 2b are correlators (digital correlators), 3 is a gain controller (AGC), 4 is a reference signal generator, Reference numeral 30 denotes an effective bit position determination circuit, reference numerals 31a and 31b denote absolute value circuits, reference numeral 32 denotes a maximum value detection circuit, reference numeral 33 denotes a comparator, and reference numerals 34a and 34b denote selectors.
[0025]
Next, the operation of the spread spectrum receiver configured as described above will be described. First, the I (in-phase) and Q (quadrature) components of the received baseband signals quantized by the A / D converters 1a and 1b are received by the correlators 2a and 2b, respectively. Thereafter, each correlator performs despreading processing using the I component and Q component of the received baseband signal and the reference code output from the reference signal generator 4.
[0026]
Each correlator integrates the length of the despreading process, that is, the number of chips included in one cycle of the reference code, so that the number of bits of each output signal 81a and 81b m bits) increases compared to the number of output bits from each A / D converter (that is, the number of input bits to each correlator). That is, the dynamic range is expanded.
[0027]
In the present embodiment, both signals are output to the AGC 3 in order to reduce the number of processing bits of the output signals 81a and 81b having the wide dynamic range. In the AGC 3, first, the two output signals 81a and 81b are respectively input to the absolute value circuits 31a and 31b in the effective bit position determining circuit 30, and the signals received by the respective absolute value circuits are converted into absolute values. In the present embodiment, for convenience of explanation, a circuit that converts the output signals 81a and 81b into absolute values is used. However, any circuit may be used as long as an amplitude value can be obtained. For example, the square sum route circuit 208 described in JP-A-8-307175 described in the related art may be used.
[0028]
Next, in the maximum value detection circuit 32, the absolute value output from each is observed over a predetermined time (for example, when observing instantaneously and when observing for a time longer than “instantaneous” depending on the transmission line state). The largest value during the observation time is detected. Through this process, the maximum value detection circuit 32 detects the maximum amplitude value from the m-bit output signal from each correlator.
[0029]
Next, the comparator 33 compares the maximum amplitude value with a predetermined threshold value, and selects the bits of each correlator output by the selectors 34a and 34b according to the result. The effective bit position for reducing the number of bits of the correlator output is determined. Finally, the selectors 34a and 34b select the bits of each correlator output based on the effective bit position, thereby reducing the number of output bits.
[0030]
FIG. 2 is a diagram illustrating an example of a threshold value used by the comparator 33, that is, a relationship between the maximum amplitude value and a bit position for each selector to select a bit of a correlator output. Based on FIG. 2, the comparator 33 extracts n bits (n is an integer smaller than m) from the m-bit output signals 81a and 81b, and determines the effective bit position so as to reduce the number of bits of each correlator output. To do. FIG. 2 shows a case where m = 12, and the number of bits after selection by the selector = 8, and the maximum amplitude value is in the range of A (A is an integer equal to or less than 2 to the (m-1) power). Shows the bit position to be selected.
[0031]
For example, assuming that the output signals 81a and 81b of each correlator are represented by binary numbers in 2-complement representation, when A = 300 is detected, the effective number of A bits is determined to be 10 bits. , The 11th bit, that is, the sign polarity bit and the 7 bits from the 8th bit to the 2nd bit, a total of 8 bits are selected by the selector. The 8-bit position corresponding to the value of A can be determined by the same method.
[0032]
3 shows an example of the threshold value of the comparator 33 different from that in FIG. 2, that is, the relationship between the maximum amplitude value and the bit position for each selector to select the bit of the correlation value output. FIG. In this embodiment, the threshold shown in FIG. 3 can be used instead of FIG. For example, in the threshold example of FIG. Effective number of bits Is 8 or less, the selection position of the selector is fixed, and A Effective number of bits As the value becomes smaller than 8, the amplitude values of the outputs 82a and 82b of the selectors also become smaller. On the other hand, in the threshold example of FIG. Effective number of bits Each time the selector becomes smaller than 8, the selection target of each selector further advances to the lower bits, and when the number of bits selected from the output signals 81a and 81b of each correlator is less than 8 bits, '0' is set to the lower order. Pack it up. By this process, A Effective number of bits Even when is smaller than 8, since the amplitude level of the output signal of each selector is kept within a certain range, the dynamic range after each selector can be kept narrower.
[0033]
In the present embodiment, the operation of the spread spectrum receiver has been described using the threshold values described in FIG. 2 and FIG. 3. However, the present invention is not limited to this, and the example of the threshold value is applied. Things can be considered. For example, as shown in FIG. 2 and FIG. “Number of effective bits of A = 12” By fixedly increasing by 1 except in the case of, or “Number of effective bits of A = 1” A threshold value is set to increase or decrease the margin for the amplitude fluctuation of the AGC3 input with respect to the n-bit signal after selection by fixedly reducing it by 1 except for the above case. Is possible. Further, the maximum value detection circuit 32 in FIG. 1 may be another amplitude value detection circuit, for example, a circuit that simply obtains an averaged amplitude value. In this case, the number of processing bits is reduced based on the average amplitude instead of the maximum amplitude.
[0034]
As described above, in the present embodiment, the signal having an increased number of bits compared to the number of output bits of the A / D converter, that is, the output signal of the correlator having a wide dynamic range, and the threshold value of FIG. For example, n bits (n is an integer smaller than m) are extracted from the m-bit output signal from the correlator, and the number of bits of the despread signal is reduced. As a result, the number of processing bits can be reduced while ensuring a dynamic range in the digital part, and thus a significant reduction in circuit scale and power consumption can be realized. Further, the dynamic range after despreading can be kept narrower by replacing the threshold value in FIG. 2 with the threshold value in FIG.
[0035]
Embodiment 2. FIG.
In order to suppress the dynamic range of each correlator (2a, 2b) output in the first embodiment described above, in this embodiment, an averager for averaging is added to AGC to reduce the number of bits. To stabilize the reception performance at the time.
[0036]
FIG. 4 is a diagram showing the configuration of the second embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 4, 3a is an AGC and 35 is an averager. In addition, about the structure similar to Embodiment 1 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 1 is demonstrated.
[0037]
For example, when the maximum value detection circuit 32 detects the maximum amplitude value of the output signals 81a and 81b of each correlator, the averager 35 that has received the maximum amplitude value causes fading or shadowing in the reception transmission path environment. Averaging is performed for a time sufficient to absorb the fluctuations.
[0038]
Thus, in this embodiment, as described above, the averaging process is performed over a time period during which fading fluctuations can be absorbed, thereby reducing the influence on the bit position selection operation due to a sudden decrease or increase in received power. Let Thereby, a more stable dynamic range can be ensured.
[0039]
Embodiment 3 FIG.
In the present embodiment, the above-described first or second embodiment is applied to a RAKE receiver that synthesizes a plurality of delayed waves.
[0040]
FIG. 5 is a diagram showing the configuration of the third embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 5, 41a is a despreading unit (1), 41b is a despreading unit (N), 42 is an AGC, 30a is an effective bit position determining circuit, and 43 is a phase detection / RAKE combiner. It is. In addition, about the structure similar to Embodiment 1 or 2 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 1 and 2 is demonstrated.
[0041]
For example, in a RAKE receiver, a part for despreading / phase detecting each delayed wave is generally called a “finger”, but in FIG. 5, it has N (N is an integer of 2 or more) fingers. The case where it applies to a RAKE receiver is shown. In FIG. 5, each of the N fingers includes despreading units (41a, 41b) including two correlators corresponding to an I (in-phase) component and a Q (quadrature) component, respectively, and each output of the despreading unit. Is m bits.
[0042]
In this embodiment, all the m-bit outputs are sent to the AGC 42, and thereafter, the effective bit position determination circuit 30a in the AGC 42 performs the same operation as described above, And then determining the n-bit effective bit position of each correlation value output, and each selector (34a, 34b) determines the correlator based on the n-bit effective bit position common to all fingers. Select / output valid bit of output. Thereafter, the n-bit signal that has passed through each selector is received by the phase detector / RAKE combiner 43, and the phase detector / RAKE combiner 43 generates a demodulated symbol based on the received n-bit signal.
[0043]
In this way, in this embodiment, each selector selects an n-bit bit position common to all fingers based on the obtained effective bit position. In the state where RAKE combining is realized at a correct ratio, the number of processing bits can be reduced while ensuring the dynamic range of the digital part.
[0044]
Embodiment 4 FIG.
In spread spectrum communication, a pilot signal necessary for performing synchronous detection may be time-multiplexed and transmitted in a desired signal. Therefore, in the present embodiment, the spread spectrum receiver is applied to the above case.
[0045]
FIG. 6 is a diagram showing the configuration of the fourth embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 6, 44a and 44b are switches, 45a is a pilot symbol AGC, 45b is a data symbol AGC, and 46 is an effective bit position determining circuit. In addition, about the structure similar to Embodiment 1, 2, or 3 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 1, 2, and 3 is demonstrated.
[0046]
For example, when the pilot signal is time-multiplexed in the received signal, each switch separates the data symbol and pilot symbol of the output signal in correlators 2a and 2b in time. Next, AGCs 45a and 45b are prepared for the pilot symbols and data symbols separated by the respective switches. In each AGC, the number of bits is processed by the same processing as in the first or second embodiment. Reduce.
[0047]
Thus, in the present embodiment, data symbols and pilot symbols are temporally separated from the received signal, and gain control is performed using the separated pilot symbols, for example, the pilot signal is included in the received signal. Even in the case of time multiplexing, the number of processing bits can be reduced while ensuring the dynamic range of the digital part.
[0048]
Embodiment 5 FIG.
In the fourth embodiment, the pilot signal is time-multiplexed. However, in the present embodiment, the pilot signal is code-multiplexed and transmitted using a spreading code different from that used for the desired signal. Indicates when to do.
[0049]
FIG. 7 is a diagram showing the configuration of the fifth embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 7, 4a is a pilot channel reference signal generator for generating a reference signal, and 4b is a data channel reference signal generator for generating a reference signal different from the pilot channel reference signal generator 4a. In addition, about the structure similar to Embodiment 1-4 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 1-4 is demonstrated.
[0050]
For example, when the pilot signal is code-multiplexed, in the spread spectrum receiver, correlators 2a and 2b use the data channel for information transmission and the pilot channel for pilot transmission in the received signal at the time of despreading. Separation is performed by changing the reference signal (spreading code). Next, AGCs 45a and 45b are prepared for the pilot channel and the data channel separated by each correlator, respectively, and each AGC performs the same processing as in the first or second embodiment to perform bit processing. Reduce the number.
[0051]
As described above, in the present embodiment, the data channel and the pilot channel are separated from the received signal using different reference signals, respectively, and gain control is performed using the separated pilot channel. Even when pilot signals are code-multiplexed, it is possible to reduce the number of processing bits while ensuring the dynamic range of the digital part.
[0052]
Embodiment 6 FIG.
In wireless communications, especially mobile communications, bit-wise or symbol-wise interleaving and error-correcting codes are used to prevent demodulation characteristics from deteriorating due to an instantaneous drop in reception level due to fading or shadowing in the propagation path environment. Is widely used. The present embodiment is also applicable to a spread spectrum communication apparatus in which such interleaving and error correction codes are used.
[0053]
FIG. 8 is a diagram showing the configuration of the sixth embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 8, 47 is a synchronous detection circuit, 48 is a delay device, and 49 is an amplitude value correction circuit. In addition, about the structure similar to Embodiment 1 or 2 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 1 or 2 is demonstrated.
[0054]
For example, when a received signal subjected to error correction coding is decoded, the amplitude value of the received symbol is widely used as the reliability of individual symbols required for error correction. When interleaving is used in combination with an error correction code, decoding of the error correction code is widely performed in units of the interleaving time length, for example, about 10 ms to 80 ms.
[0055]
From these two things, in this embodiment, when the number of bits of the received digital signal is reduced, the decoding performance of the error correction code is not deteriorated for all the received symbols included in the interleave time unit. That is, the number of bits is reduced so as not to give a gain difference or amplitude fluctuation between symbols due to factors other than transmission path fluctuation.
[0056]
Therefore, the delay unit 48 delays the n-bit position selection information given to the selectors 34 a and 34 b by a time corresponding to the synchronous detection processing time in the synchronous detection circuit 47, and then outputs it to the amplitude value correction circuit 49. . Then, the amplitude value correction circuit 49 performs a bit shift of the signal so as to compensate for the bit selection operation performed by the AGC 3. More specifically, when the n-bit signal is selected from the m-bit signal in the AGC 3 and the deleted bit number is S (S is an integer equal to or less than m), the amplitude value correction circuit 49 Multiply the output signal by an S-power value of 2. Note that the process of multiplying the S-th power value of 2 can be realized by a left shift of S bits in the digital circuit.
[0057]
As described above, in the present embodiment, the delay unit 48 converts the n-bit position selection information into the synchronous detection circuit so that the decoding performance of the error correction code does not deteriorate for all the received symbols included in the interleave time unit. The amplitude value correction circuit 49 performs a bit shift of the n-bit signal using the delayed n-bit position selection information. As a result, even when error correction code or interleaving is used, synchronous detection with a reduced number of processing bits is achieved while ensuring the dynamic range of the digitized received signal without degrading the decoding performance of the error correction code. Can be done.
[0058]
Embodiment 7 FIG.
In the present embodiment, the configuration in the above-described fourth embodiment is applied as a RAKE receiver.
[0059]
FIG. 9 is a diagram showing the configuration of the seventh embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 9, 51a is a despreading unit (1), 51b is a despreading unit (N), 52a and 52b are delay units, 53a is a pilot symbol bit selection unit (AGC), and 53b Is a data symbol bit selector (AGC), and 46a and 46b are effective bit position determining circuits. In addition, about the structure similar to Embodiment 1-6 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 4 is demonstrated.
[0060]
In the present embodiment, the number of correlators performing despreading is increased by the number of fingers constituting the RAKE receiver, and the AGC for pilot symbols and data symbols is received by RAKE reception as compared with the fourth embodiment. AGCs 53a and 53b, which are intended for correlator outputs of all fingers constituting the machine, are respectively replaced. Further, by inserting the delay units (52a, 52b) into the outputs of the plurality of correlators (2a, 2b) in the despreading units (51a, 51b) of each finger, outputs different despread values for each finger. Timing is matched after despreading. As a result, the timing of the subsequent n-bit selection processing by AGC is the same among all fingers, and there is no variation in gain between fingers during RAKE combining.
[0061]
As described above, the present embodiment includes a plurality of configurations of the fourth embodiment in which data symbols and pilot symbols are temporally separated from a received signal, and gain control is performed using the separated pilot symbols. In the circuit after the AGC, gain variation between fingers does not occur, and the number of processing bits can be reduced while ensuring the dynamic range of the digital part in a state where RAKE combining is realized at a correct ratio.
[0062]
Embodiment 8 FIG.
In the present embodiment, the configuration in the above-described fifth embodiment is applied as a RAKE receiver.
[0063]
FIG. 10 is a diagram showing the configuration of the eighth embodiment of the spread spectrum receiving apparatus according to the present invention. In FIG. 10, 61a and 61c are pilot channel despreading units, 61b and 61d are data channel despreading units, and 62a and 62b are delay units. In addition, about the structure similar to Embodiment 1-7 mentioned above, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Here, a different part from Embodiment 5 is demonstrated.
[0064]
In the present embodiment, compared to the fifth embodiment, the number of sets of digital correlators for despreading pilot channels and data channels having different codes is increased by the number of fingers constituting the RAKE receiver, In addition, the AGCs for the pilot channel and the data channel are respectively replaced with AGCs 53a and 53b for the correlator outputs of all fingers constituting the RAKE receiver. Further, the delays (62a, 62b) are inserted into the outputs of the plurality of correlators (2a, 2b) in the channel despreading units (61a, 61b, 61c, 61d) of each finger, so that each finger is different. The timing of despreading is matched after despreading. As a result, the timing of the subsequent n-bit selection processing by AGC is the same among all fingers, and there is no variation in gain between fingers during RAKE combining.
[0065]
As described above, in the present embodiment, the configuration of the fifth embodiment in which the data channel and the pilot channel are separated from the received signal using different reference signals, and gain control is performed using the separated pilot channel. By providing a plurality, it is possible to reduce the number of processing bits while ensuring the dynamic range of the digital part in a state in which gain variation between fingers does not occur in a circuit after AGC and RAKE combining is realized at a correct ratio. Can do.
[0066]
【The invention's effect】
As described above, according to the present invention, for example, n bits (n is smaller than m) from an m-bit output signal based on the output signal of the digital correlator having a wide dynamic range and the maximum amplitude value detection result. (Integer) and reduce the number of bits of the despread signal. As a result, the number of processing bits can be reduced while ensuring a dynamic range in the digital unit, and thus a spread spectrum receiver capable of realizing a significant reduction in circuit scale and power consumption can be obtained. There is an effect.
[0067]
According to the next invention, on the basis of “the relationship between the maximum amplitude value and the bit position for selecting the bit of the despread output”, for example, n bits (n is greater than m) from the m-bit despread output. The effective bit position is determined so as to reduce the number of bits of the despread output. Thereby, since the number of processing bits can be reduced, the circuit scale and power consumption can be greatly reduced.
[0068]
According to the next invention, the effective bit position detection means changes, for example, the instantaneous observation and the long-time observation observed over a time longer than “instantaneous” according to the transmission path state. . As a result, the maximum amplitude value can be easily detected from the despread output.
[0069]
According to the next invention, the influence on the bit position selection operation due to a sudden decrease or increase in received power is reduced by performing the averaging process over a time period in which fading fluctuation can be absorbed. Thereby, there is an effect that a spread spectrum receiver capable of ensuring a more stable dynamic range can be obtained.
[0070]
According to the next invention, each bit selection means selects a bit position common to all fingers based on the obtained effective bit position information. As a result, a spread spectrum receiver capable of reducing the number of processing bits while ensuring the dynamic range of the digital part in a state in which gain variation between fingers does not occur and RAKE combining is realized at a correct ratio. There is an effect that it can be obtained.
[0071]
According to the next invention, data symbols and pilot symbols are temporally separated from the received signal, and gain control is performed using the separated pilot symbols. As a result, it is possible to obtain a spread spectrum receiver capable of reducing the number of processing bits while ensuring the dynamic range of the digital part even when the pilot signal is time-multiplexed with the received signal. There is an effect.
[0072]
According to the next invention, the data channel and the pilot channel are separated from the received signal using different reference signals, and gain control is performed using the separated pilot channel. As a result, even when a pilot signal is code-multiplexed with a received signal, a spread spectrum receiver capable of reducing the number of processing bits while ensuring the dynamic range of the digital part can be obtained. There is an effect.
[0073]
According to the next invention, the delay means delays the n-bit position selection information by the time of the synchronous detection processing time so that the decoding performance of the error correction code does not deteriorate for all received symbols included in the interleave time unit. The amplitude value correcting means performs bit shift using the delayed information. As a result, even when error correction code or interleaving is used, synchronous detection with a reduced number of processing bits is achieved while ensuring the dynamic range of the digitized received signal without degrading the decoding performance of the error correction code. There is an effect that it is possible to obtain a spread spectrum receiver that can be performed.
[0074]
According to the next invention, the data symbol and the pilot symbol are temporally separated from the received signal, and the gain control is performed using the separated pilot symbol. Provide multiple. As a result, a spread spectrum receiver capable of reducing the number of processing bits while ensuring the dynamic range of the digital part in a state in which gain variation between fingers does not occur and RAKE combining is realized at a correct ratio. There is an effect that it can be obtained.
[0075]
According to the next invention, the data channel and the pilot channel are separated from the received signal using different reference signals, respectively, and a plurality of configurations for performing gain control using the separated pilot channel are provided. As a result, a spread spectrum receiver capable of reducing the number of processing bits while ensuring the dynamic range of the digital part in a state in which gain variation between fingers does not occur and RAKE combining is realized at a correct ratio. There is an effect that it can be obtained.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a first embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 2 is a diagram illustrating a relationship between a maximum amplitude value and a bit position selected by each selector.
FIG. 3 is a diagram illustrating a relationship between a maximum amplitude value and a bit position selected by each selector.
FIG. 4 is a diagram showing a configuration of a second embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 5 is a diagram showing a configuration of a third embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 6 is a diagram showing a configuration of a fourth embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 7 is a diagram showing a configuration of a fifth embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 8 is a diagram showing a configuration of a sixth embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 9 is a diagram showing a configuration of a seventh embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 10 is a diagram showing a configuration of an eighth embodiment of a spread spectrum receiving apparatus according to the present invention.
FIG. 11 is a diagram illustrating a configuration of a conventional spread spectrum receiver.
FIG. 12 is a diagram showing a configuration of a conventional spread spectrum receiver.
[Explanation of symbols]
1a, 1b A / D converter, 2a, 2b correlator, 3, 3a gain controller (AGC), 4 reference signal generator, 4a reference signal generator for pilot channel, 4b reference signal generator for data channel, 30 , 30a Effective bit position determination circuit, 31a, 31b Absolute value circuit, 32 Maximum value detection circuit, 33 Comparator, 34a, 34b Selector, 41a Despreading unit (1), 41b Despreading unit (N), 42AGC, 43 Phase Detection / RAKE combiner, 44a, 44b switch, 45a AGC for pilot symbol, 45b AGC for data symbol, 46, 46a, 46b Effective bit position determination circuit, 47 Synchronous detection circuit, 48 delay unit, 49 Amplitude value correction circuit, 51a Despreading section (1), 51b Despreading section (N), 52a, 52b Delay unit, 53a Bit for pilot symbol Selection unit (AGC), 53b Data symbol bit selection unit (AGC), 61a, 61c Pilot channel despreading unit, 61b, 61d Data channel despreading unit, 62a, 62b Delay unit.

Claims (11)

In a spread spectrum receiver employing a spread spectrum modulation system,
A / D conversion means for converting a received analog baseband signal into a digital signal;
Digital correlation means for performing despreading processing on the digital signal;
Effective bit position determination means for converting the received signal after the despread processing into an amplitude value and determining an effective bit position of the despread output based on the amplitude value;
Bit selection means for narrowing down the number of bits of the despread output based on the effective bit position;
Equipped with a,
The effective bit position determining means includes
When n (n is an integer smaller than m) bits are extracted from the despread signal of m (arbitrary integer) bits, and the effective bit position is determined so as to reduce the number of bits of the output of the digital correlation means ,
The maximum amplitude is detected by observing the amplitude value over a predetermined time, and the most significant bit position in the m-bit signal, based on the number of effective bits defined according to the maximum amplitude, and the effective bit The position of the “n−1” bit selected from the remaining “m−1” bit signal so that the selected bit position becomes higher as the number is larger is determined as the effective bit position,
The spread spectrum receiving apparatus, wherein the effective bit position when the number of effective bits is less than n bits is fixed to the effective bit position when the number of effective bits is n . In a spread spectrum receiver employing a spread spectrum modulation system,
A / D conversion means for converting a received analog baseband signal into a digital signal;
Digital correlation means for performing despreading processing on the digital signal;
Effective bit position determination means for converting the received signal after the despread processing into an amplitude value and determining an effective bit position of the despread output based on the amplitude value;
Bit selection means for narrowing down the number of bits of the despread output based on the effective bit position;
With
The effective bit position determining means includes
When n (n is an integer smaller than m) bits are extracted from the despread signal of m (arbitrary integer) bits, and the effective bit position is determined so as to reduce the number of bits of the output of the digital correlation means ,
The maximum amplitude is detected by observing the amplitude value over a predetermined time, and the most significant bit position in the m-bit signal, based on the number of effective bits defined according to the maximum amplitude, and the effective bit The position of the “n−1” bit selected from the remaining “m−1” bit signal so that the selected bit position becomes higher as the number is larger is determined as the effective bit position,
When the number of effective bits is less than n bits, “the number of effective bits−1” from the most significant bit in the m-bit signal and the least significant bit in the remaining “m−1” -bit signal. And a bit lower than the effective bit position is set so that the amplitude level of the output of the bit selection means is maintained within a certain range. Spreading receiver. The effective bit position determining means includes
When observing the amplitude value for a predetermined time, according to claim, characterized in the case of observing instantaneously, and when observing for longer than "instant", that enables appropriately changed according to the transmission path state 1 Or a spread spectrum receiving apparatus according to 2; The effective bit position determining means includes
The spread spectrum receiver according to claim 1, 2 or 3, further comprising averaging an amplitude maximum value detected in the observation time unit.   5. A plurality of the digital correlation means are arranged in parallel, and each digital correlation means is used for despreading each delay path during multipath reception, respectively. Spread spectrum receiver. Separating means for temporally separating the data symbol and pilot symbol of the despread output when the pilot signal is time-multiplexed in the received signal;
With
The spread spectrum receiving apparatus according to any one of claims 1 to 4, wherein the effective bit position determining means and the bit selecting means are prepared for the separated pilot symbol and data symbol. When the pilot signal is code-multiplexed in the received signal, the digital correlation means uses a spreading code corresponding to each of the data channel for information transmission and the pilot channel for pilot transmission in the despread output. Separated by despreading,
The spread spectrum receiving apparatus according to any one of claims 1 to 4, wherein the effective bit position determining means and the bit selecting means are prepared for the separated pilot symbol and data symbol. Synchronous detection means for performing synchronous detection processing on the despread output;
Delay means for delaying the information for narrowing down the number of bits of the despread output by the bit selection means by the time required for the synchronous detection processing;
Amplitude value correcting means for correcting the amplitude value of the synchronous detection output based on the delay information;
The spread spectrum receiver according to any one of claims 1 to 4, wherein the spread spectrum receiver is provided. The digital correlation means and the separation means are arranged in parallel for the number of fingers,
A plurality of effective bit position determining means for detecting a maximum amplitude value from a plurality of despread outputs for each received physical channel and determining an effective bit position of the despread output based on the maximum amplitude value;
Bit selection means for each number of fingers required for RAKE reception, arranged in each effective bit position determination means unit;
With
7. The spread spectrum receiving apparatus according to claim 6, wherein each digital correlator is used for despreading each delay path during multipath reception. The digital correlation means are arranged in parallel for the number of fingers,
A plurality of effective bit position determining means for detecting a maximum amplitude value from a plurality of despread outputs for each received physical channel and determining an effective bit position of the despread output based on the maximum amplitude value;
Bit selection means for each number of fingers required for RAKE reception, arranged in each effective bit position determination means unit;
With
8. The spread spectrum receiving apparatus according to claim 7, wherein each digital correlation means is used for despreading each delay path during multipath reception. In a spread spectrum receiver employing a spread spectrum modulation system,
  A / D conversion means for converting a received analog baseband signal into a digital signal;
  Digital correlation means for performing despreading processing on the digital signal;
  An effective bit position determination means for converting the received signal after the despread processing into an amplitude value and determining an effective bit position of the despread output based on the amplitude value;
  Bit selection means for narrowing down the number of bits of the despread output based on the effective bit position;
  Synchronous detection means for performing synchronous detection processing on the despread output;
  Delay means for delaying the information for narrowing down the number of despread output bits by the bit selection means by the time required for the synchronous detection processing;
  Amplitude value correcting means for correcting the amplitude value of the synchronous detection output based on the delay information;
  A spread spectrum receiving apparatus comprising:

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