JP3875431B2 - Video signal converter - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a video signal conversion apparatus that converts a video signal into a video signal having a higher resolution.
[0002]
[Prior art]
In recent years, a plasma display display device (PDP), a liquid crystal display device (LCD), an electroluminescence display device (EL), and the like capable of reproducing a high resolution image have attracted attention.
[0003]
These display devices can display at a higher resolution than a video signal conforming to a standard television system such as the NTSC television system or the PAL television system. For this reason, when performing image reproduction or the like on these display devices based on standard television video signals, interpolation processing for interpolating interpolation signals between video signals (actual scanning signals) has been performed.
[0004]
An average value interpolation method is known as this conventional interpolation method. In the average value interpolation method, as shown in FIG.₁~ X₆When an interpolation signal (indicated by a black circle) is generated on the basis of the actual pixel scanning signal (indicated by a circle), first, an upper side having a gradation level that is ½ of each actual scanning signal. Interpolation components (indicated by Δ) and lower interpolation components (indicated by □) that are half the gradation level of each actual scanning signal are generated, and the upper interpolation component and the lower side that are adjacent to each other are generated. By adding the interpolation component, the gradation level y₁₂~ Y₅₆Each interpolated scanning signal is generated and interpolated between the actual scanning signals.
[0005]
For example, the actual scanning signal X₂, X_ThreeInterpolated scanning signal y interpolated between_{twenty three}Is the actual scanning signal X₂Lower interpolation component X generated from □₂/ 2 and actual scanning signal X_ThreeUpper interpolation component X of Δ mark generated from_Three/ 2, ie, (X₂/ 2) + (X_Three/ 2).
[0006]
  However, in the conventional average value interpolation method, it is difficult to reproduce the peak value lost when the video signal is sampled and converted into a digital signal, and as a result, the sharpness is lost and the conversion image quality is lowered. There was a problem.In addition, when interpolation processing is performed on an image of an oblique line having a width of about 3 lines in the vertical direction and about 3 dots in the horizontal direction, and the peak and edge are reproduced, the level of the actual pixel data and the level of the interpolation pixel There is a problem in that the image is deteriorated due to occurrence of a comb-tooth-like (gray-like) interference that can be uneven.
[0007]
The present invention has been made in view of the above-mentioned problems of the prior art. For example, video signal conversion that reproduces the peak value of a video signal lost by digital sampling and can effectively realize a good converted image. An object is to provide an apparatus.
[0008]
[Means for Solving the Problems]
  In order to achieve the above object, a video signal conversion apparatus according to the present invention comprises:Based on the actual scanning signal arranged in units of pixels on the vertical and horizontal scanning lines, an interpolated pixel interpolated scanning signal is generated, and the video signal composed of the actual scanning signal is interpolated. A video signal conversion device for converting into a high-resolution video signal in which pixel signals are interpolated, and each of coefficients for performing interpolation for averaging the levels of adjacent actual scanning signals based on the actual scanning signal Reference interpolation component value calculation means for obtaining a reference interpolation component value corresponding to each actual scanning signal by multiplying the level of the actual scanning signal, and one pixel and arranged on both sides in the scanning direction on the vertical or horizontal scanning line The level of the pixel adjacent to one side in the scanning direction of the one pixel is equal to the level of the pixel adjacent to the other side in the scanning direction of the one pixel. Greater If the level of a pixel adjacent to one side in the scanning direction of the one pixel is equal to or lower than the level of a pixel adjacent to the other side in the scanning direction of the one pixel, a negative sign is assigned. In addition, an upper interpolation component correction value is obtained for each actual scanning signal, and a positive or negative sign is added to the upper interpolation component correction value to obtain a lower interpolation component correction value for each actual scanning signal. The generation means and two adjacent pixels arranged on the vertical or horizontal scanning line, the actual interpolation signal in the actual scanning signal of the pixel on the one side in the scanning direction out of the two pixels. A reference interpolation component value in the scanning signal is added to generate a first interpolation component signal, and the upper interpolation component correction value in the actual scanning signal of the pixel on the other side in the scanning direction of the two pixels is added to the reference in the actual scanning signal. interpolation An interpolation scanning signal generating means for generating a second interpolation component signal by adding a fractional value and generating the interpolation scanning signal between the two adjacent pixels by adding the second interpolation component signal to the first interpolation component signal Based on the actual scanning signal levels of one pixel and two pixels arranged adjacent to both sides in the scanning direction on the vertical or horizontal scanning line, the level of the one pixel is determined in the scanning direction. In the case where the level of the two pixels arranged adjacent to both sides changes in a mountain-like manner, the level of the one pixel is corrected to be higher, and the level of the one pixel is on both sides in the scanning direction. An actual scanning signal correcting means for generating a correction signal for correcting the level of the one pixel to be lower when the level is changed in a valley with respect to the level of two pixels arranged adjacent to each other; and the actual scanning Generated by signal correction means Interpolating processing means for interpolating the interpolated scanning signal generated by the interpolated scanning signal generating means between correction signals and outputting pixel data on a vertical or horizontal scanning line.It is characterized by that.
[0009]
In addition to the above-described feature, the interpolation component generation unit includes a first addition unit that outputs a sum of level differences between adjacent pixels in two pixels arranged on one side in the scanning direction from the one pixel. A second adding means for outputting a sum of level differences between adjacent pixels in two pixels arranged on the other side in the scanning direction from the one pixel, and two arranged on both sides in the scanning direction of the one pixel. Level difference output means for outputting a level difference between pixels, and adjusting the level of a minimum value among the output of the first addition means, the output of the second addition means, and the output of the level difference output means The level value is output.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a video signal conversion apparatus 1 according to the present embodiment.
[0013]
In the figure, this video signal conversion apparatus 1 includes a plurality of delay circuits 2 to 6, arithmetic units 7 to 19, absolute value circuits 20 to 24, 33, a first code generation circuit 25, a first minimum value selector. Circuit 26, interpolation component generation circuit 27, coefficient circuits 28 to 30, difference absolute value circuits 31 and 32, second code generation circuit 34, second minimum value selector circuit 35, correction component generation circuit 36, and time axis conversion A circuit 37 is provided.
[0014]
Then, for example, an interlaced input video signal S1 conforming to the NTSC system is converted into a sequential scanning (non-interlaced) video signal Sout and output. Although not shown, the luminance signal Y and the color difference signal P_B, P_R1 are provided in parallel in order to generate sequentially scanned video signals Sout.
[0015]
Here, each of the delay circuits 2 to 6 is formed by a FIFO (first in first out) memory or the like that sequentially outputs an input signal with a delay of one horizontal period (1H period). Therefore, the delay circuits 2, 3, 4 and 5 are video signals (hereinafter referred to as actual scanning signals (pixel data)) S2 and S3 which are delayed by 1H, 2H, 3H and 4H periods from the input video signal (pixel data) S1. , S4, S5 are output. The delay circuit 6 transfers the output signal of the arithmetic unit 14 to the arithmetic unit 16 with a delay of 1H period.
[0016]
The calculators 7 to 11 are each formed of a subtractor that calculates a difference between two input signals and outputs the difference signal. That is, the computing unit 7 is the difference between the input video signal S1 and the actual scanning signal S2, the computing unit 8 is the difference between the actual scanning signals S2 and S3, the computing unit 9 is the difference between the actual scanning signals S2 and S4, and the computing unit 10 is the actual one. The difference between the scanning signals S3 and S4, the calculator 11 calculates the difference between the actual scanning signals S4 and S5, and outputs each difference signal.
[0017]
The absolute value circuits 20 to 24 are connected in association with the calculators 7 to 11, calculate the absolute value of each of the above difference signals, and output the respective absolute value signals. The absolute value signal m2 generated by the absolute value circuit 22 is supplied to the first minimum value selector circuit 26.
[0018]
The arithmetic units 12 and 13 are formed by an adder that adds two input signals and outputs the added signal. That is, the arithmetic unit 12 adds the above absolute value signals generated by the absolute value circuits 20 and 21, and supplies an addition signal m 1 as a result of the addition to the first minimum value selector circuit 26. The arithmetic unit 13 adds the absolute value signals generated by the absolute value circuits 23 and 24, and supplies an addition signal m3 as a result of the addition to the first minimum value selector circuit 26.
[0019]
The first minimum value selector circuit 26 compares the gradation levels of the addition signals m1 and m3 and the absolute value signal m2, and outputs the signal having the smallest value as the minimum value signal M.
[0020]
The coefficient circuit 28 adjusts the level by multiplying the minimum value signal M by k1, and outputs the adjusted minimum value signal M ′ (= k1 × M) whose level is adjusted. The coefficient k1 is a value in the range of 0 <k1 <1, and in this embodiment, the coefficient k1 is set to a constant of k1 = 1/4.
[0021]
The first code generation circuit 25 compares the gray levels of the actual scanning signals S2 and S4, and outputs a code signal Fp indicating a plus (positive) sign if S2 ≦ S4, and S2> S4. If the relationship is, a sign signal Fp indicating a minus (negative) sign is output.
[0022]
That is, as schematically shown in FIG. 2A, when the gradation level of the actual scanning signal S4 2H before the actual scanning signal S2 is larger than that of the actual scanning signal S2, the code signal Fp becomes positive, and FIG. As schematically shown in b), when the gradation level of the actual scanning signal S4 is smaller than the actual scanning signal S2, the sign signal Fp is negative.
[0023]
The interpolation component generation circuit 27 generates and outputs an upper interpolation component correction value Su and a lower interpolation component correction value Sd for the pixel data S3 based on the adjustment minimum value signal M ′ and the sign signal Fp.
[0024]
That is, when the sign signal Fp is positive (positive), a positive upper interpolation component correction value Su (= M ′) and a negative lower interpolation component correction value Sd (= −M ′) are generated. The Therefore, when the sign signal Fp is positive (positive), each signal Su, Sd is expressed by the following equations (1-a) (1-b):
Su = M ′ = k1 × M (1-a)
Sd = −M ′ = − k1 × M (1-b)
It becomes.
[0025]
On the other hand, when the sign signal Fp is negative (negative), a negative upper interpolation component correction value Su (= −M ′) and a positive lower interpolation component correction value Sd (= M ′) are generated. The In this case, as represented by the following equations (2-a) (2-b), the correction values Su and Sd are
Su = −M ′ = − k1 × M (2-a)
Sd = M ′ = k1 × M (2-b)
It becomes.
[0026]
The coefficient circuit 29 adjusts the level by multiplying the actual scanning signal (pixel data) S3 supplied in units of pixels from the delay circuit 3 by k2, and the level-adjusted reference interpolation component value Sa (= k2 × S3). Output. In this embodiment, the coefficient k2 is set to k2 = 1/2, and as a result, the gradation level of the reference interpolation component value Sa is set to 1/2 of the actual scanning signal S3.
[0027]
The computing units 14 and 15 are both formed by adders. The computing unit 14 adds the reference interpolation component value Sa and the lower interpolation component signal Sd, outputs a first interpolation component signal Sda (= Sa + Sd) obtained thereby, and supplies the first interpolation component signal Sda (= Sa + Sd) to the delay circuit 6. The circuit 6 supplies the first interpolation component signal Sda before 1H period, that is, the lower interpolation component signal of the actual scanning signal S4, to the calculator 16 composed of an adder. The calculator 15 adds the reference interpolation component value Sa and the upper interpolation component correction value Su, and calculates the second interpolation component signal Sua (= Sa + Su) obtained thereby, that is, the upper interpolation component signal of the actual scanning signal S3. Supply directly to the vessel 16.
[0028]
Therefore, the first interpolation component signal Sda and the second interpolation component signal Sua are expressed by the following equations (3-a) and (3-b):
Sda = Sa + Sd (3-a)
Sua = Sa + Su (3-b)
It becomes.
[0029]
Here, when the sign signal Fp is positive (positive), the first interpolation component signal Sda is −k1 × M than the reference interpolation component signal Sa, as indicated by Δ in FIG. The second interpolation component signal Sua becomes a value larger by k1 × M than the reference interpolation component signal Sa, as indicated by □.
[0030]
When the sign signal Fp is negative (negative), the first interpolation component signal Sda is larger by k1 × M than the reference interpolation component signal Sa, as indicated by the Δ mark in FIG. The second interpolation component signal Sua becomes a value smaller by −k1 × M than the reference interpolation component signal Sa, as indicated by the □ mark.
[0031]
In this way, the first and second interpolation component signals Sda and Sua have the gradation levels of the actual scanning signals (actual pixel data) S2 and S4 located above and below the actual scanning signal (actual pixel data) S3. It is set to a value according to the change tendency.
[0032]
Then, the arithmetic unit 16 adds the first and second interpolation component signals Sda and Sua to interpolate between the actual scanning signals (actual pixel data) that are continuous in the vertical direction in the current field ( Correction pixel data) Cv is generated and supplied to the time axis conversion circuit 37.
[0033]
As shown in FIG. 1, the first interpolation component signal Sda is delayed by 1H period by the delay circuit 6 and then added to the second interpolation component signal Sua by the calculator 16. For this reason, the second interpolation component signal (upper interpolation component signal of the pixel data S3) Sua generated at the present time and the first interpolation component signal (lower interpolation component signal of the pixel data S4) Sda generated 1H before. Are added to generate an interpolated scanning signal (interpolated pixel data) Cv for interpolation between actual scanning signals (actual pixel data) S3 and S4.
[0034]
Next, the difference absolute value circuits 31 and 32 are both formed of a subtractor for obtaining a difference between two input signals and an absolute value circuit for obtaining an absolute value of a difference signal generated by the subtracter. The difference absolute value circuit 31 calculates the absolute value | S4-S3 | of the difference between the actual scanning signals (actual pixel data) S3 and S4 and supplies the absolute value signal n1 to the second minimum value selector circuit 35. The difference absolute value circuit 32 obtains the absolute value | S5-S4 | of the difference between the actual scanning signals (actual pixel data) S4 and S5 and supplies the absolute value signal n2 to the second minimum value selector circuit 35.
[0035]
The arithmetic units 17 and 18 are each formed by an adder and a subtracter, and the coefficient circuit 30 is set with a predetermined constant coefficient k3 in advance. In the present embodiment, the coefficient k3 is set to a constant k3 = 1/2.
[0036]
  Then, the arithmetic unit 17 adds the actual scanning signals (actual pixel data) S3 and S5, and the addition signal (S3 + S5) is output by the coefficient circuit 30 multiplied by k3, and further, the arithmetic unit 18 outputs the output of the coefficient circuit 30. Is subtracted from the actual scanning signal (actual pixel data) S4 to generate an adjustment component signal Sh represented by the following equation (5).
Sh = S4-k3 × (S3 + S5) ... (5)
  The absolute value circuit 33 obtains the absolute value | Sh | of the adjustment component signal Sh and supplies the absolute value signal n3 generated thereby to the second minimum value selector circuit 35.
[0037]
The sign generation circuit 34 checks the polarity of the adjustment component signal Sh, and outputs a sign signal Fc representing a plus (positive) sign when Sh ≧ 0, and minus (negative) when Sh <0. Is output to the correction component generation circuit 36.
[0038]
That is, as shown in FIG. 4A, among the actual scanning signals (actual pixel data) S3, S4, and S5 positioned on the three actual scanning lines that are continuous in the vertical direction, the gradation level of the actual scanning signal S4 is In the case where the actual scanning signals S3 and S5 change in a mountain-like manner, the adjustment component signal Sh becomes Sh ≧ 0 from the relationship of the above equation (5). Therefore, positive edge detection of the actual scanning signal S4 with respect to the actual scanning signals S3 and S5 is performed, and in this case, the sign signal Fc is positive.
[0039]
Further, as shown in FIG. 4B, among the actual scanning signals S3, S4, and S5 positioned on the three actual scanning lines that are continuous in the vertical direction, the gradation level of the actual scanning signal S4 is the actual scanning signal S3. In the case of changing to a valley with respect to S5, the adjustment component signal Sh is Sh <0 from the relationship of the above equation (5). Accordingly, the negative edge detection of the actual scanning signal S4 with respect to the actual scanning signals S3 and S5 is performed, and in this case, the sign signal Fc is negative.
[0040]
The second minimum value selector circuit 35 compares the absolute value signals n <b> 1 to n <b> 3 and outputs the signal having the smallest value as the minimum value signal N.
[0041]
The correction component generation circuit 36 generates and outputs a correction component signal Sc based on the minimum value signal N and the sign signal Fc. That is, if the sign signal Fc is negative, the correction component signal Sc is Sc = −N, and if the sign signal Fc is positive, the interpolation component signal Sc is Sc = N.
[0042]
The arithmetic unit 19 adds (mixes) the correction component signal Sc and the actual scanning signal S4 supplied from the delay circuit 4, and supplies the addition result to the time axis conversion circuit 37 as a correction signal Cc. That is, if the sign signal Fc is negative, the correction signal Cc is Cc = −N + S4. If the sign signal Fc is positive, the correction signal Cc is Cc = N + S4.
[0043]
More specifically, as shown in FIG. 4A, when the gradation level of the actual scanning signal S4 changes in a mountainous manner relative to the actual scanning signals S3 and S5, the correction signal Cc is As indicated by the dotted circles in the figure, the gradation level is corrected to be higher than that of the actual scanning signal S4 based on the relationship of Cc = N + S4.
[0044]
Further, as shown in FIG. 4B, when the gradation level of the actual scanning signal S4 changes in a valley shape with respect to the actual scanning signals S3 and S5, the correction signal Cc is As indicated by a dotted circle, the gradation level is corrected to be lower than that of the actual scanning signal S4 based on the relationship of Cc = −N + S4.
Then, the time axis conversion circuit 37 alternately interpolates the interpolation scanning signal Cv and the correction signal Cc, thereby generating a video signal Sout for sequential scanning from the actual scanning signal for interlaced scanning. Accordingly, the actual scanning signal S4 is replaced with the correction signal Cc, and the correction signal Cc is interpolated together with the interpolation scanning signal Cv as the actual scanning signal on the original actual scanning line.
[0045]
Next, the operation of the video signal conversion apparatus 1 having such a configuration will be described with reference to FIGS. FIG. 5 is an explanatory diagram showing an example of the arrangement of video signals (actual scanning signals) in the current field in temporal and spatial pixel units, where the actual scanning signal is indicated by a circle and the interpolated scanning signal is indicated. It is indicated by □. Further, the actual scanning signals for each pixel are arranged in a matrix in the horizontal direction and the vertical direction, and the array positions are indicated by row numbers i and column numbers j. In addition, the time between actual scanning signals adjacent to each other in the vertical direction is 1H period, and the interval between actual scanning signals adjacent to each other in the horizontal direction is one dot period (1D).
[0046]
In FIG. 5, if the actual scanning signal S3 corresponds to the position of i rows and j columns, the other actual scanning signals S1, S2, S4 and S5 also correspond to positions shifted by 1H period along the i row. become.
[0047]
Here, the interpolation scanning signal Cv to be inserted at the position between the actual scanning signals S3 and S4 is generated by adding the first and second interpolation component signals Sda and Sua as described in FIGS. Then, by the interpolating process in the time axis conversion circuit 37, they are arranged at the interpolating position.
[0048]
  That is, as shown in FIG. 6, the second interpolation component signal (upper interpolation component signal of the pixel data S3) Sua generated based on the actual scanning signal S3 and the actual scanning signal S4 before 1H period are generated. First interpolation componentsignalAn interpolation scanning signal Cv is generated by the arithmetic unit 16 adding (lower interpolation component signal) Sda (pixel data S4), and this interpolation scanning signal Cv is interpolated with the interpolation scanning signal Cv34 indicated by ● in FIG. Become. Further, other interpolation scanning signals Cv12, Cv23, Cv45,...
[0049]
Further, the arithmetic unit 19 adds the correction component signal Sc output from the correction component generation circuit 36 and the actual scanning signal S4 to generate a correction signal Cc, and the time axis conversion circuit 37 executes the correction signal Cc. It replaces and arranges at the position of the scanning signal S4. That is, each of the actual scanning signals S1, S2, S3, S4, and S5 indicated by the circles in FIG. 6 is converted as a correction signal Cc whose gradation level is adjusted, and is returned to the position of the original actual scanning line. Arranged.
[0050]
As a result of such processing being continuously performed on the interlaced video signal, a progressively scanned video signal is generated from the interlaced video signal.
[0051]
In the above-described embodiment, an example in which the number of pixel data (the number of scanning lines) is doubled in the vertical direction has been described. However, the present invention is not limited thereto, and the present invention can be applied to a configuration in which the number of pixel data is doubled in the horizontal direction. In this case, the 1H delay circuits 2, 3, 4, 5 and 6 in FIG. 1 are set as delay circuits that delay by 1D period, and the remaining arithmetic units 7 to 16, absolute value circuits 20 to 24, and code generation circuit 25, the minimum value selector circuit 26 and the coefficient circuit 28 may be configured in the same connection as in FIG. In this configuration, the interpolated scanning signal Cv in FIG. 1 is generated as horizontal interpolated pixel data Ch to be inserted between adjacent pixel data on the same scanning line.
[0052]
In particular, in the average value interpolation method of the prior art, as shown in FIG. 7, it was difficult to reproduce the peak value lost when the video signal was sampled and converted into a digital signal. In the embodiment, as indicated by the ● marks in FIG. 6, the reproducibility of the peak value can be improved, and the edge contrast at the contour portion of the image can be clearly reproduced.
[0053]
In addition, when the above-described interpolation processing is performed on an oblique line image having a width of about 3 lines in the vertical direction and about 3 dots in the horizontal direction, and peaks and edges are reproduced, a comb-like shape (a jagged shape) is obtained. Will cause image degradation. However, according to the present embodiment, as indicated by the circles in FIG. 6, the correction value is added to the actual pixel data itself so as to cancel this interference. The gradation level changes smoothly, and a high-quality image or the like can be realized.
[0054]
As described above, the interpolated pixel interpolated scanning signal is generated based on the actual scanning signal arranged in units of pixels on the vertical and horizontal scanning lines, and the interpolated scanning signal is generated from the actual scanning signal. A video signal conversion device that converts a video signal to a high-resolution video signal interpolated with the interpolated pixel signal, and interpolates an average of the levels of adjacent actual scanning signals based on the actual scanning signal A reference interpolation component value calculating means for obtaining a reference interpolation component value corresponding to each actual scanning signal by multiplying the level of each actual scanning signal by a coefficient for performing one pixel and its scanning on a vertical or horizontal scanning line The level of a pixel adjacent to one side in the scanning direction of the one pixel is equal to the level value obtained based on the level of each actual scanning signal of the plurality of pixels arranged on both sides in the direction. Adjacent to When the level is larger than the pixel level, a positive sign is attached. When the level of the pixel adjacent to the one side in the scanning direction of the one pixel is equal to or lower than the level of the pixel adjacent to the other side of the one pixel in the scanning direction. A negative sign is added to obtain an upper interpolation component correction value for each actual scanning signal, a sign opposite to that is added to the upper interpolation component correction value, and a lower interpolation component correction value for each actual scanning signal. The lower interpolation component correction in the actual scanning signal of the pixel on the one side in the scanning direction out of the two pixels, with the interpolation component generating means for obtaining the pixel and two adjacent pixels arranged on the vertical or horizontal scanning line A reference interpolation component value in the actual scanning signal is added to the value to generate a first interpolation component signal, and the actual interpolation signal correction value in the actual scanning signal of the other pixel in the scanning direction of the two pixels is added to the actual interpolation signal. scanning Interpolation for generating a second interpolation component signal by adding a reference interpolation component value in the signal, and adding the second interpolation component signal to the first interpolation component signal to generate the interpolated scanning signal between the two adjacent pixels The level of the one pixel based on the level of the actual scanning signal of one pixel and two pixels arranged adjacent to both sides in the scanning direction on the scanning signal generating means and the vertical or horizontal scanning line Is corrected in a mountain-like manner with respect to the level of two pixels arranged adjacent to both sides in the scanning direction, the level of the one pixel is corrected to be higher, and the level of the one pixel is An actual scanning signal correcting means for generating a correction signal for correcting the level of the one pixel to be lower when the level is changed in a valley with respect to the level of two pixels arranged adjacent to both sides in the scanning direction; The actual scanning signal correction hand Interpolating processing means for interpolating the interpolated scanning signal generated by the interpolated scanning signal generating means between the correction signals generated by the stages and outputting pixel data on the scanning lines in the vertical or horizontal direction,Comb-tooth shape that improves the reproducibility of the peak value in the interpolated pixel, clearly reproduces the edge contrast in the contour portion of the image, and makes the actual scanning signal level and the interpolation scanning signal level zigzag. Can be canceled, and a change in gradation level with the actual scanning signal can be smoothed to realize a high-quality image or the like.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of a video signal conversion apparatus according to an embodiment.
FIG. 2 is an explanatory diagram for explaining a function of a first code generation circuit;
FIG. 3 is an explanatory diagram showing gradation levels of a first interpolation component signal and a second interpolation component signal.
FIG. 4 is an explanatory diagram for explaining a function of a second code generation circuit;
FIG. 5 is an explanatory diagram showing a temporal and spatial arrangement of an actual scanning signal and an interpolated scanning signal.
FIG. 6 is an explanatory diagram for explaining an interpolating process in the vertical direction;
FIG. 7 is an explanatory diagram showing a process of generating an interpolated scanning signal by a conventional average value interpolation method.
[Explanation of symbols]
1 ... Video signal converter
2-6 Delay circuit
7 to 19 ... Calculator
20 to 24, 33 ... absolute value circuit
25. First code generation circuit
26: First minimum value selector circuit
27. Interpolation component generation circuit
28-30 ... Coefficient circuit
31, 32 ... Difference absolute value circuit
34. Second code generation circuit
35. Second minimum value selector circuit
36. Correction component generation circuit
37. Time axis conversion circuit

Claims (2)

Based on the actual scanning signal arranged in units of pixels on the vertical and horizontal scanning lines, an interpolated pixel interpolated scanning signal is generated, and the video signal composed of the actual scanning signal is interpolated. A video signal conversion device for converting into a high-resolution video signal in which pixel signals are interpolated,
Based on the actual scanning signal, a reference interpolation for obtaining a reference interpolation component value corresponding to each actual scanning signal by multiplying the level of each actual scanning signal by a coefficient for performing interpolation for averaging the levels of adjacent actual scanning signals Component value calculation means;
On the scanning line in the vertical or horizontal direction, the level value obtained based on the level of each actual scanning signal of one pixel and a plurality of pixels arranged on both sides in the scanning direction is set to one side in the scanning direction of the one pixel. When the level of an adjacent pixel is larger than the level of a pixel adjacent to the other side in the scanning direction of the one pixel, a positive sign is given, and the level of the pixel adjacent to the one side in the scanning direction of the one pixel is set to the one. When the level is lower than the level of a pixel adjacent to the other side in the scanning direction of one pixel, a negative sign is added to obtain an upper interpolation component correction value for each actual scanning signal, and the upper interpolation component correction value is positive or negative. Interpolation component generating means for obtaining a lower interpolation component correction value for each actual scanning signal,
In two adjacent pixels arranged on a vertical or horizontal scanning line, the lower interpolation component correction value in the actual scanning signal of the pixel on one side in the scanning direction of the two pixels is used as a reference in the actual scanning signal. A first interpolation component signal is generated by adding an interpolation component value, and a reference interpolation component value in the actual scanning signal is added to the upper interpolation component correction value in the actual scanning signal of the other pixel in the scanning direction among the two pixels. In addition, an interpolation scanning signal generation unit that generates a second interpolation component signal, adds the second interpolation component signal to the first interpolation component signal, and generates the interpolation scanning signal between the two adjacent pixels;
On the vertical or horizontal scanning line, based on the actual scanning signal levels of one pixel and two pixels arranged adjacent to both sides in the scanning direction, the level of the one pixel is set on both sides in the scanning direction. In the case where the level of two pixels arranged adjacent to each other changes in a mountain-like manner, the level of the one pixel is corrected to be higher, and the level of the one pixel is adjacent to both sides in the scanning direction. An actual scanning signal correcting means for generating a correction signal for correcting the level of the one pixel to be lower when the level of the two pixels arranged in a valley is changed to a valley.
An interpolating means for interpolating the interpolated scanning signal generated by the interpolated scanning signal generating means between the correction signals generated by the actual scanning signal correcting means and outputting pixel data on a vertical or horizontal scanning line; ,
Video signal converting apparatus comprising: a. The interpolation component generation means includes a first addition means for outputting a sum of level differences between adjacent pixels in two pixels arranged on one side in the scanning direction from the one pixel, and the other in the scanning direction from the one pixel. Second addition means for outputting a sum of level differences between adjacent pixels in two pixels arranged on the side, and a level for outputting a level difference between two pixels arranged on both sides in the scanning direction of the one pixel A difference output means, and outputs the level value by adjusting the level of the minimum value among the output of the first addition means, the output of the second addition means, and the output of the level difference output means. The video signal converter according to claim 1.

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