JP3841038B2 - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device Download PDF

Info

Publication number
JP3841038B2
JP3841038B2 JP2002309330A JP2002309330A JP3841038B2 JP 3841038 B2 JP3841038 B2 JP 3841038B2 JP 2002309330 A JP2002309330 A JP 2002309330A JP 2002309330 A JP2002309330 A JP 2002309330A JP 3841038 B2 JP3841038 B2 JP 3841038B2
Authority
JP
Japan
Prior art keywords
lead
resin
die pad
semiconductor device
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002309330A
Other languages
Japanese (ja)
Other versions
JP2004146562A (en
Inventor
高志 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2002309330A priority Critical patent/JP3841038B2/en
Publication of JP2004146562A publication Critical patent/JP2004146562A/en
Application granted granted Critical
Publication of JP3841038B2 publication Critical patent/JP3841038B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体素子を搭載したリードフレームタイプの樹脂封止型半導体装置およびその製造方法に関し、特に半導体素子の電極から金属細線により接続されたリード部の封止樹脂との密着性を向上させて、剥がれ等を防ぐことのできる樹脂封止型半導体装置およびその製造方法に関するものである。
【０００２】
【従来の技術】
近年、電子機器の小型化に対応するために、樹脂封止型半導体装置などの半導体部品の高密度実装が要求され、それにともなって、半導体部品の小型、薄型化が進んでいる。また小型で薄型でありながら、多ピン化が進み、高密度の小型、薄型の樹脂封止型半導体装置が要望されている。
【０００３】
以下、従来のダイパッド部露出型の樹脂封止型半導体装置について説明する。図６は従来の樹脂封止型半導体装置を示す図面であり、図６（ａ）は平面図、図６（ｂ）は底面図、図６（ｃ）は図６（ｂ）のＡ−Ａ１箇所の断面図である。
【０００４】
図６に示すように、リードフレームのダイパッド部１０１上に半導体素子１０２が搭載され、その半導体素子１０２とインナーリード部１０３ａ、１０３ｂ、１０３ｃとが金属細線１０４により電気的に接続されている。そしてダイパッド部１０１上の半導体素子１０２、インナーリード部１０３ａ、１０３ｂ、１０３ｃの外囲は封止樹脂１０５により封止されている。また封止樹脂１０５の側面とインナーリード部１０３ｃの末端部とは同一面に配置されているものであり、ダイパッド部１０１の底面が封止樹脂１０５から露出しているダイパッド部露出型の樹脂封止型半導体装置である。またインナーリード部１０３ａ、１０３ｂ、１０３ｃの先端部が外部端子１０６として露出しているものである。
【０００５】
次に従来の樹脂封止型半導体装置の製造方法について説明する。図７はリードフレームを用いた従来の樹脂封止型半導体装置の製造方法を示す工程ごとの断面図である。
【０００６】
まず図７（ａ）に示すように、フレーム枠と、そのフレーム枠内に、半導体装置が載置される矩形状のダイパッド部１０１と、ダイパッド部１０１を支持する吊りリード部と、半導体素子を載置した場合、その載置した半導体素子と金属細線等の手段により電気的接続するインナーリード部１０３ａ、１０３ｂ、１０３ｃとを有し、なおかつダイパッド部１０１、インナーリード部１０３ａ、１０３ｂ、１０３ｃの各底面に密着するように接着力を有する封止シートを貼付したリードフレームを用意する。
【０００７】
次に図７（ｂ）に示すように、リードフレームのダイパッド部１０１上に半導体素子１０２を銀ペースト等の接着剤により接合する（ダイボンド工程）。
【０００８】
次に図７（ｃ）に示すように、ダイパッド部１０１上に搭載した半導体素子１０２の表面の電極パッド（図示せず）と、リードフレームのインナーリード部１０３ａ、１０３ｂ、１０３ｃとを金属細線１０４により接続する。なお、インナーリード部１０３ｃの端子を構成する部分が半導体素子１０２の下面に位置する場合、金属細線１０４は、フレーム枠に接続されたインナーリード部１０３ｃ上の半導体素子１０２よりも外側に接続する（ワイヤーボンド工程）。
【０００９】
その後、図７（ｄ）に示すように、封止シートをリードフレームに密着させた状態でダイパッド部１０１、半導体素子１０２、インナーリード部１０３ａ、１０３ｂ、１０３ｃの外囲を封止樹脂１０５により封止する。この工程ではリードフレームの底面に封止シートを密着させて封止した後に、封止シートを剥がすことにより、ダイパッド部１０１の底面を除く領域、吊りリード部、半導体素子１０２、インナーリード部１０３ａ、１０３ｂ、１０３ｃの底面を除く領域、および金属細線１０４の接続領域を封止するものであり、封止樹脂１０５の底面からダイパッド部１０１の底面、インナーリード部１０３ａ、１０３ｂ、１０３ｃの底面が露出した構成となる（封止〜シート剥がし工程）。
【００１０】
【特許文献１】
特開平９−８２７４１号公報（第６頁、第３図）
【００１１】
【発明が解決しようとする課題】
しかしながら従来の樹脂封止型半導体装置およびその製造方法では、基板実装する際の高温環境下で、樹脂封止型半導体装置を構成する各材料の熱膨張により、リードおよび封止樹脂の剥がれ現象が発生してしまうことがある。このような現象は近年、樹脂封止型半導体装置を製造する上で大きな問題となっていた。
【００１２】
樹脂封止型半導体装置を基板実装した際、高温環境下でのリード部および封止樹脂界面での剥がれ現象は、半導体素子の電極から電気的に接続している金属細線と、リード部との間で断線などによる樹脂封止型半導体装置の動作不良が懸念され、好ましくない状況となる。
【００１３】
本発明は前記した従来の課題を解決するものであり、特に半導体素子の下面に端子を構成する樹脂封止型半導体装置において、リード面および封止樹脂面での剥がれ現象を解決することのできる樹脂封止型半導体装置およびその製造方法を提供することを目的とする。
【００１４】
【課題を解決するための手段】
前記従来の課題を解決するために、本発明の樹脂封止型半導体装置は、ダイパッド部と、前記ダイパッド部の上面に搭載された半導体素子と、くびれと厚肉部を有し、かつ前記ダイパッド部に対向して配列された複数のリード部と、前記半導体素子の電極と前記リード部とを接続した金属細線と、前記半導体素子、前記金属細線および前記くびれを封止した封止樹脂とを備え、前記ダイパッド部の底面と前記リード部の厚肉部の底面とを露出したことを特徴とする樹脂封止型半導体装置である。
【００１５】
具体的には、前記リード部にくびれを設けていること特徴とするリードフレームを使用して製造する樹脂封止型半導体装置である。
【００１６】
また、ダイパッドの上面には半導体素子が搭載された突出部が形成されている樹脂封止型半導体装置である。
【００２０】
前記構成の通り、本発明の樹脂封止型半導体装置は、リード面および封止樹脂面での密着性を向上させ、基板実装する際の高温環境下にさらされた後においても、半導体素子の電極とリードとの接続を阻害することの無い、樹脂封止型半導体装置を実現することができる。
【００２１】
【発明の実施の形態】
以下、本発明の樹脂封止型半導体装置およびその製造方法の一実施形態について図面を参照しながら説明する。
【００２２】
図１は本実施形態の樹脂封止型半導体装置を示す図であり、図１（ａ）は平面図、図１（ｂ）は底面図、図１（ｃ）は図１（ｂ）のＢ−Ｂ１箇所の断面図である。
【００２３】
図１に示すように、本実施形態の樹脂封止型半導体装置は、半導体素子搭載用の突出部１ａを有したダイパッド部１と、そのダイパッド部１の支持部１ａ上に搭載された半導体素子２と、フレーム枠から接続されたリードであって先端部がダイパッド部１に対向して配列され、その底面が最外周端子を形成する複数のリード部３ａと、独立したリードで底面が２列目の端子を形成する複数のリード部３ｂと、フレーム枠から接続されたリードであって先端部の底面が最内周端子を形成する複数のリード部３ｃと、半導体素子２の電極と第１、第２、第３のリード部３ａ、３ｂ、３ｃとを接続した金属細線４と、ダイパッド部１の底面を除く領域、半導体素子２、第１、第２、第３のリード部３ａ、３ｂ、３ｃの底面を除く領域、および金属細線４の接続領域を封止した封止樹脂５とよりなり、第１、第３の各リード部３ａ、３ｃの末端部は封止樹脂５の側面と同一面に配列された樹脂封止型半導体装置であって、最内周端子を形成するリード部３ｃは、端子が半導体素子２の下面に位置する場合に金属細線４を、そのリード部に容易に接続できるように設けられているフレーム枠から接続されたリード上に剥離止め部７が設けられているリードフレームを使用する樹脂封止型半導体装置である。
【００２４】
そして図１（ｂ）に示すように、本実施形態の樹脂封止型半導体装置は、第１のリード部３ａの底面、第２のリード部３ｂの底面、第３のリード部３ｃの底面は、ランド電極を構成し、封止樹脂５の下面領域において平面配列で少なくとも２列を構成しているランドグリッドアレイ型の樹脂封止型半導体装置である。
【００２５】
次に本実施形態の樹脂封止型半導体装置におけるリードフレームの形態について説明する。
【００２６】
図２は、リードフレームの形態を示す図であり、図２（ａ）は平面図、図２（ｂ）は図（ａ）のＣ−Ｃ１箇所の断面図である。
【００２７】
図２（ａ）、（ｂ）に示すように、本実施形態の樹脂封止型半導体装置で採用しているリードフレームには、フレーム枠に接続された最内周端子を形成するリード部３ｃのリード上に剥離止め部７を設置している。樹脂封止型半導体装置が基板実装される際の高温環境下において発生しやすいリード部３ｃの先端部からのリード面と封止樹脂面の剥がれ現象を、剥離止め部７により進行を防ぐことができ、半導体素子の電極から最内周端子までを接続している金属細線とリード部３ｃとの接続部にまで剥離を進行させず、安定した半導体装置の動作を実現することができるものである。
【００２８】
図３には、図２で説明したリード上に設置した剥離止め部の形態を示す図であり、図３（ａ）、（ｂ）は平面図と断面図である。また、図３（ｃ）、（ｄ）、または図３（ｅ）、（ｆ）は、リード上に設置する剥離止め部の別の形態を示す平面図と断面図である。
【００２９】
まず図３（ａ）、（ｂ）に示すように、本実施形態の樹脂封止型半導体装置で採用しているリード部は、フレーム枠に接続された最内周端子を形成するリード部のリード上にプレス加工やエッチング加工によるリード幅の２０〜９０％の直径である貫通穴または溝による剥離止め部を設置している。この貫通穴または溝は、加工制約上でリード幅の２０％以上確保し、なおかつ後工程での安定性向上の為９０％以内としておくことが好ましい。この剥離止めの効果により、樹脂封止の際に貫通穴または溝の内部へ封止樹脂が食い込むことにより、リード面および封止樹脂面での密着性を向上させるものである。
【００３０】
また、図３（ｃ）、（ｄ）に示すように、リード上に設置する剥離止め部として、貫通穴や溝に代えて、プレス加工やエッチング加工による波状のくびれを設けてもよい。さらには、図３（ｅ）、（ｆ）に示すように、リード部の形状を先端部から一旦ダイパッド側に引き回し、カーブを描きながらフレーム枠に接続されるリード部を設置する方法もある。これらのリード形状においても同様にリード面および封止樹脂面での密着性を向上させることができる。
【００３１】
以上、本実施形態の樹脂封止型半導体装置では、リード部に剥離止め部を有し、その効果によりリード面および封止樹脂面での密着性を向上させ、樹脂封止型半導体装置が基板実装される際の高温環境下において発生しやすいリード面と封止樹脂面の剥がれ現象を防ぐことができ、安定した半導体装置の動作を実現することができるものである。
【００３２】
次に本実施形態の半導体装置の製造方法について説明する。
【００３３】
図４、図５は本実施形態の樹脂封止型半導体装置の製造方法における主要な工程を示す断面図である。
【００３４】
まず、図４（ａ）に示すように、金属板よりなるフレーム枠内に設けられた半導体素子搭載用のダイパッド部１と、フレーム枠から接続されたリードであって先端部がダイパッド部１に対向して配列され、その底面が最外周端子を形成する複数のリード部３ａと、独立したリードで底面が２列目の端子を形成する複数のリード部３ｂと、フレーム枠から接続されたリードであって先端部の底面が最内周端子を形成する複数のリード部３ｃとよりなるリードフレームであって、最内周端子を形成するリード部３ｃのリード上には剥離止め７が設けられており、ダイパッド部１、インナーリード部３ａ、３ｂ、３ｃの各底面に密着するように接着力を有する封止シート８を貼付したリードフレームを用意する。
【００３５】
次に図４（ｂ）に示すように、用意したリードフレームのダイパッド部１の突出部１ａ上に半導体素子２をその主面を上にして接着搭載する（ダイボンド工程）。
【００３６】
次に図４（ｃ）に示すように、ダイパッド部１上に搭載した半導体素子２の電極と、リードフレームの第１、第２、第３のリード部とを金属細線４により接続する（ワイヤーボンド工程）。
【００３７】
そして図４（ｄ）に示すように、リードフレームの下面にあって、少なくとも第１、第２、第３のリード部、ダイパッド部１の底面に封止シート８を密着させ、リードフレームの上面側を封止樹脂５により樹脂封止し、ダイパッド部１の底面を除く領域、半導体素子２、第１、第２、第３のリード部の底面を除く領域、および金属細線４の接続領域を封止する（封止工程）。
【００３８】
そして図５に、樹脂封止の工程の後、封止シートを剥がし、第１、第３のリード部３ａ、３ｃの末端部分を切断し、各リード部の各末端部を封止樹脂５の側面と同一面に配置することにより、前述の図１で示した構造と同様な樹脂封止型半導体装置を得るものである。図５に示した樹脂封止型半導体装置は、基板実装する際の高温環境下において、リード面と封止樹脂５の界面において発生しやすい剥がれ現象の進行を防ぐことができ、半導体素子２の電極から最内周端子までを接続している金属細線４とリード部３ｃとの接続部にまで剥離を進行させず、安定した半導体装置の動作を実現することができるものである。
【００３９】
以上、本実施形態の樹脂封止型半導体装置およびその製造方法では、リードフレームのフレーム枠に接続したインナーリード上に剥離止めを有し、基板実装の際の高温環境下において、インナーリード面と封止樹脂の界面において発生しやすい剥がれ現象の進行を防ぐことができ、金属細線とリード部の接続性を確実にすることができ、安定した半導体装置の動作を実現できる。
【００４０】
なお、本実施形態ではリード部が３列を構成した片面封止タイプの樹脂封止型半導体装置を例に説明したが、２列タイプ、４列以上の多列タイプであっても、樹脂封止型半導体装置の製造方法には広く適用できるものである。
【００４１】
【発明の効果】
以上、本発明の樹脂封止型半導体装置は、リードフレームタイプの樹脂封止型半導体装置において、半導体素子の電極から金属細線で接続しているリード面と、封止樹脂の界面での剥がれ現象を防止できるものである。
【００４２】
また、本発明の樹脂封止型半導体装置の製造方法は、基板実装する際の高温環境下でリードおよび封止樹脂界面との密着性を向上させ、高い信頼性を得ることができるものであり、ランドグリッドアレイ型の片面封止タイプや、ＱＦＰに代表される両面封止タイプなどのリードフレームを使った樹脂封止型半導体装置の製造方法に広く適用できるものである。
【図面の簡単な説明】
【図１】本発明の一実施形態の樹脂封止型半導体装置を示す図
【図２】本発明の一実施形態の樹脂封止型半導体装置のリードフレームを示す図
【図３】本発明の一実施形態の樹脂封止型半導体装置の剥離止め部を示す図
【図４】本発明の一実施形態の樹脂封止型半導体装置の製造方法を示す断面図
【図５】本発明の一実施形態の樹脂封止型半導体装置の製造方法を示す断面図
【図６】従来の樹脂封止型半導体装置を示す図
【図７】従来の樹脂封止型半導体装置の製造方法を示す断面図
【符号の説明】
１ ダイパッド部
１ａ 突出部
２ 半導体素子
３ａ 第１のリード部
３ｂ 第２のリード部
３ｃ 第３のリード部
４ 金属細線
５ 封止樹脂
６ 外部端子
７ 剥離止め部
８ 封止シート
１０１ ダイパッド部
１０２ 半導体素子
１０３ａ 第１のリード部
１０３ｂ 第２のリード部
１０３ｃ 第３のリード部
１０４ 金属細線
１０５ 封止樹脂
１０６ 外部端子[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a lead frame type resin-encapsulated semiconductor device on which a semiconductor element is mounted and a method for manufacturing the same, and in particular, to improve the adhesion between the electrode of the semiconductor element and the encapsulating resin of a lead portion connected by a thin metal wire. The present invention relates to a resin-encapsulated semiconductor device that can prevent peeling and the like and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, in order to cope with the downsizing of electronic devices, high-density mounting of semiconductor components such as resin-encapsulated semiconductor devices is required, and along with this, semiconductor components are becoming smaller and thinner. In addition, while being small and thin, the number of pins has been increased, and a high-density small and thin resin-encapsulated semiconductor device has been demanded.
[0003]
Hereinafter, a conventional die pad portion exposed type resin-encapsulated semiconductor device will be described. 6A and 6B are views showing a conventional resin-encapsulated semiconductor device, in which FIG. 6A is a plan view, FIG. 6B is a bottom view, and FIG. 6C is A-A1 in FIG. 6B. It is sectional drawing of a location.
[0004]
As shown in FIG. 6, the semiconductor element 102 is mounted on the die pad portion 101 of the lead frame, and the semiconductor element 102 and the inner lead portions 103 a, 103 b, 103 c are electrically connected by a thin metal wire 104. The outer periphery of the semiconductor element 102 and the inner lead portions 103a, 103b, and 103c on the die pad portion 101 is sealed with a sealing resin 105. Further, the side surface of the sealing resin 105 and the end portion of the inner lead portion 103 c are arranged on the same surface, and the die pad portion exposed type resin seal in which the bottom surface of the die pad portion 101 is exposed from the sealing resin 105. It is a stationary semiconductor device. The leading ends of the inner lead portions 103a, 103b, and 103c are exposed as the external terminals 106.
[0005]
Next, a conventional method for manufacturing a resin-encapsulated semiconductor device will be described. FIG. 7 is a cross-sectional view for each process showing a conventional method for manufacturing a resin-encapsulated semiconductor device using a lead frame.
[0006]
First, as shown in FIG. 7A, a frame frame, a rectangular die pad portion 101 on which a semiconductor device is placed, a suspension lead portion that supports the die pad portion 101, and a semiconductor element are placed in the frame frame. When placed, the semiconductor device has inner lead portions 103a, 103b, 103c that are electrically connected to the placed semiconductor element by means such as thin metal wires, and each of the die pad portion 101, the inner lead portions 103a, 103b, 103c A lead frame to which a sealing sheet having an adhesive force is attached so as to be in close contact with the bottom surface is prepared.
[0007]
Next, as shown in FIG. 7B, the semiconductor element 102 is bonded onto the die pad portion 101 of the lead frame with an adhesive such as silver paste (die bonding step).
[0008]
Next, as shown in FIG. 7C, the electrode pads (not shown) on the surface of the semiconductor element 102 mounted on the die pad portion 101 and the inner lead portions 103a, 103b, 103c of the lead frame are connected to the thin metal wires 104. Connect with. In addition, when the part which comprises the terminal of the inner lead part 103c is located in the lower surface of the semiconductor element 102, the metal fine wire 104 connects outside the semiconductor element 102 on the inner lead part 103c connected to the frame ( Wire bond process).
[0009]
Thereafter, as shown in FIG. 7D, the outer periphery of the die pad portion 101, the semiconductor element 102, and the inner lead portions 103a, 103b, and 103c is sealed with a sealing resin 105 in a state where the sealing sheet is in close contact with the lead frame. Stop. In this process, after sealing the sealing sheet closely to the bottom surface of the lead frame, the sealing sheet is peeled off to remove the bottom surface of the die pad portion 101, the suspension lead portion, the semiconductor element 102, the inner lead portion 103a, The region excluding the bottom surface of 103b and 103c and the connection region of the thin metal wire 104 are sealed, and the bottom surface of the die pad portion 101 and the bottom surfaces of the inner lead portions 103a, 103b, and 103c are exposed from the bottom surface of the sealing resin 105. Configuration (sealing to sheet peeling step).
[0010]
[Patent Document 1]
Japanese Patent Laid-Open No. 9-82741 (page 6, FIG. 3)
[0011]
[Problems to be solved by the invention]
However, in the conventional resin-encapsulated semiconductor device and the manufacturing method thereof, the lead and the encapsulating resin are peeled off due to thermal expansion of each material constituting the resin-encapsulated semiconductor device in a high temperature environment when mounting on the substrate. May occur. In recent years, such a phenomenon has been a serious problem in manufacturing a resin-encapsulated semiconductor device.
[0012]
When a resin-encapsulated semiconductor device is mounted on a substrate, the peeling phenomenon at the interface between the lead portion and the encapsulating resin in a high-temperature environment is caused by the thin metal wire electrically connected from the electrode of the semiconductor element and the lead portion. There is concern about the malfunction of the resin-encapsulated semiconductor device due to disconnection or the like, and this is not preferable.
[0013]
The present invention solves the above-described conventional problems, and in particular, in a resin-sealed semiconductor device in which terminals are formed on the lower surface of a semiconductor element, it is possible to solve the peeling phenomenon on the lead surface and the sealing resin surface. An object of the present invention is to provide a resin-encapsulated semiconductor device and a manufacturing method thereof.
[0014]
[Means for Solving the Problems]
In order to solve the conventional problems, a resin encapsulated semiconductor device of the present invention includes a da Ipaddo portion, a semiconductor element mounted on an upper surface of the die pad portion, the constricted and the thick portion, and wherein A plurality of lead portions arranged to face the die pad portion; a metal thin wire connecting the electrode of the semiconductor element and the lead portion ; and a sealing resin sealing the semiconductor element, the metal thin wire and the constriction The resin-encapsulated semiconductor device is characterized in that the bottom surface of the die pad portion and the bottom surface of the thick portion of the lead portion are exposed .
[0015]
Specifically, a resin sealed semiconductor device manufactured using a lead frame, wherein it is provided with the said lead portion meat fin.
[0016]
The die-pad is a resin-encapsulated semiconductor device in which a protruding portion on which a semiconductor element is mounted is formed on the upper surface of the die pad.
[0020]
As described above, the resin-encapsulated semiconductor device of the present invention improves the adhesion between the lead surface and the encapsulating resin surface, and even after being exposed to a high-temperature environment when mounted on a substrate, A resin-encapsulated semiconductor device that does not hinder the connection between the electrode and the lead can be realized.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of a resin-encapsulated semiconductor device and a manufacturing method thereof according to the present invention will be described with reference to the drawings.
[0022]
1A and 1B are diagrams showing a resin-encapsulated semiconductor device according to the present embodiment, in which FIG. 1A is a plan view, FIG. 1B is a bottom view, and FIG. 1C is B in FIG. -It is sectional drawing of B1 location.
[0023]
As shown in FIG. 1, the resin-encapsulated semiconductor device of this embodiment includes a die pad portion 1 having a protruding portion 1 a for mounting a semiconductor element, and a semiconductor element mounted on a support portion 1 a of the die pad portion 1. 2 and leads connected from the frame frame, the tip portion is arranged facing the die pad portion 1, the bottom surface thereof is a plurality of lead portions 3a forming the outermost peripheral terminal, and the independent leads are arranged in two rows. A plurality of lead portions 3b forming a terminal of the eye, a plurality of leads connected from the frame frame, the bottom surface of the tip portion forming the innermost peripheral terminal, the electrode of the semiconductor element 2 and the first The thin metal wire 4 connecting the second and third lead portions 3a, 3b, and 3c, the region excluding the bottom surface of the die pad portion 1, the semiconductor element 2, the first, second, and third lead portions 3a and 3b 3c, except for the bottom surface, and fine metal And a resin-encapsulated semiconductor in which the end portions of the first and third lead portions 3a and 3c are arranged on the same surface as the side surface of the encapsulating resin 5. The lead portion 3c forming the innermost peripheral terminal is a frame frame provided so that the metal thin wire 4 can be easily connected to the lead portion when the terminal is located on the lower surface of the semiconductor element 2. This is a resin-encapsulated semiconductor device that uses a lead frame in which a peeling preventing portion 7 is provided on a lead connected from the outside.
[0024]
As shown in FIG. 1B, the resin-encapsulated semiconductor device according to the present embodiment has a bottom surface of the first lead portion 3a, a bottom surface of the second lead portion 3b, and a bottom surface of the third lead portion 3c. This is a land grid array type resin-encapsulated semiconductor device comprising land electrodes and comprising at least two rows in a planar arrangement in the lower surface region of the encapsulating resin 5.
[0025]
Next, the form of the lead frame in the resin-encapsulated semiconductor device of this embodiment will be described.
[0026]
2A and 2B are views showing the form of the lead frame. FIG. 2A is a plan view, and FIG. 2B is a cross-sectional view taken along the line C-C1 in FIG.
[0027]
As shown in FIGS. 2A and 2B, the lead frame employed in the resin-encapsulated semiconductor device of the present embodiment has a lead portion 3c that forms the innermost peripheral terminal connected to the frame frame. A peeling stopper 7 is provided on the lead. The peeling prevention part 7 prevents the peeling phenomenon of the lead surface and the sealing resin surface from the tip part of the lead part 3c, which is likely to occur in a high temperature environment when the resin-sealed semiconductor device is mounted on the substrate, by the peeling prevention part 7. In addition, it is possible to realize stable operation of the semiconductor device without causing the separation to proceed to the connecting portion between the thin metal wire connecting the electrode of the semiconductor element to the innermost peripheral terminal and the lead portion 3c. .
[0028]
FIG. 3 is a view showing a form of a delamination stopper portion installed on the lead described in FIG. 2, and FIGS. 3A and 3B are a plan view and a cross-sectional view. FIGS. 3C, 3D, 3E, and 3F are a plan view and a cross-sectional view showing another form of the delamination preventing portion installed on the lead.
[0029]
First, as shown in FIGS. 3A and 3B, the lead portion employed in the resin-encapsulated semiconductor device of this embodiment is the lead portion forming the innermost peripheral terminal connected to the frame frame. On the lead, an anti-peeling portion by a through hole or a groove having a diameter of 20 to 90% of the lead width by pressing or etching is provided. This through hole or groove is preferably kept within 90% in order to secure 20% or more of the lead width due to processing restrictions, and to improve stability in a subsequent process. Due to the effect of the peeling prevention, the sealing resin bites into the through hole or groove during resin sealing, thereby improving the adhesion between the lead surface and the sealing resin surface.
[0030]
Further, as shown in FIGS. 3C and 3D, a wave-like constriction formed by pressing or etching may be provided in place of the through-hole or groove as a peeling stopper provided on the lead. Furthermore, as shown in FIGS. 3E and 3F, there is a method in which the shape of the lead portion is once drawn from the tip portion to the die pad side, and the lead portion connected to the frame frame is placed while drawing a curve. In these lead shapes, the adhesion on the lead surface and the sealing resin surface can be similarly improved.
[0031]
As described above, in the resin-encapsulated semiconductor device according to the present embodiment, the lead portion has the peel-off preventing portion, and due to the effect, the adhesion between the lead surface and the encapsulating resin surface is improved. It is possible to prevent a peeling phenomenon between the lead surface and the sealing resin surface, which is likely to occur in a high temperature environment when being mounted, and to realize a stable operation of the semiconductor device.
[0032]
Next, a method for manufacturing the semiconductor device of this embodiment will be described.
[0033]
4 and 5 are cross-sectional views showing main steps in the method for manufacturing a resin-encapsulated semiconductor device of this embodiment.
[0034]
First, as shown in FIG. 4A, a die pad portion 1 for mounting a semiconductor element provided in a frame frame made of a metal plate, and leads connected from the frame frame, the tip portion of which is connected to the die pad portion 1. A plurality of lead portions 3a that are arranged to face each other and whose bottom surface forms the outermost peripheral terminal, a plurality of lead portions 3b that are independent leads and whose bottom surface forms the second row of terminals, and leads connected from the frame The lead frame is composed of a plurality of lead portions 3c with the bottom surface of the tip portion forming the innermost peripheral terminal, and a delamination stopper 7 is provided on the lead of the lead portion 3c forming the innermost peripheral terminal. A lead frame to which a sealing sheet 8 having an adhesive force is attached so as to be in close contact with the bottom surfaces of the die pad portion 1 and the inner lead portions 3a, 3b, 3c is prepared.
[0035]
Next, as shown in FIG. 4B, the semiconductor element 2 is bonded and mounted on the protruding portion 1a of the die pad portion 1 of the prepared lead frame with its main surface facing up (die bonding step).
[0036]
Next, as shown in FIG. 4C, the electrodes of the semiconductor element 2 mounted on the die pad portion 1 and the first, second, and third lead portions of the lead frame are connected by the thin metal wires 4 (wires). Bond process).
[0037]
Then, as shown in FIG. 4D, the sealing sheet 8 is in close contact with the bottom surface of at least the first, second, and third lead portions and the die pad portion 1 on the lower surface of the lead frame, and the upper surface of the lead frame. The side is sealed with a sealing resin 5, and the region excluding the bottom surface of the die pad portion 1, the region excluding the bottom surface of the semiconductor element 2, the first, second, and third lead portions, and the connection region of the fine metal wires 4 are formed. Sealing (sealing process).
[0038]
Then, in FIG. 5, after the resin sealing step, the sealing sheet is peeled off, the terminal portions of the first and third lead portions 3a and 3c are cut, and the terminal portions of the lead portions are sealed with the sealing resin 5. By arranging it on the same surface as the side surface, a resin-encapsulated semiconductor device similar to the structure shown in FIG. 1 is obtained. The resin-encapsulated semiconductor device shown in FIG. 5 can prevent the progress of a peeling phenomenon that easily occurs at the interface between the lead surface and the encapsulating resin 5 in a high-temperature environment when mounting on a substrate. Separation does not proceed to the connecting portion between the fine metal wire 4 connecting the electrode to the innermost peripheral terminal and the lead portion 3c, and stable operation of the semiconductor device can be realized.
[0039]
As described above, in the resin-encapsulated semiconductor device and the manufacturing method thereof according to the present embodiment, the inner leads connected to the frame of the lead frame have the delamination stopper, and the inner lead surface The progress of the peeling phenomenon that is likely to occur at the interface of the sealing resin can be prevented, the connectivity between the fine metal wire and the lead portion can be ensured, and stable operation of the semiconductor device can be realized.
[0040]
In the present embodiment, a single-side sealed type resin-encapsulated semiconductor device having three rows of lead portions has been described as an example. The present invention can be widely applied to a manufacturing method of a stationary semiconductor device.
[0041]
【The invention's effect】
As described above, the resin-encapsulated semiconductor device according to the present invention is a lead frame type resin-encapsulated semiconductor device, in which the peeling phenomenon occurs at the interface between the lead surface connected by the fine metal wire from the electrode of the semiconductor element and the encapsulating resin. Can be prevented.
[0042]
In addition, the method for manufacturing a resin-encapsulated semiconductor device of the present invention can improve the adhesion between the leads and the interface of the encapsulating resin in a high-temperature environment when mounting on a substrate, and can obtain high reliability. The present invention can be widely applied to a method for manufacturing a resin-encapsulated semiconductor device using a lead frame such as a land grid array type single-sided sealing type or a double-sided sealing type typified by QFP.
[Brief description of the drawings]
FIG. 1 is a diagram showing a resin-encapsulated semiconductor device according to an embodiment of the present invention. FIG. 2 is a diagram showing a lead frame of the resin-encapsulated semiconductor device according to an embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating a method for manufacturing a resin-encapsulated semiconductor device according to an embodiment of the present invention. FIG. 5 is a cross-sectional view illustrating a method for manufacturing a resin-encapsulated semiconductor device according to an embodiment of the present invention. FIG. 6 is a sectional view showing a conventional resin-sealed semiconductor device. FIG. 7 is a sectional view showing a conventional resin-sealed semiconductor device manufacturing method. Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Die pad part 1a Protrusion part 2 Semiconductor element 3a 1st lead part 3b 2nd lead part 3c 3rd lead part 4 Metal fine wire 5 Sealing resin 6 External terminal 7 Detachment prevention part 8 Sealing sheet 101 Die pad part 102 Semiconductor Element 103a First lead portion 103b Second lead portion 103c Third lead portion 104 Metal thin wire 105 Sealing resin 106 External terminal

Claims (8)

ダイパッド部と、
前記ダイパッド部の上面に搭載された半導体素子と、
くびれと厚肉部を有し、かつ前記ダイパッド部に対向して配列された複数のリード部と、
前記半導体素子の電極と前記リード部とを接続した金属細線と、
前記半導体素子、前記金属細線および前記くびれを封止した封止樹脂とを備え、
前記ダイパッド部の底面と前記リード部の厚肉部の底面とが露出したことを特徴とする樹脂封止型半導体装置。Die pad,
A semiconductor element mounted on the upper surface of the die pad portion;
A plurality of lead portions having a constriction and a thick portion and arranged to face the die pad portion;
A fine metal wire connecting the electrode of the semiconductor element and the lead portion;
A sealing resin that seals the semiconductor element, the fine metal wires, and the constriction;
A resin-encapsulated semiconductor device, wherein a bottom surface of the die pad portion and a bottom surface of a thick portion of the lead portion are exposed. リード部のダイパッド部側の反対側の一端面が、封止樹脂から露出していることを特徴とする請求項１に記載の樹脂封止型半導体装置。2. The resin-encapsulated semiconductor device according to claim 1, wherein one end surface of the lead portion opposite to the die pad portion is exposed from the encapsulating resin. リード部のダイパッド部側の反対側の一端面と封止樹脂面とが同一面に配置されていることを特徴とする請求項２に記載の樹脂封止型半導体装置。3. The resin-encapsulated semiconductor device according to claim 2, wherein one end surface of the lead portion opposite to the die pad portion and the sealing resin surface are arranged on the same surface. くびれは波状であることを特徴とする請求項３に記載の樹脂封止型半導体装置。4. The resin-encapsulated semiconductor device according to claim 3, wherein the constriction has a wave shape. ダイパッド部の上面には半導体素子が搭載された突出部が形成されていることを特徴とする請求項４に記載の樹脂封止型半導体装置。5. The resin-encapsulated semiconductor device according to claim 4, wherein a protruding portion on which a semiconductor element is mounted is formed on the upper surface of the die pad portion. 半導体素子の底面とリード部との間に隙間が形成されていることを特徴とする請求項５に記載の樹脂封止型半導体装置。6. The resin-encapsulated semiconductor device according to claim 5, wherein a gap is formed between the bottom surface of the semiconductor element and the lead portion. ダイパッド部と、
前記ダイパッド部の上面に搭載された半導体素子と、
厚肉部を有し、前記ダイパッド部に対向して配列された複数のリード部と、
前記半導体素子の電極と前記リード部とを接続した金属細線と、
前記半導体素子と前記金属細線を封止した封止樹脂とを備え、
前記リード部は、前記ダイパッド部側の一端である先端部と、反対側の末端部と、前記先端部および前記末端部とを接続する中間部とを有し、前記中間部は前記先端部よりも前記ダイパッド部側にまで延在し、前記ダイパッド部の底面と前記リード部の厚肉部の底面とが露出したことを特徴とする樹脂封止型半導体装置。Die pad,
A semiconductor element mounted on the upper surface of the die pad portion;
A plurality of lead portions having a thick portion and arranged to face the die pad portion;
A fine metal wire connecting the electrode of the semiconductor element and the lead portion;
A sealing resin that seals the semiconductor element and the fine metal wire,
The lead portion includes a tip portion that is one end on the die pad portion side, an end portion on the opposite side, and an intermediate portion that connects the tip portion and the end portion, and the intermediate portion is formed from the tip portion. Also extending to the die pad portion side, the bottom surface of the die pad portion and the bottom surface of the thick portion of the lead portion are exposed. ダイパッド部と、
前記ダイパッド部の上面に搭載された半導体素子と、
厚肉部を有し、前記ダイパッド部に対向して配列された複数のリード部と、
前記半導体素子の電極と前記リード部とを接続した金属細線と、
前記半導体素子と前記金属細線を封止した封止樹脂とを備え、
前記リード部は、前記ダイパッド部側の一端である先端部と、反対側の末端部とを有し、前記先端部からダイパッド部側に引き回されて前記末端部に接続され、前記ダイパッド部の底面と前記リード部の厚肉部の底面とが露出したことを特徴とする樹脂封止型半導体装置。Die pad,
A semiconductor element mounted on the upper surface of the die pad portion;
A plurality of lead portions having a thick portion and arranged to face the die pad portion;
A fine metal wire connecting the electrode of the semiconductor element and the lead portion;
A sealing resin that seals the semiconductor element and the fine metal wire,
The lead part has a tip part which is one end on the die pad part side and a terminal part on the opposite side, and is led from the tip part to the die pad part side and connected to the terminal part. A resin-encapsulated semiconductor device, wherein a bottom surface and a bottom surface of a thick portion of the lead portion are exposed.
JP2002309330A 2002-10-24 2002-10-24 Resin-sealed semiconductor device Expired - Fee Related JP3841038B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002309330A JP3841038B2 (en) 2002-10-24 2002-10-24 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002309330A JP3841038B2 (en) 2002-10-24 2002-10-24 Resin-sealed semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006117602A Division JP4332538B2 (en) 2006-04-21 2006-04-21 Resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JP2004146562A JP2004146562A (en) 2004-05-20
JP3841038B2 true JP3841038B2 (en) 2006-11-01

Family

ID=32455184

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002309330A Expired - Fee Related JP3841038B2 (en) 2002-10-24 2002-10-24 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP3841038B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009076658A (en) * 2007-09-20 2009-04-09 Renesas Technology Corp Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JP2004146562A (en) 2004-05-20

Similar Documents

Publication Publication Date Title
JP3062192B1 (en) Lead frame and method of manufacturing resin-encapsulated semiconductor device using the same
JP2915892B2 (en) Resin-sealed semiconductor device and method of manufacturing the same
KR100564006B1 (en) Terminal land frame and method for manufacturing the same, and resin sealed semiconductor device and method for manufacturing the same
JP3879452B2 (en) Resin-sealed semiconductor device and manufacturing method thereof
JP2002076228A (en) Resin-sealed semiconductor device
JP3046024B1 (en) Lead frame and method of manufacturing resin-encapsulated semiconductor device using the same
JPH09129811A (en) Resin sealed semiconductor device
JPH11214606A (en) Resin molded semiconductor device and lead frame
JP3430976B2 (en) Lead frame, resin-sealed semiconductor device using the same, and method of manufacturing the same
JP3841038B2 (en) Resin-sealed semiconductor device
JP3915337B2 (en) Lead frame and method for manufacturing resin-encapsulated semiconductor device using the same
JP4332538B2 (en) Resin-sealed semiconductor device
JP2002246529A (en) Resin molding semiconductor device and its manufacturing method
JP3843654B2 (en) Lead frame and method for manufacturing resin-encapsulated semiconductor device using the same
JP3959898B2 (en) Manufacturing method of resin-encapsulated semiconductor device
JP2001077266A (en) Manufacture of resin sealed semiconductor device
JP3707639B2 (en) Structure of area array package type semiconductor device
JP2715974B2 (en) Semiconductor device and manufacturing method thereof
JPH1116959A (en) Semiconductor device
JP2001077275A (en) Lead frame and manufacture of resin-sealed semiconductor device using the same
JP3649064B2 (en) Manufacturing method of semiconductor device
JP3915338B2 (en) Lead frame and method for manufacturing resin-encapsulated semiconductor device using the same
JP3093789U (en) Package structure of ultra-thin semiconductor device
JP2001077271A (en) Lead frame and manufacture of resin sealed semiconductor device using the same
JP4045718B2 (en) Resin-sealed semiconductor device and manufacturing method thereof

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041224

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20050707

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20051122

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20051206

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060206

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060411

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060510

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060718

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060731

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090818

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100818

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110818

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110818

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120818

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130818

Year of fee payment: 7

LAPS Cancellation because of no payment of annual fees