JP3833862B2 - tray - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a tray that also serves as a storage tray and a tray for electrical property testing, and is particularly applicable to storage and storage technology and electrical property inspection technology for a tape carrier package (TCP) type semiconductor device in which a semiconductor device is incorporated in an insulating tape. And effective technology.
[0002]
[Prior art]
A semiconductor chip or a semiconductor device incorporating an active element such as a transistor or a circuit is accommodated and transported in a container generally called a tray. For example, in the March 1993 issue of “Electronic Materials” published by the Industrial Research Council, a document request number 8022 discloses a matrix tray in which concave recesses for accommodating packaged products are arranged vertically and horizontally on the upper surface. Japanese Patent Application No. 9-2560 discloses a similar tray.
[0003]
On the other hand, a TCP type semiconductor device in which a semiconductor device is incorporated in an insulating tape is known as one of the package forms of the semiconductor device. This TCP type semiconductor device (tape carrier package IC) fixes a semiconductor chip to an insulating tape (film) having a lead pattern on its surface, electrically connects the leads and each electrode of the semiconductor chip, The portion including the semiconductor chip is covered with an insulating resin. The tape has guide holes (sprocket holes or the like) provided at predetermined intervals along both sides thereof, and is used when the tape is transferred in assembling a semiconductor device or the like. After the assembly of the semiconductor device, the tape is cut for each semiconductor device to be singulated and shipped, or the tape is wound on a reel and shipped.
[0004]
Since a single TCP type semiconductor device is manufactured based on a flexible film, it is difficult to handle as it is, and is handled by being accommodated in a dedicated carrier. For example, JP-A-5-335786 describes a dedicated carrier such as a carrier for a tape carrier package IC. A single TCP type semiconductor device is cut and molded after aging, testing and measurement, for example, but the TCP type semiconductor device is held in a stable state by using the carrier for the tape carrier package IC. Therefore, the various operations can be performed efficiently and stably. Also, the TCP semiconductor device can be easily attached and detached.
[0005]
[Problems to be solved by the invention]
The TCP type semiconductor device is assembled in a tape state in its manufacture, and then the tape is cut into individual pieces for each semiconductor device, and further the separated product (TCP type semiconductor device) is accommodated in a dedicated carrier. The product is further stored in a transport tray in a state protected by a carrier. The TCP semiconductor device is attached to and detached from the tray, or loading / unloading of the TCP semiconductor device to / from each facility (for example, an electrical characteristic test device) in the sorting process is performed in the state of the carrier.
[0006]
In handling a TCP type semiconductor device using such a carrier, since the outer dimension of the carrier is larger than the outer dimension of the TCP type semiconductor device, the accommodation efficiency of the TCP type semiconductor device in the tray is lowered.
[0007]
FIG. 13 is a perspective view of a conventional tray 20. On the surface (upper surface) of the tray 20, rectangular recesses 21 are arranged in a vertical and horizontal manner. As shown in FIG. 14, a carrier (dedicated carrier) 15 is accommodated in the accommodation recess 21. The carrier 15 is a carrier disclosed in Japanese Patent Application Laid-Open No. 5-335786, on which the TCP type semiconductor device 10 is placed and accommodated. The TCP type semiconductor device 10 includes a tape 5 made of a flexible insulating film, a lead pattern (a plurality of leads 4) formed on the surface of the insulating tape 5, and an electrode portion electrically connected to the lead 4. It has a structure having a semiconductor chip (not shown) connected to each other and a resin body 7 covering a portion including the semiconductor chip. An outer end portion of the lead 4 extends from the periphery of the resin body 7 to constitute an external electrode terminal. Guide holes 5A are provided on both sides of the tape 5 at regular intervals along the edge. This guide hole 5A is a hole called a sprocket hole or a perforation hole.
[0008]
As shown in FIG. 14, the TCP type semiconductor device 10 is accommodated in the tray 20 using the conventional carrier 15 because both ends of the carrier 15 protrude from both sides of the TCP type semiconductor device 10. The accommodation efficiency of the device 10 is reduced.
[0009]
Further, since the carrier 15 is used as it is in the electrical characteristic test of the TCP type semiconductor device, it is difficult to protect the lead portion of the TCP type semiconductor device 10, and the lead may be deformed by the contact of the contact probe (measurement terminal). is there.
[0010]
An object of the present invention is to provide a tray with high accommodation efficiency of a TCP type semiconductor device.
[0011]
Another object of the present invention is to provide a tray capable of performing an electrical characteristic test without damaging the leads of the TCP type semiconductor device.
[0012]
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
[0013]
[Means for Solving the Problems]
The following is a brief description of an outline of typical inventions disclosed in the present application.
[0014]
(1) An insulating tape having a conductive lead pattern on the surface and having a plurality of guide holes, a semiconductor chip fixed to the tape, a predetermined lead provided on the tape, and a predetermined lead of the semiconductor chip A tray that accommodates a tape carrier package type semiconductor device having means for electrically connecting electrodes and an insulating resin body covering a portion including the semiconductor chip, and also serves as a tray for electrical property testing A plurality of guide pins that are inserted into at least some of the guide holes and can fix the semiconductor device to the tray by insertion, and lead portions where the measurement terminals for electrical characteristic test are in contact with each other A support portion for supporting the tape portion supporting the substrate in a close contact state.
[0015]
According to the means of (1), (a) the structure is such that the TCP type semiconductor device is accommodated in the tray so that the guide hole provided in the tape of the TCP type semiconductor device is inserted into the guide pin provided in the tray. Therefore, since a dedicated carrier is not used as in the prior art, the area for accommodation is reduced, and the accommodation efficiency is improved.
[0016]
(B) Therefore, since more TCP type semiconductor devices can be accommodated than one tray, transport efficiency and storage efficiency are improved.
[0017]
(C) In addition, many TCP type semiconductor devices can be set in the loading portion of the electrical characteristic test apparatus, and trays that can accommodate more TCP type semiconductor devices can be set in the unloading portion.
[0018]
(D) Since the tray has a support portion for supporting the tape portion that supports the lead portion where the measurement terminal for electrical property test comes into contact in close contact, the measurement terminal is brought into contact with the lead. Since the lead is supported by the support portion via the tape, the lead is not deformed and is not damaged, and the quality is not deteriorated.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment of the invention, and the repetitive description thereof is omitted.
[0020]
(Embodiment 1)
1 to 8 are diagrams relating to a tray and a TCP type semiconductor device accommodated in the tray according to an embodiment (Embodiment 1) of the present invention. 1 is a schematic plan view showing a tray and a TCP type semiconductor device accommodated in the tray, FIG. 2 is a perspective view of the tray, and FIG. 3 is a schematic plan view of a tray partially containing the TCP type semiconductor device. 4 is a cross-sectional view showing a state in which the TCP type semiconductor device is placed and accommodated in the tray.
[0021]
As shown in FIG. 2, the tray 20 according to the first embodiment includes guide protrusions 25 that protrude from the periphery of the surface (upper surface), and guides having a taper structure over two rows on the inner bottom surface 26 of the tray. Pins 27 are provided. A plurality of guide pin rows constituted by the two rows of guide pins 27 are provided.
[0022]
A plurality of TCP type semiconductor devices 10 are supported and accommodated in parallel by the guide pin rows. In FIG. 1, three guide pin rows are provided, and one guide pin row supports (guides) 12 TCP type semiconductor devices 10. That is, by inserting the guide holes 5A (see FIG. 5) of the tape 5 of the TCP type semiconductor device 10 into two adjacent guide pins 27 in two rows (four guide pins 27 in total), Since the guide pin 27 has a taper structure, the TCP type semiconductor device 10 is surely accommodated in the tray 20 without shifting its position.
[0023]
Further, relief recesses 28 are provided between the guide pin rows. The escape recess 28 is an escape recess provided so that the protruding resin body 7 (see FIG. 6) of the TCP type semiconductor device 10 described later does not come into contact.
[0024]
The tray 20 is made of an insulating resin such as polyphenylene ether (PFE) or polycarbonate (PC). Characteristically, the surface resistance value is 10 ⁶ Ω or less, and it has heat resistance of 125 ° C.
[0025]
The tray 20 of the first embodiment can accommodate more TCP type semiconductor devices 10 than the conventional tray 20 shown in FIG. This varies depending on the difference in dimensions of the TCP type semiconductor devices to be accommodated. For example, when the external dimensions of the tray are the same as the conventional size, 20 TCP type semiconductor devices 10 are accommodated in the tray 20 of FIG. If it is possible, the tray 20 of the first embodiment can accommodate 36 TCP type semiconductor devices 10 and the efficiency of accommodation is greatly improved.
[0026]
The TCP type semiconductor device 10 will now be described with reference to FIGS. 5 is a schematic plan view of the TCP type semiconductor device 10, FIG. 6 is a schematic cross-sectional view, and FIG. 7 is a schematic cross-sectional view enlarging a part of FIG.
[0027]
As shown in FIGS. 5 and 6, the TCP type semiconductor device 10 includes a tape 5 made of a flexible insulating film, a lead pattern (a plurality of leads 4) formed on the surface of the tape 5, The semiconductor chip 1 has an electrode portion electrically connected to the lead 4 and a resin body 7 that covers the portion including the semiconductor chip 1 and protects the circuit forming surface 1X of the semiconductor chip 1. An outer end portion of the lead 4 extends from the periphery of the resin body 7 to constitute an external electrode terminal. Guide holes 5A are provided on both sides of the tape 5 at regular intervals along the edge. This guide hole 5A is a hole called a sprocket hole or a perforation hole.
[0028]
In addition, as a tape used for manufacturing the TCP type semiconductor device 10, a tape in which a lead is formed by etching a metal foil such as a copper foil attached to the tape is used. Is also referred to as a tape carrier 6. FIG. 5 shows a single TCP type semiconductor device 10. Therefore, the lead pattern is a unit lead pattern. As the tape 5, for example, a polyimide resin film having a thickness of 35 μm is used, and as the metal foil, for example, a copper foil having a thickness of 35 μm is used.
[0029]
On both sides of the insulating tape 5, guide holes 5A used for moving and operating the tape carrier 6 are provided at regular intervals. Further, on both sides of the insulating tape 5, positioning holes 5B used for positioning the insulating tape 5 in the manufacturing process are provided.
[0030]
The planar shape of the semiconductor chip 1 is a square shape, for example, a rectangle of 8.4 mm × 13.4 mm. The semiconductor chip 1 incorporates, for example, a 64 megabit DRAM (Dynamic Random Access Memory) as a memory circuit system.
[0031]
Each of the plurality of leads 4 is divided into two lead groups. The leads 4 of one lead group are arranged along one of the two long sides of the semiconductor chip 1 facing each other, and the leads 4 of the other lead group are two long sides of the semiconductor chip 1 facing each other. It is arranged along the long side of one of the sides. One end side of each of the plurality of leads 4 extends on the circuit forming surface 1X of the semiconductor chip 1 via the insulating tape 5, and the other end side of each of the plurality of leads 4 is the outer periphery of the semiconductor chip 1. It is pulled out outside. The other end side of each of the plurality of leads 4 extends across the long hole 5C provided in the insulating tape 5 outside the semiconductor chip 1, and the leading end portion of each other end side is insulated tape. 5 is supported.
[0032]
An electrode 1C (see FIGS. 6 and 7) is formed at the center of the circuit forming surface 1X of the semiconductor chip 1. A plurality of the electrodes 1 </ b> C are arranged along the long side direction of the semiconductor chip 1.
[0033]
The tip portions on one end side of the plurality of leads 4 are electrically and mechanically connected to the respective electrodes 1C of the semiconductor chip 1 via the bumps 3. The bump 3 is not limited to this. For example, an Au bump formed by a ball bonding method on the electrode 1C of the semiconductor chip 1 is used. The connection between the tip portion on one end side of each of the plurality of leads 4 and each electrode 1C is performed by thermocompression bonding.
[0034]
As shown in FIG. 7, the semiconductor chip 1 includes a semiconductor substrate 1A made of, for example, single crystal silicon, and a multilayer wiring layer 1B in which a plurality of insulating layers and wiring layers are stacked on the circuit formation surface of the semiconductor substrate 1A. The main structure is a surface protective film 1D formed so as to cover the multilayer wiring layer 1B. The surface protective film 1D is made of, for example, a polyimide-based resin that can improve the α-ray resistance in the memory and can improve the adhesion to the resin 7.
[0035]
The electrode 1C is formed on the uppermost wiring layer of the multilayer wiring layer 1B of the semiconductor chip 1, and is formed of a metal film such as an aluminum (Al) film or an aluminum alloy film. The bump 3 is connected to the electrode 1C through a bonding opening formed in the surface protective film 1D.
[0036]
The resin body 7 is formed by, for example, applying a thermosetting resin in which an organic solvent is added to an epoxy resin to the circuit forming surface 1X of the semiconductor chip 1 by a potting method, and thereafter performing a heat treatment to cure the thermosetting resin. Formed by. That is, the resin body 7 is formed of an epoxy thermosetting resin. The thickness of the resin body 7 is, for example, about 0.1 to 0.25 mm on the electrode 1 </ b> C of the semiconductor chip 1.
[0037]
A resin film 2 is bonded to the back surface 1Y of the semiconductor chip 1 facing the circuit forming surface 1X so as to cover the back surface 1Y. Thus, the back surface 1Y of the semiconductor chip 1 is protected by the resin film 2 by adhering the resin film 2 to the back surface 1Y of the semiconductor chip 1 so as to cover the back surface 1Y. 1Y is not scratched. As a result, even if the shrinkage force acts on the circuit formation surface 1X of the semiconductor chip 1 due to the curing shrinkage of the resin body 7 covering the circuit formation surface 1X of the semiconductor chip 1, and the warp of the semiconductor chip 1 occurs, Thus, cracks of the semiconductor chip 1 that occur can be prevented. In particular, when the thickness of the semiconductor substrate 1A is reduced in order to reduce the thickness of the TCP type semiconductor device 10, the planar shape of the semiconductor chip 1 is formed in a rectangular shape, or the adhesion to the resin body 7 is improved. When the surface protective film 1D is formed of a polyimide-based resin for the purpose, or when the thickness of the surface protective film 1D is increased in order to improve the α-ray resistance of the memory, the semiconductor chip 1 is further warped. Since it tends to occur, it is important to prevent the back surface 1Y of the semiconductor chip 1 from being scratched. The resin film 2 is made of, for example, an epoxy thermosetting resin. By forming the resin film 2 with an epoxy-based thermosetting resin, the epoxy-based thermosetting resin has high adhesiveness with silicon, so that the resin film 2 is difficult to peel off.
[0038]
As shown in FIGS. 1, 3, and 4, the TCP type semiconductor device 10 that has been separated into pieces has a predetermined guide hole 5 </ b> A of the tape 5 of the TCP type semiconductor device 10 inserted into the guide pin 27 of the tray 20. In this way, it is placed on the bottom surface 26 in the tray. The guide pins 27 are arranged so as to have a predetermined positional relationship with respect to the pitch of the two rows of guide holes (sprocket holes) 5A provided on the tape 5 of the TCP type semiconductor device 10 and the interval between adjacent rows. Since the guide pin 27 has a taper structure that becomes gradually narrower toward the tip, the TCP type semiconductor device 10 has a predetermined operation by placing the TCP type semiconductor device 10 on the bottom surface 26 in the tray. It is securely held and accommodated at the position.
[0039]
The tray 20 according to the first embodiment has a structure in which the TCP type semiconductor device 10 is positioned and accommodated directly using the guide pins 27 of the tray 20 and does not use a dedicated carrier as in the conventional case, so that the area for accommodation is small. It becomes smaller and accommodation efficiency improves. That is, as described above, although it varies depending on the difference in dimensions of the TCP type semiconductor device 10, for example, when the outer dimensions of the tray 20 are the same as those of the conventional tray 20, there are 20 TCP type semiconductors in the tray 20 of FIG. Assuming that the apparatus 10 can be accommodated, the tray 20 of the first embodiment can accommodate 36 TCP-type semiconductor devices 10 and the accommodation efficiency is significantly improved.
[0040]
The tray 20 of the first embodiment is provided with a relief recess 28 at a predetermined position on the bottom surface 26 of the tray so that the resin body 7 portion protruding downward from the TCP type semiconductor device 10 does not come into contact. A part of the lead 4 of the TCP type semiconductor device 10 is supported by the bottom surface 26 in the tray via the tape 5. That is, the tray inner bottom surface 26 around the relief recess 28 becomes a portion (support portion 29: see FIG. 8) that supports the lead portion with which the measurement terminal for electrical characteristic test comes into contact via the tape portion. This support portion is in close contact with the tape 5 and supports the lead 4 portion. Further, as described above, the tray 20 has a surface resistance value of 10 ⁶ Ω or less and high electrical insulation. Further, the heat resistance is as high as 125 ° C. Therefore, as shown in FIG. 8, the electrical characteristics of the TCP type semiconductor device 10 are measured by bringing the lead 4 into contact with a measurement terminal 30 for electrical characteristics test, for example, a probe. can do. Therefore, the tray 20 of the first embodiment can be used in an electrical characteristic test such as a burn-in test.
[0041]
According to the tray 20 of this Embodiment 1, there exist the following effects.
[0042]
(1) Since the structure is such that the TCP type semiconductor device 10 is accommodated in the tray 20 by inserting the guide hole 5A provided in the tape 5 of the TCP type semiconductor device 10 into the guide pin 27 provided in the tray 20. Thus, since the dedicated carrier is not used, the area for accommodation is reduced, and the accommodation efficiency is improved.
[0043]
(2) Since the tray 20 of the first embodiment can accommodate more TCP type semiconductor devices 10 as compared with the conventional product, the conveyance efficiency and the storage efficiency are improved.
[0044]
(3) The tray 20 of the first embodiment can set a larger number of TCP type semiconductor devices in the loading portion of the electrical property test apparatus and can accommodate more TCP type semiconductor devices in the unloading portion. Can be set.
[0045]
(4) The tray 20 according to the first embodiment has the support portion 29 that supports the portion of the tape 5 that supports the portion of the lead 4 where the measurement terminal for electrical property test comes into contact, in a close contact state. When the measurement terminal 30 is brought into contact with the lead 4, the lead 4 is supported by the support portion 29 via the tape 5, so that the lead 4 is not deformed and is not damaged, and quality does not deteriorate.
[0046]
(Embodiment 2)
9 is a schematic perspective view of a tray according to another embodiment (Embodiment 2) of the present invention, FIG. 10 is a plan view of a tray partially containing a TCP type semiconductor device, and FIG. 11 is a view of the TCP type semiconductor device. It is a partial typical sectional view showing a characteristic inspection state.
[0047]
The tray 20 of the second embodiment has a structure in which the relief recess 28 is not provided in the tray 20 of the first embodiment. That is, the tray 20 of the second embodiment has a structure in which the TCP type semiconductor device 10 protrudes only on one surface side of the tape 5 as shown in FIG. 11, and the other surface of the TCP type semiconductor device 10 is flat. Yes. As shown in FIGS. 9 and 11, the tray 20 that houses the TCP type semiconductor device 10 has a feature that the bottom surface 26 of the tray 20 may remain flat, and the manufacturing cost is low. Also in the tray 20 of the second embodiment, as shown in FIG. 11, an electrical characteristic test of the TCP semiconductor device 10 accommodated in the tray state can be performed. The lead 4 is supported by the support portion 29 via the tape 5, and damage to the lead 4 can be prevented without the lead 4 being bent due to the contact of the measurement terminal 30 with the lead 4.
[0048]
(Embodiment 3)
FIG. 12 is a schematic perspective view of a tray which is another embodiment (Embodiment 3) of the present invention. The tray 20 of the third embodiment has a structure in which a relief recess 28 is provided along the center of the guide pin row. In this structure, the extending direction of the lead 4 is orthogonal to the guide pin row, and when the measurement terminal is brought into contact with the lead in the electrical property test equipment, the lead at the contact point is located outside the escape recess 28 via the tape. Since it is supported by the inner bottom surface 26 of the tray, the electrical characteristics test can be performed without damaging the leads.
[0049]
Although the invention made by the present inventor has been specifically described based on the embodiment, the present invention is not limited to the embodiment described above, and various modifications can be made without departing from the scope of the invention. Nor.
[0050]
【The invention's effect】
The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
[0051]
(1) Since the structure is such that a TCP type semiconductor device is directly supported and accommodated by a guide pin provided on a tray without using a dedicated carrier as in the prior art, the accommodation efficiency is increased.
(2) Therefore, conveyance efficiency and storage efficiency are improved.
[0052]
(3) In addition, a single tray can set a larger number of TCP type semiconductor devices at the loading location of the electrical property test apparatus, and can accommodate a larger number of TCP type semiconductor devices at the unloading location.
[0053]
(4) The measurement terminal for electrical property test can be brought into contact with the TCP type semiconductor device accommodated in the tray without damaging the lead.
[Brief description of the drawings]
FIG. 1 is a schematic plan view showing a tray and a TCP type semiconductor device accommodated in the tray according to an embodiment (Embodiment 1) of the present invention.
FIG. 2 is a perspective view of a tray according to the first embodiment.
FIG. 3 is a schematic plan view showing a tray according to the first embodiment in which a TCP type semiconductor device is partially accommodated.
4 is a cross-sectional view showing a state in which a TCP type semiconductor device is placed and accommodated in the tray of Embodiment 1, and is a cross-sectional view taken along the line AA of FIG.
FIG. 5 is an enlarged plan view of a TCP type semiconductor device accommodated in a tray according to the first embodiment.
FIG. 6 is a cross-sectional view showing a part of the TCP type semiconductor device.
FIG. 7 is an enlarged sectional view of a part of the sectional view.
FIG. 8 is a partial schematic cross-sectional view showing a characteristic inspection state of a TCP type semiconductor device in the tray of the first embodiment.
FIG. 9 is a schematic perspective view of a tray according to another embodiment (Embodiment 2) of the present invention.
FIG. 10 is a plan view of a tray according to the second embodiment in which a TCP type semiconductor device is partially accommodated.
FIG. 11 is a partial schematic cross-sectional view showing a characteristic inspection state of a TCP type semiconductor device in the tray of the second embodiment.
FIG. 12 is a schematic perspective view of a tray which is another embodiment (Embodiment 3) of the present invention.
FIG. 13 is a perspective view showing a conventional tray.
FIG. 14 is a schematic diagram showing a state in which a TCP type semiconductor device is accommodated in a conventional tray.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 1A ... Semiconductor substrate, 1C ... Electrode, 2 ... Resin film, 3 ... Bump, 4 ... Lead, 5 ... Tape, 5A ... Guide hole (sprocket hole), 6 ... Tape carrier, 7 ... Resin body, DESCRIPTION OF SYMBOLS 10 ... TCP type semiconductor device, 15 ... Carrier (dedicated carrier), 20 ... Tray, 21 ... Housing depression, 25 ... Guide protrusion, 26 ... Bottom of tray, 27 ... Guide pin, 28 ... Relief depression, 29 ... Supporting part 30 ... Measurement terminals.

Claims (2)

A tray that detachably accommodates a plurality of tape carrier package type semiconductor devices,
Each of the semiconductor devices includes an insulating carrier tape, a part constituting a group of external electrode terminals that are exposed on one surface of the tape and supported by the tape, and each of the terminal component parts and a semiconductor. wherein a group of conductive lead pattern including a lead portion, a plurality of guide holes, a semiconductor chip is fixed to the semiconductor chip mounting portion, and each of the set of lead portions extending between the chip mounting portion possess means for electrically connecting the corresponding electrode formed on the semiconductor chip, and an insulating resin for covering the portion including the semiconductor chip,
The tray includes a plurality of accommodating portions that detachably accommodate each of the tape carrier package type semiconductor devices , and each of the accommodating portions is inserted into at least some of the guide holes, and the semiconductor device is inserted by insertion. A plurality of guide pins that can be fixed to the tray, and a tape portion that supports the group of external electrode terminal components when the tray is accommodated in the electrical property test apparatus. A support portion that is placed so that when the measurement terminal of the electrical characteristic test apparatus is brought into contact with the corresponding external electrode terminal constituent portion from above , the lead portion at the corresponding contact portion is tightly sealed. A tray for a tape carrier package type semiconductor device, wherein the tray is configured to be supported in a worn state. 2. Each of the tray accommodating portions is provided with a relief recess so that when the semiconductor device is accommodated, the portion accommodating the resin body does not contact the tray. Tray.

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