JP3826936B2 - Storage device - Google Patents

Description

  The present invention relates to an auxiliary storage device of a portable small information processing device, and more particularly to a semiconductor file storage device using a flash memory and an information device equipped with the semiconductor file storage device.

  A magnetic storage device is the most common prior art of auxiliary storage devices for information equipment. In a magnetic storage device, a file to be written is divided into storage units called sectors and stored in correspondence with the physical position of the storage medium. To do. That is, in rewriting a certain file, writing is basically performed at the same position, and writing to a new sector is performed as much as writing data increases. On the other hand, an optical disk device can be cited as another auxiliary storage device. Currently, a general optical disc can be written only once and cannot be erased. Therefore, when a file that has been written once is rewritten, it is not actually rewritten, and data written in another area and previously written is invalidated and is not read later. That is, unlike the magnetic disk device, the auxiliary storage device function is achieved by a method in which the rewrite data and the storage location are not related at all. In recent years, semiconductor file storage devices using semiconductor memory as an auxiliary storage device have attracted attention as a storage device that functions as an auxiliary storage device by accessing a large amount of data at high speed by rotating the disk as described above. ing. In particular, it is considered that an electrically rewritable nonvolatile memory (hereinafter referred to as EEPROM) will become the mainstream of semiconductor file storage devices. There is Patent Document 1 as one technique for realizing it. This is a storage device using an EEPROM, which protects the limitation on the number of rewrite / erase operations, which is a drawback of the EEPROM, and realizes a practical storage device using the EEPROM. In brief, a plurality of memory elements are prepared, and the number of erase / rewrite times of each element is recorded and managed. When the specified number of times smaller than the guaranteed number of rewrites of the EEPROM is reached, the memory element is switched to use. By doing so, the stored data is protected.

Japanese Patent Laid-Open No. 3-25798

The above-described conventional optical disk apparatus method has a problem in that a storage area is crushed every time a file is rewritten, and a storage area cannot be secured without a very large capacity storage medium. In particular, in the case of a storage device of an information device in which file rewriting is severe, the storage area becomes large even if the actual storage capacity is not so large. On the other hand, in the case of the most common magnetic disk device as an auxiliary storage device, when rewriting a file once written, new data is written in the same area. However, when this is applied to an EEPROM, a file that is a list of stored files (generally called a directory file), a file (file allocation table) for referring to a storage location of the file, etc. has write access to the data. Rewriting occurs every time and rewriting concentrates locally. This significantly shortens the lifetime in an EEPROM with a limited number of write / erase cycles .

As a means of writing data, there is no relation between the storage data and the storage location as in the optical disc. When data is written, the data is added, and rewriting of the already written file occurs. In this case, the storage area of the old file is made invalid and is made an erasable area. That is, when a write request from the host system is already rewritten request to the logical sector in which data is written, if no data by incrementing the pointer to a sector for the writing of the next data is written A writable sector is searched for, and data according to a write request from the host system is written in the writable sector. In addition, when the write request from the host system is a rewrite request to a logical sector in which data has already been written, the data is referred to by referring to a table indicating whether or not data has been written for the sector on the flash memory. Search for sectors that have not been written and are writable, write data that accompanies a write request from the host system to the writable sector, and write data for sectors that have written data that accompany the write request from the host system. Is written to the table.

According to the present invention, in the data management system of an auxiliary storage device using a flash memory with a limited number of erasures, even if rewriting of a specific logical sector address frequently occurs, the same storage area is not physically used. As a system, it has the effect of extending the service life .

  Examples of the present invention will be described below.

  First, a first embodiment will be described with reference to FIG. 1, FIG. 2, FIG. 3, and FIG. FIG. 1 is a hardware configuration for realizing the first embodiment, FIG. 2 is a diagram showing an internal configuration of a flash memory chip used in this embodiment, and FIG. 3 is a main routine for storing data management. FIG. 4 is a flowchart of an erasure management routine.

  First, the operation of the flash memory will be described with reference to FIG. In the figure, 11 is the entire memory chip, 12 is a data write unit, 13 is the minimum unit for data erasure, and is called an erase block. The flash memory is an electrically erasable PROM, which is a kind of EEPROM, but the normal EEPROM has the same data writing unit and erasing (rewriting) unit, whereas the flash memory has an erasing unit more than the writing unit. It is extremely large, and many other data must be erased at the same time in order to rewrite the data once written. As an alternative advantage, the degree of integration can be higher than that of a normal EEPROM, which is suitable for a large-capacity storage device. In FIG. 2, the entire memory chip 11 is divided into one or more erase blocks 13, and the write unit 12 is 1 word (a word in the memory and follows the memory configuration), whereas the erase block 13 is larger than that. It becomes an area. When a flash memory is used as an auxiliary storage device, it becomes easier to use 512 bytes as an erasing unit according to the specifications of the magnetic disk device.

  Next, the system configuration and operation of the first embodiment of the storage device using this memory will be described with reference to FIG. 1, FIG. 3, and FIG. In the following description, the file data storage unit is referred to as a sector, and in this embodiment, one sector corresponds to one erase block. In the figure, 1 is a flash memory chip group that stores file data, 2 is an access controller that generates an access signal for the flash memory 1, and 3 is an external storage system that uses flash memory by operating stored data and status data. Microprocessor 4 is a program memory storing a control program for operating processor 3, and 5 is a logic for referring to where on the flash memory 1 data of a sector (logical sector) indicated by a certain logical address is mapped. A sector table, 6 is a physical sector table for referring to a logical sector number of file data mapped to a physical sector indicated by a physical address on the flash memory 1, and 7 is a record of the total number of erasures of each physical sector. Erase count management table, The status table for referring to the status of each physical sector, 9 is a write buffer for temporarily storing write data to speed up the writing of data. Next, the operation will be described. When there is a data read access request from a system (host system) that makes a data access request to this system, the processor 3 refers to the logical sector table 5 to determine the physical sector in which the corresponding logical sector is stored, The physical sector is accessed and the requested data is sent to the host system. The data write request from the host system will be described with reference to the flowchart of FIG. The flowchart of FIG. 3 is a flowchart of the main routine of the program stored in the program memory 4. The flow will be described. First, a write pointer indicating a sector to which the next data is written is set. It is determined from the status table 8 whether the indicated sector is in a writable state (a). In the status table, there are a flag indicating that the number of erasures has increased and it has deteriorated and is no longer usable, and a flag indicating that data has already been written. Move the pointer (b). If writing is possible, data is written to the sector (c). And when rewriting a logical sector that has already been written once, the data of the logical sector that was written last time is no longer necessary, so the physical sector where the unnecessary data is written is searched from the logical sector table. This is erased, and at the same time, the contents of the physical sector table 6 written at the previous writing are erased (d). When the sector is erased, the process jumps to the erase management routine. The erase management routine will be described later. The physical sector number indicated by the write pointer is written in the logical sector table 5, and the logical sector number written in the location indicated by the write pointer is written in the physical sector table 6 (e). In (b), whether data has been written may be written in the status table 8 or may be judged by the physical sector table 6. If the physical sector table 6 is an unwritten sector, it can be easily discriminated by setting all bits to H or L. Next, the above-described erasure management routine will be described with reference to FIG. First, the erase counter of the erase management table corresponding to the physical sector from which the data has been erased is incremented by 1 (a). If the erase count has not reached the specified count, the process returns to the main routine. Replacement is performed (b). In order to replace data, first, the erasure management table of all other sectors is examined to find a sector that has the smallest number of erasures and has not yet been replaced (c). The data stored in the sector with the smallest number of erases found is written into the sector that has been erased (d). After writing, a replacement flag is set in the status table of both sectors (e). This replacement flag is considered to be selected as a sector with a small number of erasures again if there is no means to indicate that a physical sector with a small number of erasures is frequently erased by this routine. In this case, a sector with a large number of erases in which data is replaced prevents the occurrence of frequent erasure. When this replacement flag is set, the contents of the corresponding logical sector table and the physical sector table are rewritten (f). When the above is completed, the process returns to the main routine. Since the sector selected with the minimum number of erases is erased once, it is necessary to increment the erase number counter of the erase management table. The replacement flag is cleared when all the sector flags are set, or the logic judgment is reversed. In other words, if the value determined to have been replaced at 1 becomes 0, it is determined that the replacement has been performed. Further, the specified number of times of (b) should be a multiple of a value smaller than the guaranteed value of the number of rewritable times of the flash memory. For example, if the guaranteed number of times is 10,000, it is a multiple of 1000 times, 2000 times, 5000 times Multiple times, etc. are appropriate. This routine replaces the data of a block with a small number of erasures when frequent erasures occur in a limited block, and stores the data of a sector where erasures do not occur so much in a block with a large number of erasures. Are to be averaged. This is considered to be very effective for data stored in a normal auxiliary storage device. For example, data rewriting does not occur at all in the area where the operation system program is stored, but data rewriting frequently occurs in the area of graphic data or text data which is the data of the application program. Therefore, if the number of times of erasure is not averaged, the data in the system program area will not change, so there will be no deterioration due to an increase in the number of times of erasure, and the memory in other data areas is limited. Erase is frequently performed in the memory space, and the number of erasures is increased rapidly. In other words, it can be said that it is particularly effective when the usable area is small.

  The above is the description of the operation of the first embodiment. According to the present embodiment, since the processor is installed, it becomes possible to perform fine control according to the contents of the program memory, the writing speed can be increased by the write buffer, and the status of each sector is provided by providing the status table. Is scalable to record. In order to extend the life of the flash memory, there is an effect that the optimum file management in which the number of erasures is managed can be performed.

  Next, a second embodiment will be described with reference to FIG. 5, FIG. 6, FIG. 7, FIG. 5 is a hardware configuration in the second embodiment, FIG. 6 is a diagram showing a storage configuration in the flash memory in this embodiment, FIG. 7 is a flowchart of a main routine for writing data, and FIG. FIG. 9 is a flowchart of an arrangement routine for making a sector storing unnecessary data an unwritten sector, and FIG. 9 is a flowchart of an erasure management routine for managing the number of erasures.

  First, referring to FIG. 6, a flash memory chip and its usage in the present embodiment will be described. In the figure, 52 is a unit of a storage area for storing file data called a sector used in the first embodiment. 53 is a minimum unit of data erasure and is called an erasure block, and is composed of a plurality of sectors 52. That is, unlike the first embodiment, the storage capacities of the erase block 53 and the sector 52 are different. Reference numeral 54 denotes the entire memory chip, which is composed of a plurality of erase blocks in the figure, but one erase block per chip is also conceivable. In this embodiment, the file data is stored in units of sectors. However, in order to erase the file data in response to a request for rewriting the file data, the present invention is adapted to a memory chip in which other sectors are also erased at the same time. FIG. 5 shows the hardware configuration of this embodiment. In FIG. 5, reference numeral 41 denotes a flash memory which is a storage area for write data, and each one is a memory chip 54. 42 is an access controller for accessing the flash memory 41, 43 is a processor for operating stored data and status data, 44 is a program memory storing a control program for operating the processor 3, and 45 is a physical sector 51 of the flash memory 41. Is a physical sector table for referring to the stored logical sector number, and 46 is a physical sector number for referring to which physical sector of the flash memory 1 the data of the stored logical sector number is stored. , 47 is an erase management table for recording the number of times of erasure of each block, 48 is a status table for storing the status of each block, and 49 is a write sector number table for referring to the number of written sectors. , 50 is faster writing Aim for, write buffer for temporarily holding write data, 51 is a sort buffer used in performing organizing routine.

  Next, the operation will be described. The read access is performed with reference to the logical sector table 45 and the physical sector table 46 as in the first embodiment. On the other hand, the write access will be described with reference to FIG. 7. First, a write pointer is set, and the status table of the block indicated by the write pointer is referred to (a). That is, the write pointer in this embodiment is a block unit pointer. If it is broken, the pointer is moved to the next block (b). If not broken, the write sector number table 49 of the block is referred to (c). If all sectors in the block have already been written, the process jumps to the organizing routine. The organizing routine will be described later. If there is an unwritten sector, data is written (d), and the corresponding write sector number table is incremented by 1 (e). Therefore, for example, when the previous write in FIG. 6 is written in the third physical sector of the first block, the next write is performed in the fourth physical sector of the first block. Actual write access control is performed by the access controller 2. When all the sectors of the block where writing has been performed are written, the process jumps to the organizing routine (f). After the writing, the sector numbers written in the physical sector table and the logical sector table are recorded (g). If the previously written logical sector is rewritten, the logical sector number previously written in the physical sector table is erased. This is an operation for indicating that the data of the physical sector is invalid. The operation (f) is provided for shortening the arrangement time and should not be performed in order to increase the erase efficiency of the flash memory. Next, the organizing routine will be described. The organizing routine is an operation routine when the block indicated by the write pointer has already been written to all sectors and cannot be written. The reason why the organizing routine is necessary is that writing to another physical sector is performed in rewriting data of the same file in the writing method described so far. In other words, the data written before rewriting is unnecessary, but is stored in the memory and should be erased. However, if the flash memory is erased whenever it becomes unnecessary, the life of the flash memory with a finite number of erases is shortened. Therefore, it is erased by a cleaning routine. The cleanup routine is performed when a block is full of write data. A specific arrangement method is performed according to the flowchart of FIG. Hereinafter, each part in the flowchart will be described. With reference to the physical sector table of the rearrangement block, it is checked whether there is a sector that is unnecessary because it has been newly rewritten to another erasable sector in the block (a). If there is no erasable sector, the process returns to the main routine. First, the data in the block to be organized is saved in the organization buffer 51 (b), and the block to be organized is deleted (c). When erasure is performed, the process jumps to the erasure management routine of FIG. 9, which will be described later (d). Then, it returns to a block that arranges only necessary sectors in the arrangement buffer (e). When the sector is restored, the logical sector table 45 and the physical sector table 46 do not need to be rewritten if the sector is restored to its original location. Further, if the method of filling in from the young sector number of the block at the time of restoration, it becomes easy to write the next new sector, but it is necessary to rewrite the logical sector table 45 and the physical sector table 46. In either case, the write sector number table is rewritten to the restored sector number (f). Next, the erase management routine will be described. FIG. 9 is a flowchart of the erasure management routine, which is basically the same as that described in the first embodiment, except that erasure management is performed in units of blocks instead of sectors. First, it is checked whether the erase count of the erased block has reached a certain number (a). If not, this routine is exited. If it has reached (b) the number of erases of all blocks is searched, and the block with the smallest number of erases is searched (c). If the arranged block does not match the block with the smallest erase count, the data of these two blocks are exchanged (d). The rearrangement data buffer 51 in FIG. 5 is used for the replacement. Then, a replacement flag is set for the replaced block (e). The erase counter is incremented and the logical sector table and physical sector table are rewritten (f). The above is the operation of the erase management routine in the present embodiment. As in the first embodiment, this routine is used to replace the data of a block with a small number of erasures when the erasure frequently occurs in a limited block, thereby averaging the number of erasures.

  The above is the description of the operation of the second embodiment. According to the present embodiment, when the erase block is too large as a sector unit to be written, there is an effect that the erase block can be divided and used efficiently.

  Next, a third embodiment will be described with reference to FIGS. 10, 11 and 12. FIG. In this embodiment, the memory chip has the same sector capacity as that of the erase block of FIG. 2 as in the first embodiment. However, when used, the memory chip has the configuration shown in FIG. In the figure, reference numeral 91 denotes a block composed of a plurality of sectors. In this embodiment, since the units of the sector and the erase block are the same, the block 91 of this embodiment is composed of a plurality of erase blocks. The other numbers already mentioned are the same as those in FIG. The hardware configuration is as shown in FIG. 11. In FIG. 11, reference numeral 101 denotes an erasure management table that records the number of erasures for each block 91. As will be described in detail later, the cumulative number of erasures in the block 91 is stored as a result. It will be. Others are the same as FIG. 1 and FIG. FIG. 12 is a flowchart of the erasure management routine of this embodiment, and the main routine is the same as that of FIG. Assuming that the operation of the main routine follows the description of the first embodiment, the operation after jumping from the main routine to the erasure management routine will be described with reference to FIG. First, the number counter of the erase management table of the block including the erased sector is incremented by 1 (a). It is determined whether the erase count has reached a specified value (b), and if it has reached, the number of erases of the previous block is checked to determine the block that has the smallest count and has not yet been replaced (c), Replace block data (d). Then, a replacement flag is set (e) and the contents of each table are rewritten (f). The feature of this embodiment is that erasure management is performed in a plurality of sectors in a memory capable of erasing in units of sectors, thereby simplifying erasure management, saving waiting time in rewriting a large file, and reducing the erasure management table. The effect of being able to be expected. Therefore, it is suitable for a case where it is difficult to perform erasure management for each sector in a large-capacity storage device.

  By the way, a description will be given of tables such as a logical sector table and a physical sector table which are constituent elements in the embodiments described so far. Since the flash memory is a non-volatile memory, it is natural that the data of the flash memory is not lost even if the supply of power is stopped when the system of the present invention is not operating. However, no matter how much data is stored, if the contents of the table are lost, it is not possible to know what data is stored in which sector, and the data in the flash memory becomes unidentified and meaningless data. . Therefore, the data stored in the table also needs to be saved after the power supply is stopped. However, it is not necessary to save all the data in the table. For example, data in the logical sector table can be easily created from data in the physical sector table. Since the reverse is also possible, that is, it is only necessary to store either one of the data. Therefore, the physical sector table is stored in an electrically erasable and writable nonvolatile memory (EEPROM), and the logical sector table is created from the physical sector table when the system is started to start power supply. In this way, the logical sector table can use volatile memory. Similarly, since the used sector number table of each block can be created from the physical sector table, it is created in the volatile memory when the system is started. These tables can be expanded on the main memory of the main system. Other tables include an erase management table and a status table, but these cannot be created from other tables, and the erase management table is stored in the EEPROM because data should not be lost. The status table is obtained when writing or erasing is performed once again, but since it is troublesome twice, it should be stored in the EEPROM. However, it can also be stored in volatile memory to save memory. The storage media for these tables can be stored in the same memory to reduce the number of chips. For example, since both the physical sector table and the erase count table should be stored in the nonvolatile memory, they can be stored in the same EEPROM chip so that only one chip can be stored in the EEPROM. When the processor is a one-chip microcomputer, a relatively small table such as a used sector number table is stored in a RAM core built in the one-chip microcomputer. FIG. 13 shows a configuration diagram of the fourth embodiment in which these are summarized. In the figure, 111 is a one-chip microcomputer incorporating RAM and ROM, 112 is a RAM core in the one-chip microcomputer, 113 is a ROM core in the one-chip microcomputer, 114 is an EEPROM chip, 115 is an SRAM or DRAM, and the following numbers Is the same as described above. The RAM core 112 stores a used sector number table, the ROM core 113 stores a microcomputer control program, the EEPROM 114 stores a physical sector table and an erasure management table, and the RAM 115 stores a logical sector table. Further, in the free area of the RAM 115, it is also used as a rearrangement data buffer for performing the rearrangement routine shown in FIG. 9 and a write buffer for speeding up writing. Thus, according to the present embodiment, the number of chips can be reduced by combining tables and buffers according to the characteristics of the storage medium. On the other hand, FIG. 24 shows an embodiment in which the EEPROM is omitted. This is realized by storing the non-volatile table data described in the fourth embodiment in the flash memory 1. In the figure, reference numeral 116 denotes a table storage area provided in the flash memory 1. However, since the flash memory is not suitable for updating small units of data such as table data, the table data is stored in the flash memory 1 immediately before the power is turned off. Assume that the data is stored in the SRAM 115. In other words, when the power of the system of the present invention is shut off, necessary data in the contents of the RAM 115 is transferred to the flash memory 1 and then the power is shut off. Next, when the power is turned on, data is transferred from the flash memory 1 to the RAM 115. Start normal operation after loading. Therefore, it is necessary to always secure the storage area 116 for storing the table in the flash memory. However, this storage position need not be fixed. If the table is not fixed, an area indicating the address for storing the table is provided in advance, and the address at which the table is stored is always recorded, so that it is not necessary to search the position of the table when the power is turned on.

  Further, examples of the configuration of the flash memory itself are shown in FIG. 14, FIG. 15, FIG. In FIG. 14, a flash memory chip is provided with a storage area for a table different from the data area in units of erase blocks, and the EEPROM can be omitted by writing the physical sector table and the number of erases for each block. In the figure, 131 is an erase block, and 132 is a table storage area added to each erase block 131. The data stored in the table 132 corresponding to the erase block 131 can be accessed at the same address as the erase block 131, and the file data and the table data are separated according to the selection by the signal line and the mode. In this way, the data area and the table area have the same lifetime, and the data area 131 can be used, but the table is not broken and cannot be used. The tendency becomes stronger if the data area and the table area are close to each other. Since a table is formed for each erase block, address lines can be easily shared. An example of the table storage area 132 is shown in FIG. In the figure, 133 represents the entire block of erasure units, 134 is a file data area in the block, 135 is an area for storing the logical number of the block, and has a storage capacity of 8 bits. A status table 136 indicates the state of the block, and has a capacity of 16 bits. The contents of the status table 136 include an erase count management table, an unusable flag, a replacement flag, a correction flag, and the like. The surplus bits in the status table 136 can also be used for block number storage. FIG. 23B shows an example of a table area 132 having an error correction area. Reference numeral 137 denotes an area indicating an error correction area. In this case, the storage capacity is set according to the correction capability. For example, if the error correction area is 8 bits with respect to a memory chip having a word configuration of 16 bits per word and an erase block of 512 B, it has 1 word correction capability. That is, if the word number where the defective bit exists is written here and the correction data is written in another area, the data of the word is replaced at the time of reading. A correction data area may be provided in this table, or there may be a method of collecting it in another storage area. In the former, all data corrections can be covered within the table, but since each block has a correction data area, the redundant area becomes large in the entire chip. In the latter case, a means for indicating the area where correction data is written is required, and the access time increases because other storage areas are accessed. However, depending on the number of correction data, the redundant storage area can be increased or decreased. Can be set. In addition, it is preferable to use a surplus bit in the status table area 136 for designating an area in which correction data is written. An example of the correction data area will be described with reference to FIG. FIG. 15 has an EEPROM type storage area 138 that can be written and erased in fine units such as 1 byte or 1 word separately from the data storage area, and this area is used as a correction data table to write correction data. The data correction is realized by reading out and replacing the data at the designated position when reading out the data at the location to be corrected. Further, FIG. 15 can also be considered as an example in which the configuration of the table area is not configured near the erase block of the corresponding data area, and the same effect is aimed at as a whole. In this case, the constituent elements in the figure are the same as those in FIG. 14, and the configuration of the memory cells is integrated in the chip. Therefore, there is an effect that the configuration of the memory cells in FIG. 14 is simplified.

  FIG. 16 shows a flash memory chip having another configuration. In addition to the data storage area 141, a buffer area 142 for temporarily holding data is provided in the memory chip, and this part may be a volatile memory. Reference numeral 143 denotes an address counter that counts up by a clock input. At the time of write access, write data is written to the buffer area 142, and by inputting an address, a plurality of data can be transferred and written to the data area 141 at once. If such a memory is used, an external write buffer for speeding up writing can be omitted. On the other hand, if a plurality of data can be transferred to the buffer area 142 at a time by inputting an address from the data area 141 at the time of reading, the read access is also simplified. In this case, the buffer does not need to input continuous addresses as a serial access memory, and has an internal address counter 143. When a clock is input, the internal address counter counts up, and the continuous area can be accessed to output data. This will make it even easier to use. It is most effective to configure the buffer area with one sector as a unit, and the buffer effect can be improved by configuring the buffer area not only with one unit but with a plurality of units. For example, when one sector is an erase block unit, if one buffer for storing data of one sector is provided, writing / reading of one sector is performed at a time. It is possible to accept writing of data in the sector, and it is possible to prepare read data. If this buffer is used, an external organizing buffer can be omitted.

  Next, an embodiment in which the storage device using the flash memory described in the above embodiments is applied to an information processing system will be described. FIG. 17 is a diagram for explaining an interface circuit for connecting a storage device using flash memory (hereinafter referred to as a flash file system) to an information processing system (hereinafter referred to as a host). An I / O bus, and standard buses include ISA, EISA, microchannel, and SCSI buses. Reference numeral 202 denotes a bus buffer or bus controller for converting a standard bus into a dedicated bus, but a system in which this is omitted is also conceivable. The host is connected so that the host can store data that cannot be stored in the main storage device, expanded main storage device, display storage device, etc. in its own system, or data that it wants to retain even after the power is turned off. It is an external storage device or auxiliary storage device installed. A floppy disk drive 203, a hard disk drive 204, and the like are common, but in addition, a flash file system 205 is connected. Note that all these auxiliary storage devices do not have to be connected to the host system, but are selected and connected by the user as appropriate. An interface circuit 206 is added to the flash file system 205, 207 is an interface register group, 208 is a command register which is one of the registers in the interface register group, 209 is an address decoding circuit of the interface register group, and 210 is Command interrupt signal. The numbers already described are the same as those described above. However, the program stored in the program memory 4 stores a program corresponding to a command centered on an access request from the host, in addition to the control and management of the file data described above. The host issues a command to the auxiliary storage device through the host bus 201. This is performed by writing a command code to the command register 208 which is one of the interface register groups 207 in the interface circuit 206. The interface register group 207 includes all the registers that the hard disk drive has as interface registers, and the register specifications are the same, so that it is not different from accessing the hard disk from the host. It is considered effective to match this register with an interface of another auxiliary storage device such as a floppy disk drive or an optical disk drive. Or, it seems to support the interface of multiple auxiliary storage devices at the same time, and it seems that the host uses another auxiliary storage device. It is valid. When the command is written by the host, the command register 208 issues an interrupt signal 210 to the processor 3, and the processor 3 that receives the command interprets the written command code and responds to the host command request. The interface register group 207 and commands all correspond to the hard disk drive. However, since the storage media are different, there are some unnecessary ones and different ones. For example, the format is indispensable for the magnetic disk device, but is unnecessary for the semiconductor disk drive, so that the processing is not particularly performed or is simply rewritten into regular data. Hereinafter, file data read / write is performed in the same manner as described in the above embodiments. Although the first embodiment is applied to the drawing, it can be applied as it is to the other embodiments described so far or described later.

  FIG. 18 is a configuration diagram of an example of a personal computer having a flash file system as an auxiliary storage device. In the figure, 221 is a CPU of this information device, 222 is a coprocessor, 223 is a standard I / O bus constructed in the information processing system of this embodiment, 224 is a bus unit that constructs a standard I / O bus 223, 225 Is a memory control unit for accessing a high-speed memory such as a main memory and an expansion memory, 226 is a main memory, 227 is a BIOS ROM in which a basic control program is stored, 228 is a keyboard controller, and a keyboard is connected to this point. . It is assumed that 229 is a display adapter to which some display device is connected. 230 is an expansion memory, 231 is a parallel port I / F for connecting a printer, 232 is a serial port I / F such as a mouse or RS232C, 233 is a floppy disk drive, 234 is a standard HDD I / O from a standard I / O bus 223 A buffer controller 235 for converting to F is a flash file system. The inside of the flash file system 235 is configured by the ones shown in the embodiments so far. Reference numeral 236 denotes an I / F unit that receives file access and transfers data. The interface register group 207 in FIG. And the address decode 209. A control unit 237 performs data management and control inside the flash file system 235, and includes the processor 3, the program memory 4, the access controller 2, and the write buffer 9 in FIG. 238 is a flash memory array for storing file data, 239 is an information table for storing data and information for memory management, and includes all the tables 5, 6, 7, and 8 in FIG. Next, the operation will be described. When the power is turned on and the operation is started, the CPU 221 first accesses the BIOS ROM 227 through the standard I / O bus 223 to perform initial diagnosis and initial setting. Then, the system program is loaded from the auxiliary storage device into the main memory 226. In this embodiment, a flash file system 235 is employed as an auxiliary storage device. However, the CPU 221 operates as accessing the HDD to the HDD controller 234 through the standard I / O bus 223. Therefore, the flash file system 235 supports the HDD fully compatible I / F function by the internal I / F unit 236. When the loading of the system program ends, the process proceeds according to the user's processing request. It should be noted that the user proceeds with input / output of processing through the KBDC 228 and the display adapter 229 on the standard I / O bus 223. If necessary, an input / output device connected to the parallel I / F 231 and the serial I / F 232 is utilized. Further, when the main memory 226 on the main body has insufficient main storage capacity, the expansion RAM 230 supplements the main memory. When the user wants to read / write a file, the user requests access to the auxiliary storage device assuming that the HDD is an auxiliary storage device, and the flash file system 235 receives it and accesses file data. According to this embodiment, the flash file system is adopted as if the HDD, which is currently the most common auxiliary storage device, is mounted on the standard I / O bus of a standard personal computer. . Therefore, even if the flash file system is adopted as a new storage medium, the BIOS ROM and the system program can be used as they are without changing the HDD loaded with the HDD. In the above embodiment, a standard personal computer is taken as an example, and information on a configuration in which the main memory and the expansion memory are on the standard I / O bus, and there is no coprocessor, parallel I / F, and serial I / F. Devices are also conceivable, and the present invention can be applied to these devices.

  Next, an embodiment for coping with the occurrence of defects in the flash memory will be described with reference to FIG. As described above, the flash memory has a limit in number of rewrites in principle. However, as the deterioration due to rewrite progresses, the consumption time of data erasing / writing becomes longer, and a problem arises in data retention reliability. Therefore, when it is determined that the memory device has not been used due to the deterioration of the memory, the use of the storage area or the memory chip should be stopped. When it is determined that the number of such areas has increased and the lifetime of the entire flash file system is approaching, the use of the flash file system should be stopped. As a method of detecting the deterioration of the flash memory, a method of judging from the erasure failure that the erasure is not completed within a specified number of times even if the erasure is repeated, or the erasure time is longer than a specified time. A method of judging from a writing failure that writing is not completed within a specified number of times even if writing is repeated. In addition, it is conceivable to manage the number of erasures and judge from the fact that the number of erasures has reached a predetermined number. When the storage capacity that has deteriorated and becomes unusable reaches a specified value, it is determined that the lifetime of the flash file system is reached. FIG. 19 shows an embodiment for realizing a means for alerting the user. In FIG. 19, a controller 240 in the flash file system 235 recognizes the use limit of the system and informs the host system of this. An interrupt signal 241 is an error report register indicating that the use limit has been reached. When the host receives the interrupt signal 240 through the HDD buffer 234, the host accesses the register 241 in the flash file system to grasp the situation and reports it to the user as appropriate. FIG. 20 is a flowchart showing software that realizes this operation. (1) is a flowchart of a check routine in the flash file system, and (2) is a flowchart of a warning program for a user in the host system. . The operation will be described while also serving as an illustration. The controller of the flash file system jumps to this routine when it detects a storage area that seems to have reached the usage limit. Then, the capacity of the use limit storage area is added (a). When a certain limit value is reached (b), a value indicating that the use limit has been reached is written in the error report register in the own system as the error content (c). Then, an interrupt signal is output to the host (d), and this routine is terminated. The added value of the capacity (a) needs to be stored in the flash memory or in another memory. Further, the limit value of the remaining capacity in (b) is appropriately set according to the system. The host system that received the interrupt signal in (d) interrupted the processing at a good break and entered the routine shown in the flowchart of (2). First, the error report register in the flash file system was accessed and an interrupt was received. The reason is determined (e), and if this is a use stop request due to reaching the usage limit of the flash file system (f), access to the flash file system thereafter is prohibited (g) and the user is warned (h) ). As a warning method, a method of visually appealing such as using a display device of an information device or attaching a warning indicator, and a method of visually appealing such as generating a warning sound can be considered. If only write access is prohibited and read access is allowed, file data can be backed up. According to the present embodiment, the user can be notified as soon as the flash file system reaches the usage limit, and the reliability of the data can be increased. As another embodiment, the interrupt signal 240 in FIG. 18 is not provided, and the routine of FIG. 20 (2) is executed by reading the error report register every time the host system accesses. According to the present embodiment, it is possible to report the usage limit by replacing the HDD without changing the hardware configuration of the host system at all. As another embodiment, the maintenance limit is recognized by periodically executing a maintenance program on the host system, reading the error report register 241 at that time, and checking whether the usage limit has been reached. According to the present embodiment, there is no need to make any changes to the BIOS program or system program of the host system.

  Next, an embodiment corresponding to the process at the time of power-off will be shown. The flash file system of the present invention is basically an auxiliary storage device and generally has a configuration in which power is supplied from a host system. However, since the operation is asynchronous with the host, the flash file system may be operating even when the host is not operating. However, if the user handling the host does not recognize it, the host may be turned off, and the power supply to the flash file system in operation may be stopped. An embodiment of the invention corresponding to this is shown in FIG. FIG. 21 is a diagram of a system configured to supply backup power with a battery so that the flash file system can continue to operate even after power supply from the host is stopped. In FIG. 21, reference numeral 251 denotes a personal computer or the like serving as a host. An information device 252 is a flash file system, 253 is a backup battery, and 254 is a backflow cut-off circuit for preventing the power of the battery 253 from flowing back to the host 251 when the host 251 is powered off. 255 is a detection circuit that detects that the power supply from the host 251 has been cut off, 256 is a detection signal that is an output of the detection circuit, 257 is a cutoff circuit that shuts off the power supply to the flash file system 252 of the battery 253, and 258 is a flash This is a shut-off signal that causes the shut-off circuit 257 to operate because the processing that the file system 252 is in the middle of processing is terminated and power supply is no longer required. While the power is supplied from the host 251, the flash file system is driven by the power of the host 251. This can trickle charge the battery 253 by adjusting the output voltage of the battery 253 and the supply voltage of the host 251 well. However, when the battery 253 is not a secondary battery, it is necessary to add an inflow prevention diode or the like. When the host 251 is powered off and power supply to the flash file system 252 is stopped, power is supplied from the battery 253 and the flash file can continue to operate. When the power shutdown detection circuit 255 detects the power shutdown, the flash file system recognizes this by the detection signal 256, completes the work being processed, and then performs the power shutdown process. In the power cut-off process, the battery cut-off circuit 257 is finally cut off by the cut-off signal 258, and the operation of the flash file system is ended. The backflow blocking circuit 254 may be a method using a backflow prevention diode. According to the present embodiment, since the host 251 is completely separated from the flash file system in terms of signals, only the data exchange by the host access request is performed, and the host operation stop can be closed within the host. In other words, the host does not need to change the hardware by connecting the flash file system.

  FIG. 22 shows another embodiment corresponding to host power-off. However, in the example shown in FIG. 22, the supply by the power source of the host is actually continued. In the figure, 258 is a power supply line supplied from the host 251 to the flash file system 252 and 259 is a power supply busy signal indicating that the flash file system 252 is working and needs to be supplied with power. The power supply circuit of the host 251 does not stop the power supply while the power supply busy signal 259 is active even when the power switch is turned off, and all processing of the flash file system is completed and the power supply busy signal 259 becomes inactive. Then stop the power supply. That is, for the user, even if it is assumed that the power switch of the host information device is turned off and the power supply is cut off, the operation is not cut off in actual operation, and the end of the operation of the flash file system 252 is waited. According to this embodiment, since the host recognizes the end of the operation of the flash file system and controls the power supply, there is an effect that the configuration of the power supply circuit of the flash file system is simplified without requiring a backup power supply.

  Next, a fifth embodiment of the present invention will be described. FIG. 25 is a hardware configuration for realizing the present invention, FIG. 26 is a diagram showing a storage configuration in the flash memory of the present invention, and FIG. 27 is a flowchart for data writing. For convenience, FIG. 26 will be described. In the figure, reference numeral 311 denotes a storage area in units of 512 bytes (4 kilobits), which is a sector in which data is actually written and is called a physical sector. On the other hand, the storage data supply side manages data by virtual sectors called logical sectors. All physical sectors 311 and logical sectors are assigned numbers having no correlation. Reference numeral 312 denotes an erasure block which is a unit for collectively erasing data, and its capacity varies depending on the memory. For example, if the erase block unit is 16 kilobytes, 32 physical sectors are one block. Reference numeral 313 denotes a memory chip. If the chip is an erase unit of 16 kilobytes and a 4-megabit chip, it is divided into 32 blocks and 1024 sectors. Those that can be erased only on a chip basis have one block per chip, and those that can be erased for each physical sector have the same number of blocks and physical sectors. The flash memory allows random write access to an erased block within the block. However, once written, it cannot be written unless the next erase is performed. Therefore, in a memory having a plurality of sectors as one block, all the sectors should be erased after being written. In the following description, it is assumed that the flash memory is a 4 megabit chip and the erase block is 16 kilobytes (128 kilobits). FIG. 26 illustrates a memory with exactly that configuration. FIG. 25 shows a hardware configuration when this memory chip 313 is used. In FIG. 25, 301 is a flash memory that is a storage area for write data, 302 is an access controller that accesses the flash memory 301, and 303 is storage data and status data. The processor to be operated, 304 is a logical sector table in which the physical sector number is recorded in order to refer to which physical sector of the flash memory 301 the data of the stored logical sector number is stored, and 305 is the flash memory 301 is a physical sector table for referring to the logical sector number stored in the physical sector 311, and 306 is a block table for storing the status of each block. Whether the block is usable or what is in the block Sector is written Or, and the like are recorded. Reference numeral 307 denotes a write buffer for temporarily storing write data and quickly restoring the bus right to the data supply side because the flash memory has a writing speed much slower than that of reading. Reference numeral 308 denotes an arrangement data buffer that temporarily holds arrangement data in an arrangement routine described later. FIG. 27 is a flowchart for explaining the operation of the processor 303 of FIG. 25 for performing writing in the configuration of FIG. The operation will be described below with reference to this flowchart. When data to be written is stored, one sector = 512 bytes. That is, data less than 512 bytes is also stored in the 512-byte storage area. A number is assigned to the data of one sector unit, and this is used as a logical sector number. The data supply side need only be aware of this logical sector number. Assuming that the data supply side requests writing of one sector, a certain logical sector number is assigned to this data, and this data is handled with the previous logical sector number even if rewriting occurs thereafter. On the other hand, the data storage side determines the storage location of this data. The storage location is the first unwritten sector of the block pointed to by the write pointer. In other words, it is the sector next to the physical sector where the previous writing was performed. For example, in FIG. 26, when the previous write is written in the third physical sector of the first block, the next write is performed in the fourth physical sector of the first block. At this time, the processor 303 determines the data storage location by accessing the block table. This operation is (a) in the flowchart. In (b), when there is no problem in writing, the number of write sectors in the block is incremented and data is written. Actual write access control is performed by the access controller 302. After writing, the sector numbers written in the physical sector table and the logical sector table are recorded. If the logical sector previously written is rewritten, the logical sector number previously written in the physical sector table is erased. This is an operation for indicating that the data of the physical sector is invalid. The organizing routine (c) is an operation routine when the block indicated by the write pointer has already been written to all sectors and cannot be written. This will be described with reference to the flowchart of FIG. (D) is an operation for stopping writing to the block and writing to the next block because writing is impossible when the block is broken or the cleaning routine is entered. On the other hand, at the time of read access, the logical sector table is referred to by the logical sector number in which necessary data is stored, the physical sector number is determined, and necessary data is read out. Next, the organizing routine will be described. The reason why the organizing routine is necessary is that writing to another physical sector is performed in rewriting data of the same file in the writing method described so far. In other words, the data written before rewriting is unnecessary, but is stored in the memory and is data to be erased. However, if the flash memory is erased whenever it becomes unnecessary, the life of the flash memory with a finite number of erases is shortened. Therefore, it is erased by a cleaning routine. The cleanup routine is performed when a block is full of write data. A specific arrangement method is performed according to the flowchart of FIG. Hereinafter, each part in the flowchart will be described. (A) All the data in the block to be organized is once saved in the organized data buffer 308 of FIG. (B) The block is erased when it can be saved and erased. (C) Refer to the physical sector table of each sector in the organized data buffer to determine whether data is necessary or not. (D) If it is necessary data, it is written in the block again. The above is the description of the operation of the embodiment of the present invention. According to the present embodiment, the erasure of each erase block of the flash memory is performed sequentially without concentrating on a part, so that an effect of extending the life can be expected. In addition, there is an effect to compensate for the disadvantage that the writing speed of the flash memory is slow in writing. In addition, since unnecessary data is efficiently erased, there is an effect that the storage capacity of the semiconductor disk can always be maintained.

  Next, another embodiment will be described. FIG. 29 shows an example of the configuration of a device for determining deterioration of the flash memory. In the figure, 401 is a flash memory cell, 402 is an erase time measuring timer for measuring the time from the start to the end of erase control, and 403 is a flash memory An erasure control circuit that performs control for erasing data written in the cell 401, 404 is a deterioration degree management table that stores the deterioration degree of the flash memory cell 401, 405 is a controller that performs overall control thereof, and 406 is deterioration management. An activation signal for simultaneously activating the erase time measurement timer 402 when the controller 405 causes the erase control circuit 403 to start erasure; 407, an end signal that informs the erase time measurement timer 402 that the erase control circuit 403 has terminated the erase process; Reference numeral 408 denotes measurement data measured by the erase time measurement timer. FIG. 30 is a flowchart for explaining the operation of the controller 405 in FIG. 29, and the determination of the deterioration of the flash memory is performed according to this flowchart. Next, the operation will be described with reference to FIGS. First, when the memory cell 401 needs to be erased from the control of the entire system, the controller 405 receives an erase request (FIG. 30a). Then, the controller 405 instructs the erase control circuit 403 to start the erase location and erase operation (FIG. 30b). Receiving this, the erase control circuit 403 starts the erase operation of the corresponding memory cell 401 (FIG. 30c). At the same time, the controller 405 activates the erase time measurement timer 402 (FIG. 30d). The controller 405 waits until the erasing is completed, and when the memory control circuit 403 completes erasing of the memory cell 401, it notifies the controller 405 (FIG. 30e). The controller 405 recognizes the time spent for erasing with reference to the erasing time measurement timer 402, discriminates the degree of deterioration, and assigns a number corresponding thereto to the storage area. For example, the degree of deterioration is divided into 8 stages, and if the erasing time is the same as that in the unused state, “0” is assumed, and the state in which deterioration is advanced and unusable is “7”. Number is assigned. Then, the number assigned to the storage area is stored in the deterioration management table 404 (FIG. 30f). By setting the degree of deterioration to 8 levels, one storage area can be allocated to 1 byte, and management becomes easy. Each storage area is handled based on this deterioration management table. In the area where the degree of deterioration has advanced by one, the data of the area with small deterioration is transferred each time to stop the progress of deterioration, and the deterioration of all storage areas is averaged. Also, use of the area where the deterioration has reached the final stage is prohibited. This is processing performed by a controller that controls the entire storage system. The operation flow of the controller of this storage system is shown in FIG. If the host system has a write access request to the storage system and the controller of the storage system determines that an erasing operation is required when data is written (FIG. 31a), the controller 405 of FIG. Request for erasure and deterioration management (FIG. 31b). When the erasing operation is completed, the degree of deterioration of the erased storage area is referred to by the degree-of-degradation management table 404 in FIG. 29 (FIG. 31b). An area that has not yet been searched is found (FIG. 31c), and the data is transferred and replaced (FIG. 31d). It is more efficient to use the replacement flag described in the first embodiment to determine that this deterioration has not progressed the most and replacement has not yet been performed. This is because the area that has been subjected to the above replacement process is not data whose deterioration does not progress (data that is unlikely to be rewritten) and therefore should not be used for replacement of deterioration averaging. Make it clear. In this embodiment, the control of the entire storage system and the control in the apparatus for determining deterioration are separated and the controller is separate, but the controller 405 may be shared with the controller of the storage system. The erase time measurement timer 402 is also configured as hardware, but may be erase time measurement by software control by a controller. These are things you should do if you want to reduce the number of parts in your storage system. According to the present embodiment, the table for deterioration management can be changed to the erasure management table employed in the previous embodiments, and the storage area to be used can be drastically saved. In addition, in the determination of the deterioration of the memory, the erasure time is a more direct determination material than the number of erasures, so that there is an effect that the deterioration degree can be grasped more accurately and the deterioration can be averaged.

  Next, another embodiment of the erase count management using the embodiment of FIG. 24 will be described with reference to FIG. The method of managing the number of erasures in the embodiments so far has been counted up once each time erasure is performed, and the number of erasures is grasped in detail. Truncates the bits. In the embodiment of FIG. 24, in the normal use state, the erase count is stored in the volatile memory such as SRAM or DRAM up to the least significant bit and transferred to the flash memory when the power is cut off. One bit or more is discarded from (Fig. 32a). Alternatively, carry and transfer (FIG. 32b). For the lower bits that are discarded, the optimum value should be considered based on the limit value of the number of erases of the flash memory, so that the recognition of deterioration by grasping the number of erases does not lose accuracy. It is assumed that the maximum value of the number of times does not exceed 1% of the guaranteed value of the number of erases of the flash memory. That is, if the guaranteed value of the number of erasures is 10,000 times, 6 bits (maximum value 63) not exceeding 100 times are set as the limit of truncation. According to the present embodiment, the erasure count is not accurately grasped, but since the error is 1% or less of the guaranteed value of the erase count of the flash memory, the accuracy of the guaranteed value originally has a width of about one digit. If it is considered to be data that has a strong tendency to occur, it is not an essential problem. As a result, the effect of reducing the capacity of the flash memory used for managing the number of erases is great.

  Next, another embodiment for reducing the table area will be described. FIG. 33 is a configuration diagram of a storage system in which the physical sector table and logical sector table described in the above embodiments are omitted. However, an address conversion table 411 is provided instead of these. The other conversion numbers are the address conversion table 411 that does not convert the address input of the storage area that has not been subjected to data replacement for averaging the deterioration level, but is used as the address input of the storage area to which data replacement has been performed. On the other hand, it is a table for outputting the replaced address. Therefore, there is no need for a physical sector table or logical sector table. Basically, the address requested by the system is accessed as it is in correspondence with the physical address on the memory, and the degradation of the area progresses. If the data is replaced for averaging, the address is converted. This embodiment can be applied only when the file data storage unit (sector) and the erasure unit are the same as in the first embodiment. The capacity of the address conversion table depends on the capacity of the area that can be converted. That is, if the capacity of the address conversion table is reduced, the storage capacity that can be converted is reduced, and if a large area is secured, addresses in many areas can be converted. This is a factor directly related to the life of the system. FIG. 33 is a modification of the first embodiment, but it can also be applied to an embodiment provided with the deterioration management table described with reference to FIG. According to the present embodiment, data management is simplified and the table area can be greatly reduced.

  Next, an embodiment in which an indicator indicating the operation is provided will be described. FIG. 34 is a diagram showing an example of the internal configuration showing the present embodiment. The numbers already described are based on FIG. 17 and the same numbers as those in FIG. In the other figures, reference numeral 421 denotes an output port signal of the processor 3 indicating that data is being transferred from the write buffer 9 to the flash memory 1, and reference numeral 422 denotes an indicator which indicates that light is being transferred by the output port signal 421 by light emission. A light emitting diode is suitable as the indicator. FIG. 35 is an external view of the present embodiment, (1) is an overall view of the card shape, and (2) is a view showing an example in use. In the figure, 423 is an IC card which is an auxiliary storage device of the present invention, 424 is a connector, 425 is a light emitting diode, and 426 is a host personal computer. In FIG. 34, when the host personal computer makes a request for write access processing to the auxiliary storage device 205 via the standard IO bus 201, the processor 3 performs processing to store the write data in the write buffer 9. When this is completed, a signal indicating completion of writing is output to the standard bus 201. Thereafter, the processor 3 transfers and stores the data stored in the write buffer 9 to the flash memory 1. During this process, the processor 3 activates the output port signal 421 to cause the indicator 422 to emit light. When the transfer from the write buffer 9 to the flash memory 1 is completed, the processor 3 deactivates the output port 421 and stops the indicator 425 from emitting light. FIG. 35 (1) shows an example of application in the form of an IC card. An indicator 425 is attached to the side opposite to the connector so that the indicator 425 can be turned on when attached to the personal computer body. (2) shows a state where it is actually inserted into a notebook computer, and the user can work while confirming whether the indicator 425 is lit or not. However, the user has to confirm the lighting only when the power is cut off. According to the present embodiment, the circuit configuration is relatively simple, the visibility of the indicator is good, and there is an effect that an erroneous operation of the user can be prevented.

The hardware block diagram of the 1st Example in this invention. 1 is a storage configuration diagram of a flash memory chip according to a first embodiment of the present invention. FIG. The flowchart of the main routine which shows operation | movement of 1st Example in this invention. Flowchart of an erase management routine showing the erase management operation of the first embodiment of the present invention. The hardware block diagram of the 2nd Example in this invention. The memory block diagram of the flash memory chip of 2nd Example in this invention. The flowchart of the main routine showing the operation of the second embodiment of the present invention. Arrangement routine flowchart showing the sector arrangement operation of the second embodiment of the present invention. Flowchart of the erase management routine showing the erase management operation of the second embodiment of the present invention. The hardware block diagram of the 3rd Example in this invention. The memory block diagram of the flash memory chip of 3rd Example in this invention. Flowchart of the erase management routine showing the erase management operation of the third embodiment of the present invention. Hardware configuration diagram of the fourth invention in the present invention Configuration diagram of a flash memory chip with a table for each erase block Configuration diagram of a flash memory chip with an area for storing information in addition to the data area Configuration diagram of a flash memory chip with a buffer area separate from the data area The hardware block diagram of the interface part of the flash file system of 4th Example in this invention. The block diagram of the information equipment which uses the flash file system of 4th Example in this invention as an auxiliary storage device. Configuration diagram of an embodiment for reporting the use limit in the present invention Flowchart of an embodiment for reporting the use limit in the present invention The block diagram of the Example provided with the backup battery in this invention The block diagram of the Example provided with the power supply control signal in this invention Example of flash memory data storage with an information storage area separate from the data area Configuration diagram of the embodiment in which the EEPROM is omitted from FIG. Hardware configuration diagram of fifth embodiment of the present invention Storage configuration diagram of a flash memory chip according to a fifth embodiment of the present invention Main routine flowchart showing the operation of the fifth embodiment of the present invention. Arrangement routine flowchart showing the sector arrangement operation of the fifth embodiment of the present invention. Configuration diagram of an embodiment that extends the life of the system by managing deterioration over time Operation flow of the deterioration management controller in the embodiment of FIG. Operation flow of the storage system controller in the embodiment of FIG. Explanatory drawing of the Example which saves the memory capacity of an erasure | elimination management table Configuration diagram of an embodiment that employs an address conversion table to reduce the storage capacity of the sector management table Configuration diagram of an embodiment provided with an indicator indicating that the auxiliary storage device is operating External view of an embodiment provided with an indicator indicating that the auxiliary storage device is in operation

Explanation of symbols

1 Flash memory 3 Processor 5 Logical sector table 6 Physical sector table 7 Erase count management table 8 Status table 9 Write buffer 13 Erase block 49 Write sector number table 51 Arrangement buffer 52 Physical sector 111 One-chip microcomputer 112 RAM core 113 ROM core 114 EEPROM
115 DRAM or SRAM
116 Table area 132 Table storage area 142 Buffer area 143 Address counter 207 I / F register group 227 BIOSROM
236 I / F unit 241 Error report register 253 Backup battery 259 Power supply busy signal 402 Erasing time measurement timer 404 Deterioration degree management table 411 Address conversion table 421 Output port signal 422 Indicator 425 Indicator (appearance)

Claims (6)

A storage device,
And the flash memory can be electrically erased,
A controller for accessing the flash memory in response to an access request from an external host system,
The flash memory can store data in units of sectors ,
When the write request from the host system is a rewrite request to a logical sector to which data has already been written, the control unit writes data by incrementing a pointer indicating a sector to which next data is written. A storage device that searches for a sector that is not yet writable and writes data that accompanies a write request from the host system to a sector in which the data is not yet written.   The control unit uses the information for referring to which physical sector of the flash memory the data of the logical sector is described, and uses the physical sector corresponding to the logical sector for which an access request is made from the host system. 2. The storage device according to claim 1, wherein a sector number is determined.   The control unit writes the physical sector number of the sector indicated by the pointer into information for referring to which physical sector of the flash memory the data of the logical sector is described. The storage device described in 1.   When the write request from the host system is a rewrite request to the logical sector in which data has already been written, the control unit sends a write-in sector to which the data has not been written from the host system. 4. The storage according to claim 1, wherein the data in the sector corresponding to the logical sector requested to be written from the host system is erased after the data accompanying the write request is written. 5. apparatus.   A storage device,
  Electrically erasable flash memory,
  A controller for accessing the flash memory in response to an access request from an external host system,
  The flash memory can store data in units of sectors,
  The control unit includes a table indicating whether or not data is written for a sector on the flash memory when a write request from the host system is a rewrite request to a logical sector in which data has already been written. The sector in which data is not written is referred to, and a writable sector is searched for. The data accompanying the write request from the host system is written in the writable sector in which the data is not written, and writing from the host system is performed. A storage device, wherein information indicating that data is written is written in the table for a sector in which data accompanying a request is written. Wherein the control unit increments the when a write request from the host system is already rewritten request to the logical sector in which data is written, referring to said table pointer indicating the sector to the writing of the next data memory device according to claim 5, characterized in that out looking writable sectors if no said data is written by.

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