JP3587204B2 - Storage device - Google Patents

Description

[0001]
[Industrial applications]
The present invention relates to an auxiliary storage device of a portable small information processing device, and more particularly to a semiconductor file storage device using a flash memory and an information device having the same.
[0002]
[Prior art]
A magnetic storage device is the most common conventional auxiliary storage device for information equipment. In a magnetic storage device, a file to be written is divided into storage units called sectors, and the storage is performed in accordance with the physical position of a storage medium. I do. In other words, in rewriting a certain file, writing is basically performed at the same position, and when writing data increases, writing to a new sector is performed accordingly. On the other hand, another auxiliary storage device is an optical disk device. Currently, general optical disks can be written only once and cannot be erased. Therefore, when rewriting a file once written, actual rewriting is not performed, but data written in another area and previously written is invalidated so as not to be read thereafter. That is, unlike the magnetic disk device, the function of the auxiliary storage device is performed by a method in which the rewrite data and the storage location are not associated at all. In recent years, a semiconductor file storage device, which uses a semiconductor memory as an auxiliary storage device, has been in the spotlight as a storage device that functions as an auxiliary storage device by accessing a large amount of data at a high speed by rotating the disk as described above. ing. In particular, a memory using an electrically rewritable nonvolatile memory (hereinafter referred to as an EEPROM) is considered to be the mainstream of the semiconductor file storage device in the future. One technique for achieving this is disclosed in Japanese Patent Laid-Open Publication No. Hei 3-25798. This is a storage device using an EEPROM, which protects the limitation of the number of times of rewriting and erasing, which is a drawback of the EEPROM, and realizes a practical storage device using the EEPROM. In brief, a plurality of memory elements are prepared, the number of times of erasing and rewriting of each element is recorded and managed, and when a certain number of times less than the guaranteed number of times of rewriting of the EEPROM is reached, the prepared memory element is switched to use. By doing so, the stored data is protected.
[0003]
[Problems to be solved by the invention]
Since the flash memory is a non-volatile memory, data in the flash memory is not lost even when the supply of power is stopped during non-operation.However, no matter how much data is stored, if the contents of the table are lost, it becomes impossible to know what data is stored in which sector, and the data in the flash memory becomes unidentified meaningless data. . Therefore, the data stored in the table also needs to be stored after the power supply is stopped. However, it is not necessary to save all data in the table.
[0004]
[Means for Solving the Problems]
In the storage device of the present invention, the flash memory stores information (for example, a physical sector table) for referring to the logical sector number of the data mapped to the physical sector, and the control unit performs The information for referencing the logical sector number of the data mapped to the physical sector stored in the flash memory is used to refer to which physical sector of the flash memory the data of the logical sector number is stored in. The information (for example, a logical sector table) is created in the volatile memory, and the control unit responds to the access request and stores the data of the logical sector number created in the volatile memory in any physical sector of the flash memory. Corresponds to the logical sector number specified by the host system using the information for referring to Indexing the physical sector of the flash memory that, to access the physical sector of the flash memory that has been indexed.
In the storage device of the present invention, the flash memory stores information (for example, a physical sector table) for referring to the logical sector number of the data mapped to the physical sector, and the control unit starts power supply. Then, using the information for referencing the logical sector number of the data mapped to the physical sector stored in the flash memory, referring to which physical sector of the flash memory the data of the logical sector number is stored in (For example, a logical sector table) is created in the volatile memory, and the control unit responds to the access request to store the data of the logical sector number created in the volatile memory in the flash memory. Using the information for referring to whether or not it is described in the physical sector, the logical sector number specified by the host system is used. Indexing the physical sector of the flash memory over data is stored, accessing the physical sector of the flash memory is indexed.
In the storage device of the present invention, each erase block of the flash memory refers to a first area for storing data from the host system and a logical sector number of data mapped to a physical sector of the first area. And a second area for storing information (eg, a physical sector table) for storing data mapped to the physical sector stored in the second area of each erase block of the flash memory. Using the information for referencing the logical sector number, information (for example, a logical sector table) for referencing in which physical sector of the flash memory the data of the logical sector number is stored in the volatile memory. In response to the access request, the control unit, in response to the access request, stores the data of the logical sector number created in the volatile memory anywhere in the flash memory. Using the information for referring to whether the data is described in the sector, the physical sector of the flash memory in which the data of the logical sector number specified by the host system is stored, and the physical sector of the determined flash memory is accessed. Do.
[Action]
According to the above meansSince information for referencing a logical sector number of data mapped to a physical sector (for example, a physical sector table) is stored in a flash memory, even if power supply is stopped, data mapped to a physical sector is stored. The information for referring to the logical sector number of the flash memory is not lost, and therefore, it is possible to prevent the data in the flash memory from becoming unidentified and meaningless data..
[0005]
【Example】
Hereinafter, examples of the present invention will be described. First, a first embodiment will be described with reference to FIGS. 1, 2, 3, and 4. FIG. FIG. 1 shows a hardware configuration for realizing the first embodiment, FIG. 2 shows an internal configuration of a flash memory chip used in the present embodiment, and FIG. 3 shows a main routine of stored data management. FIG. 4 is a flowchart of the erase management routine.
[0006]
First, the operation of the flash memory will be described with reference to FIG. In the figure, reference numeral 11 denotes the entire memory chip, 12 denotes a data write unit, and 13 denotes a minimum unit of data erase, which is called an erase block. A flash memory is an electrically erasable PROM and is a kind of EEPROM. A normal EEPROM has the same data writing unit and erasing (rewriting) unit, whereas a flash memory has an erasing unit rather than a writing unit. It is extremely large, and in order to rewrite data that has been written once, many other data must also be erased at the same time. As an advantage instead, the degree of integration can be higher than that of a normal EEPROM, and it is suitable for a large-capacity storage device. In FIG. 2, the entire memory chip 11 is divided into one or more erase blocks 13, and the write unit 12 is one word (a word in the memory and according to the memory configuration), whereas the erase block 13 is larger. Area. When a flash memory is used as an auxiliary storage device, it is easier to use if 512 bytes are used as an erasing unit according to the specifications of the magnetic disk device.
[0007]
Next, the system configuration and operation of a first embodiment of a storage device using this memory will be described with reference to FIGS. 1, 3 and 4. FIG. In the following description, the storage unit of the file data is referred to as a sector, and in this embodiment, one sector corresponds to one erase block. In the figure, 1 is a group of flash memory chips for storing file data, 2 is an access controller for generating an access signal for the flash memory 1, and 3 is an external storage system using a flash memory by operating storage data and status data. A microprocessor 4 is a program memory storing a control program for operating the processor 3, and 5 is a logic for referencing where data of a sector (logical sector) indicated by a certain logical address is mapped on the flash memory 1. A sector table, 6 is a physical sector table for referring to a logical sector number of file data mapped to a physical sector indicated by a physical address on the flash memory 1, and 7 is a record of the total number of erasures of each physical sector. Erase count management table, The status table for referring to the status of each physical sector, 9 is a write buffer for temporarily storing write data to speed up the writing of data. Next, the operation will be described. When there is a data read access request from a system (host system) that makes a data access request to the present system, the processor 3 refers to the logical sector table 5 to determine a physical sector in which the relevant logical sector is stored, and It accesses the physical sector and sends the requested data to the host system. The data write request from the host system will be described with reference to the flowchart in FIG. The flowchart of FIG. 3 is a flowchart of the main routine of the program stored in the program memory 4. The flow will be described. First, a write pointer indicating a sector in which the next data is to be written is set. The status table 8 determines whether the indicated sector is in a writable state (a). In the status table, there are a flag indicating that the number of erasures has increased and the data has been degraded and is no longer usable, and a flag indicating that data has already been written. The pointer is moved (b). If writing is possible, the data is written to the sector (c). In the case of rewriting of a logical sector that has already been written once, since the data of the previously written logical sector is no longer necessary, the physical sector to which the unnecessary data is written is searched from the logical sector table. Then, the contents of the physical sector table 6 written at the time of the previous writing are deleted at the same time (d). When the sector is erased, the process jumps to the erase management routine. The erasure management routine will be described later. Then, the physical sector number indicated by the write pointer is written in the logical sector table 5, and the logical sector number written in the location indicated by the write pointer is written in the physical sector table 6 (e). In (b), the determination as to whether data has been written may be made in the status table 8 or the physical sector table 6 may be used. If the physical sector table 6 is an unwritten sector, it can be easily identified by setting all bits to H or L. Next, the aforementioned erase management routine will be described with reference to FIG. First, the erase counter of the erase management table corresponding to the physical sector from which the data has been erased is incremented by one (a). If the erase count has not reached the specified count, the process returns to the main routine. The replacement is performed (b). In order to replace the data, first, the erase management tables of all other sectors are checked, and the sector with the smallest number of erases and whose data has not yet been replaced is searched for (c). The data stored in the found sector having the smallest number of erasures is written to the previously erased sector (d). After the writing, the exchange flags in the status tables of both sectors are set (e). It is conceivable that this replacement flag may cause a physical sector with a small number of erasures to be selected as a sector with a small number of erasures again without means for indicating that the physical sector with a small number of erasures frequently occurs by this routine. At this time, the sector in which the data is replaced and the number of times of erasing is large prevents the erasure from occurring frequently. When the exchange flag is set, the contents of the corresponding logical sector table and the contents of the physical sector table are rewritten (f). Upon completion of the above, the process returns to the main routine. Since the sector selected as having the smallest number of erasures is erased once, it is necessary to increment the erasure number counter of the erasure management table. The replacement flag is cleared when the flags of all the sectors are set, or the logical judgment is inverted. That is, when it is determined that the exchange has been performed when the value is 1, the exchange is performed when the value becomes 0. Also, the specified number of times (b) should be a multiple of a value smaller than the guaranteed value of the number of rewritable times of the flash memory. For example, if the number of guaranteed times is 10,000, the number of times is 1000 times, 2,000 times, and 5,000 times. It is appropriate to use a multiple of the number. According to this routine, if erasure occurs frequently in a limited number of blocks, the data of a block having a small number of erasures is replaced by data of a block having a small number of erasures. Is to be averaged. This is considered to be very effective for data stored in a normal auxiliary storage device. For example, data is not rewritten at all in an area where an operation system program is stored, but data is frequently rewritten in an area of graphic data or text data which is data of an application program. Therefore, if the number of erasures is not averaged, the data in the memory of the system program area is unlikely to change, so that deterioration due to the increase in the number of erasures does not occur at all, and the memory of the other data area is limited. Erase is frequently performed in the memory space, and the number of times of erase is rapidly increased. In other words, it can be said that there is a particularly great effect when the usable area is small.
[0008]
The above is the description of the operation of the first embodiment. According to the present embodiment, a processor enables a fine control in accordance with the contents of the program memory, a write buffer speeds up writing, and a status table provides a status of each sector. It is extensible to record Then, in order to extend the life of the flash memory, there is an effect that optimum file management in which the number of erasures is managed can be performed.
[0009]
Next, a second embodiment will be described with reference to FIGS. 5, 6, 7, 8, and 9. FIG. FIG. 5 shows a hardware configuration in the second embodiment, FIG. 6 shows a storage configuration in a flash memory in the present embodiment, FIG. 7 is a flowchart of a main routine for writing data, and FIG. FIG. 9 is a flowchart of an organizing routine for changing a sector storing unnecessary data into an unwritten sector, and FIG. 9 is a flowchart of an erasing management routine for managing the number of erasures.
[0010]
First, the chip of the flash memory according to the present embodiment and its use will be described with reference to FIG. In the figure, reference numeral 52 denotes a unit of a storage area for storing file data called a sector used in the first embodiment. Reference numeral 53 denotes a minimum unit of data erasure, which is called an erase block, and is constituted by a plurality of sectors 52. That is, unlike the first embodiment, the storage capacities of the erase block 53 and the sector 52 are different. Numeral 54 denotes the entire memory chip, which is composed of a plurality of erase blocks in the figure, but it is also conceivable that one erase block per chip. In the present embodiment, file data is stored in sector units. However, the present invention is applicable to a memory chip in which other sectors are also erased at the same time when there is a request for rewriting the file data. FIG. 5 shows a hardware configuration of the present embodiment. In FIG. 5, reference numeral 41 denotes a flash memory which is a storage area for write data, and each denotes a memory chip 54. 42, an access controller for accessing the flash memory 41; 43, a processor for operating storage data and status data; 44, a program memory for storing a control program for operating the processor 3; 45, a physical sector 51 of the flash memory 41 Is a physical sector table for referencing the logical sector number stored therein, and 46 is a physical sector number for referencing in which physical sector of the flash memory 1 the data of the stored logical sector number is stored. , An erasure management table 47 for recording the number of erases of each block, a status table 48 for storing the status of each block, and a write sector number table 49 for referring to the number of already written sectors. , 50 is faster writing Aim for, write buffer for temporarily holding write data, 51 is a sort buffer used in performing organizing routine.
[0011]
Next, the operation will be described. At the time of read access, the logical sector table 45 and the physical sector table 46 are referred to as in the first embodiment. On the other hand, for the write access, referring to FIG. 7, a write pointer is first set, and the status table of the block indicated by the write pointer is referred to (a). That is, the write pointer in the present embodiment is a pointer in block units. If it is broken, the pointer is moved to the next block (b). If not broken, the write sector number table 49 of the block is referred to (c). Then, if all the sectors in the block have already been written, the process jumps to the organizing routine. The arrangement routine will be described later. If there is an unwritten sector, data is written (d), and the corresponding write sector number table is incremented by one (e). Therefore, for example, in FIG. 6, when the previous write is written to the third physical sector of the first block, the next write is performed to the fourth physical sector of the first block. Actual write access control is performed by the access controller 2. If all the sectors of the block to which the data has been written have been written, the process jumps to the organizing routine (f). Then, after writing, the written sector numbers are recorded in the physical sector table and the logical sector table, respectively (g). If the previously written logical sector is to be rewritten, the logical sector number previously written in the physical sector table is erased. This is an operation for indicating that the data of the physical sector is invalid. Note that the operation (f) is provided to reduce the sorting time, and should not be performed in order to increase the erasing efficiency of the flash memory. Next, the arranging routine will be described. The arranging routine is an operation routine when the block pointed to by the write pointer has already been written in all the sectors and cannot be written. The reason for the necessity of the rearrangement routine is that in the above-described writing method, data is written to another physical sector in rewriting data of the same file. That is, the data written before rewriting becomes unnecessary, but is data stored in the memory and should be erased. However, erasing the flash memory every time it becomes unnecessary shortens the life of the flash memory having a finite number of erasures. Therefore, the data is deleted by the rearranging routine. The pruning routine is performed when a block is full of write data. A specific method of organizing is performed according to the flowchart of FIG. Hereinafter, each part in the flowchart will be described. By referring to the physical sector table of the rearranged block, it is checked whether there is any erasable sector in the block, that is, whether there is an unnecessary sector because another physical sector has been newly rewritten (a). If there is no erasable sector, the process returns to the main routine. First, data in the block to be arranged is saved in the arrangement buffer 51 (b), and the block to be arranged is erased (c). After the erasure, the process jumps to the erasure management routine of FIG. 9, which will be described later (d). Then, it returns to a block in which only necessary sectors are arranged in the arrangement buffer (e). If the sector position at the time of the return is returned to the original position, there is no need to rewrite the logical sector table 45 and the physical sector table 46. If a method of filling the block starting from the lowest sector number is used at the time of restoration, writing of the next new sector becomes easier, but it is necessary to rewrite the logical sector table 45 and the physical sector table 46. In either case, the write sector number table is rewritten to the restored sector number (f). Next, the erase management routine will be described. FIG. 9 is a flowchart of the erasure management routine, which is basically the same as that described in the first embodiment, except that erasure management is performed in units of blocks instead of sectors. First, it is checked whether the number of erasures of the erased block has reached a certain number (a), and if not, the routine exits. If the number has reached (b), the number of erases of all blocks is searched, and the block with the smallest number of erases is searched (c). If the rearranged block and the block with the smallest number of erasures do not match, the data of these two blocks are replaced (d). The rearrangement data buffer 51 shown in FIG. 5 is used for the replacement. Then, the replacement flag of the replaced block is set (e). The erase counter is incremented and the logical sector table and the physical sector table are rewritten (f). The above is the operation of the erase management routine in this embodiment. As in the first embodiment, according to this routine, if erasure occurs frequently in a limited number of blocks, data in a block having a smaller number of erasures is replaced, and the number of erasures is averaged.
[0012]
The above is the description of the operation of the second embodiment. According to the present embodiment, when an erase block is too large as a unit of a sector to be written, the erase block is divided and can be used efficiently.
[0013]
Next, a third embodiment will be described with reference to FIGS. 10, 11 and 12. FIG. In the present embodiment, the memory chip is assumed to have the same capacity as the erase block of FIG. 2 and the sector as in the first embodiment, but has the configuration shown in FIG. 10 when used. In the figure, reference numeral 91 denotes a block including a plurality of sectors. In this embodiment, since the units of the sector and the erase block are the same, the block 91 of this embodiment is composed of a plurality of erase blocks. The other numbers already described are the same as those in FIG. 2 or FIG. The hardware configuration is shown in FIG. 11. In FIG. 11, reference numeral 101 denotes an erasure management table in which the number of erasures for each block 91 is recorded. Will be. Others are the same as FIG. 1 and FIG. FIG. 12 is a flowchart of the erasure management routine of this embodiment, and the main routine is the same as that of FIG. Assuming that the operation of the main routine follows the description of the first embodiment, the operation after jumping from the main routine to the erase management routine will be described with reference to FIG. First, the number counter of the erase management table of the block including the erased sector is incremented by one (a). It is determined whether the number of erasures has reached a specified value (b), and if so, the number of erasures of the previous block is checked to determine the block with the minimum number of times and data has not been replaced (c). The data of the block is replaced (d). Then, an exchange flag is set (e), and the contents of each table are rewritten (f). The feature of the present embodiment is that erasure management is performed in a plurality of sectors in a memory capable of erasing in sector units, thereby simplifying erasure management, saving waiting time in rewriting a large file, and reducing the erasure management table. The effect that can be expected can be expected. Therefore, it is suitable for a large-capacity storage device when it is difficult to perform erase management for each sector.
[0014]
By the way, tables such as a logical sector table and a physical sector table, which are constituent elements in the embodiments described so far, will be described. Since the flash memory is a non-volatile memory, the system of the present invention does not lose data in the flash memory even when the power supply is stopped during non-operation. However, no matter how much data is stored, if the contents of the table are lost, it becomes impossible to know what data is stored in which sector, and the data in the flash memory becomes unidentified meaningless data. . Therefore, the data stored in the table also needs to be stored after the power supply is stopped. However, it is not necessary to save all data in the table. For example, the data of the logical sector table can be easily created from the data of the physical sector table. The reverse is also possible, that is, it is only necessary that one of the data is stored. Therefore, the physical sector table is stored in an electrically erasable and writable non-volatile memory (EEPROM), and the logical sector table is stored when the power supply is started.PhysicsIt is created from the sector table. This allows the logical sector table to use volatile memory. Similarly, since the table of the number of used sectors of each block can be created from the physical sector table, it is created in the volatile memory when the system is started. These tables can be developed on the main memory of the main system. Other tables include an erasure management table and a status table, but these cannot be created from the other tables, and the erasure management table is stored in the EEPROM because data should not be lost. The status table is obtained when writing or erasing is performed again, but it must be stored in an EEPROM because it is troublesome twice. However, it can also be stored in volatile memory to save memory. These tables can be stored in the same memory as a storage medium to reduce the number of chips. For example, since both the physical sector table and the erase count table should be stored in the non-volatile memory, they can be stored in the same EEPROM chip and the EEPROM can be reduced to only one chip. When the processor is a one-chip microcomputer, a relatively small table such as a sector number table is stored in a RAM core built in the one-chip microcomputer. FIG. 13 shows a configuration diagram of the fourth embodiment in which these are summarized. In the figure, 111 is a one-chip microcomputer having a built-in RAM and ROM, 112 is a RAM core in the one-chip microcomputer, 113 is a ROM core in the one-chip microcomputer, 114 is an EEPROM chip, 115 is an SRAM or a DRAM, Is the same as described above. The RAM core 112 stores a used sector number table, the ROM core 113 stores a microcomputer control program, the EEPROM 114 stores a physical sector table and an erase management table, and the RAM 115 stores a logical sector table. The free space of the RAM 115 is also used as an organizing data buffer for performing the organizing routine shown in FIG. 9 and a write buffer for speeding up writing. As described above, according to the present embodiment, the number of chips can be reduced by combining tables and buffers according to the characteristics of the storage medium. On the other hand, FIG. 24 shows an embodiment in which the EEPROM is omitted. This is realized by storing the non-volatile table data described in the fourth embodiment in the flash memory 1. In the figure, reference numeral 116 denotes a table storage area provided in the flash memory 1. However, since the flash memory is not suitable for updating small data such as table data, the table data is stored in the flash memory 1 immediately before the power is turned off. It shall be stored in the SRAM 115. That is, when the power supply of the system of the present invention is turned off, necessary data in the contents of the RAM 115 is transferred to the flash memory 1 and then the power supply is turned off. When the power supply is turned on next, the data is transferred from the flash memory 1 to the RAM 115. Start normal operation after loading. Therefore, it is necessary to always reserve a storage area 116 for storing tables in the flash memory. However, the storage position does not need to be fixed. If not fixed, an area indicating the address for storing the table is provided in advance, and the address at which the table is stored is always recorded, so that it is not necessary to search the position of the table when the power is turned on.
[0015]
Further, FIGS. 14, 15, 16 and 23 show examples of the configuration of the flash memory itself. FIG. 14 shows a flash memory chip in which a storage area for a table different from a data area is provided for each erase block, and the EEPROM can be omitted by writing a physical sector table and the number of erases for each block. In the figure, reference numeral 131 denotes an erase block, and 132 denotes a table storage area added for each erase block 131. The data stored in the table 132 corresponding to the erase block 131 can be accessed at the same address as that of the erase block 131, and the file data and the table data are sorted out by selecting the signal line or selecting the mode. In this way, the lifespan of the data area and the table area match, and the data area 131 can be used, but the table is not broken and becomes unusable. If the data area and the table area are close to each other, the tendency is further increased. Since a table is configured for each erase block, sharing of address lines is easily realized. An example of the table storage area 132 is shown in FIG. In the figure, reference numeral 133 denotes an entire erasure unit block, reference numeral 134 denotes a file data area in the block, and reference numeral 135 denotes an area for storing the logical number of the block, which has an 8-bit storage capacity. Reference numeral 136 denotes a status table indicating the state of the block, which has a capacity of 16 bits. The contents of the status table 136 include an erasure count management table, an unusable flag, a replaced flag, and a correction flag. The surplus bits in the status table 136 can be used for storing the block number. FIG. 23B shows an example of a table area 132 further provided with an error correction area. Reference numeral 137 denotes an area indicating an error correction area. In this case, the storage capacity is set according to the correction capability. For example, if a memory chip having a word configuration of 16 bits per word and an erasure block of 512 B has an error correction area of 8 bits, it has a 1-word correction capability. That is, by writing the word number where the defective bit exists and writing the correction data in another area, the data of the word is replaced at the time of reading. The correction data area may be provided in this table, or there may be a method in which the correction data area is stored in another storage area. In the former case, all data corrections can be performed in the table, but since a correction data area is provided for each block, a redundant area becomes large in the entire chip. In the latter case, means for indicating the area in which the correction data is written is required, and the access time increases because another storage area is accessed. Can be set. It is preferable to use the remaining bits of the status table area 136 to specify the area where the correction data is written. An example of the correction data area will be described with reference to FIG. FIG. 15 shows an EEPROM type storage area 138 which can be written and erased in small units such as 1 byte or 1 word separately from the data storage area. This area is used as a correction data table to write correction data. The data correction is realized by reading and replacing the data at the designated position when reading the data at the location to be corrected. In addition, FIG. 15 does not configure the configuration of the table area in the vicinity of the erase block of the corresponding data area. In this case, the components in the figure are the same as those in FIG. 14, and since the configuration of the memory cells is integrated in the chip, there is an effect that the configuration is simplified as compared with the configuration of the memory cell in FIG.
[0016]
FIG. 16 shows a flash memory chip having another configuration. In addition to the data storage area 141, a buffer area 142 for temporarily storing data is provided in a memory chip, and this part may be a volatile memory. An address counter 143 counts up in response to a clock input. At the time of write access, write data is written to the buffer area 142, and by inputting an address, a plurality of data can be transferred and written to the data area 141 at once. If such a memory is used, an external write buffer for speeding up writing can be omitted. Conversely, if a plurality of data can be transferred to the buffer area 142 at once by inputting an address from the data area 141 at the time of reading, read access is also simplified. In this case, the buffer does not need to input a continuous address as a serial access memory, and has an internal address counter 143. When a clock is input, the internal address counter counts up and can access a continuous area to output data. By doing so, the usability is further improved. It is most effective to configure the buffer area as one unit. If the buffer area is configured not only for one unit but for a plurality of units, the buffer effect can be improved. For example, when one sector is an erase block unit, if one buffer for storing data of one sector is provided, writing and reading of one sector are performed at one time. The write of data in the sector can be accepted, and read data can be prepared. The use of this buffer has an effect that the external arrangement buffer can be omitted.
[0017]
Next, an embodiment in which the storage device using a flash memory described in the above embodiments is applied to an information processing system will be described. FIG. 17 is a diagram illustrating an interface circuit for connecting a storage device using a flash memory (hereinafter, referred to as a flash file system) to an information processing system (hereinafter, referred to as a host). This is an I / O bus, and standard buses include buses such as ISA, EISA, Micro Channel, and SCSI. Reference numeral 202 denotes a bus buffer or a bus controller for converting a standard bus into a dedicated bus, but a system in which this is omitted may be considered. These are connected so that the host can store data that cannot be stored in a storage device such as a main storage device, an extended main storage device, or a display storage device in its own system, or data that the host wants to retain even after power-off. The external storage device or auxiliary storage device installed. A floppy disk drive 203, a hard disk drive 204, and the like are common, and a flash file system 205 is connected to the floppy disk drive 203 and the hard disk drive 204. It is not necessary for all of these auxiliary storage devices to be connected to the host system, and the user selects and connects them appropriately. An interface circuit 206 is added to the flash file system 205, 207 is an interface register group, 208 is a command register which is one of the registers in the interface register group, 209 is an address decode circuit of the interface register group, 210 is This is a command interrupt signal. The above-mentioned numbers are the same as those described in the above description. However, the program stored in the program memory 4 stores a program corresponding to a command centered on an access request from the host, in addition to the control and management of the file data described in the above description. The host issues a command to the auxiliary storage device through the host bus 201. This is performed by writing a command code in a command register 208 which is one of the interface register group 207 in the interface circuit 206. The interface register group 207 includes all the registers that the hard disk drive has as interface registers, and also has the same register specifications, so that there is no difference from accessing the hard disk from the host. It is also considered effective to match this register with the interface of another auxiliary storage device such as a floppy disk drive or an optical disk drive. Or, it supports multiple auxiliary storage interfaces at the same time, and it seems that the host uses another auxiliary storage device. However, it is very space-saving that one flash file system can actually be used. It is valid. When a command is written by the host, the command register 208 issues an interrupt signal 210 to the processor 3, and upon receiving the command, the processor 3 interprets the written command code and responds to the host command request. The interface register group 207 and the commands all correspond to the hard disk drive. However, since the storage medium is different, there are some unnecessary and different processing. For example, a format is indispensable for a magnetic disk drive, but is unnecessary for a semiconductor disk drive. Therefore, processing is not performed or simply rewritten to regular data. Hereinafter, the operation for reading and writing the file data is the same as that described in the above embodiments. Although the first embodiment is applied to the drawing, it is also possible to apply the first embodiment as it is or to another embodiment described later.
[0018]
FIG. 18 is a configuration diagram of an example of a personal computer using a flash file system as an auxiliary storage device. In the figure, 221 is a CPU of the information device, 222 is a coprocessor, 223 is a standard I / O bus constructed inside the information processing system of this embodiment, 224 is a bus unit that constructs a standard I / O bus 223, 225 Is a memory control unit for accessing a high-speed memory such as a main memory or an extended memory, 226 is a main memory, 227 is a BIOS ROM in which a basic control program is stored, and 228 is a keyboard controller to which a keyboard is connected. . Reference numeral 229 denotes a display adapter to which a display device is connected. Reference numeral 230 denotes an expansion memory, 231 a parallel port I / F for connecting a printer or the like, 232 a serial port I / F such as a mouse or RS232C, 233 a floppy disk drive, 234 a standard HDD I / O from a standard I / O bus 223. The buffer controller 235 for converting to F is a flash file system. The inside of the flash file system 235 is configured by the components shown in the embodiments described above. Reference numeral 236 denotes an I / F unit which receives a file access and transfers data, and an interface register group 207 shown in FIG. And address decode 209. A control unit 237 performs data management and control in the flash file system 235, and includes the processor 3, the program memory 4, the access controller 2, and the write buffer 9 in FIG. Reference numeral 238 denotes a flash memory array for storing file data, and 239 denotes an information table for storing data and information for memory management, and includes all of the tables 5, 6, 7, and 8 in FIG. Next, the operation will be described. When the power is turned on and the operation is started, first, the CPU 221 accesses the BIOS ROM 227 through the standard I / O bus 223 to perform initial diagnosis and initial setting. Then, the system program is loaded into the main memory 226 from the auxiliary storage device. In this embodiment, a flash file system 235 is employed as an auxiliary storage device. However, the CPU 221 operates as accessing the HDD to the HDD controller 234 through the standard I / O bus 223. Therefore, the flash file system 235 supports an I / F function completely compatible with the HDD by the internal I / F unit 236. When the loading of the system program ends, the processing proceeds according to the processing request of the user. The user proceeds with inputting and outputting the process using the KBDC 228 and the display adapter 229 on the standard I / O bus 223. Then, input / output devices connected to the parallel I / F 231 and the serial I / F 232 are utilized as needed. When the main memory capacity of the main memory 226 on the main body is insufficient, the main memory is supplemented by the extended RAM 230. When the user wants to read and write a file, the user requests access to the auxiliary storage device assuming that the HDD is the auxiliary storage device, and the flash file system 235 receives the request and accesses the file data. According to the present embodiment, a flash file system is employed as if a HDD, which is the most common auxiliary storage device, is mounted on a standard I / O bus of a standard personal computer. . Therefore, even if a flash file system is adopted as a new storage medium, a BIOS ROM or a system program having an HDD mounted thereon can be used as it is without any change. In the above embodiment, a standard personal computer is used as an example, and the main memory and the extended memory are provided on a standard I / O bus, and information of a configuration in which a coprocessor, a parallel I / F, and a serial I / F do not exist. The present invention is also applicable to these devices.
[0019]
Next, an embodiment for coping with the occurrence of a defect in the flash memory will be described with reference to FIG. Although it has already been stated that the number of rewrites in a flash memory is limited in principle, as deterioration due to rewrite progresses, the time required for erasing and writing data increases, and there is a problem in data retention reliability. Therefore, when it is determined that a state that should not be used is reached due to deterioration of the memory, the use of the storage area or the memory chip should be stopped. Then, when it is determined that such an area increases and the life of the entire flash file system is approaching, the use of the flash file system should be stopped. As a method of detecting the deterioration of the flash memory, a method of judging from an erasing failure that the erasing is not completed within a specified number of times even if the erasing is repeated or the erasing time takes a certain time or more. A method of judging from a writing failure that writing is not completed within a specified number of times even if writing is repeatedly performed. In addition, a method is conceivable in which the number of erasures is managed and a judgment is made based on the fact that the number of erasures reaches a prescribed number or more. When the storage capacity that has deteriorated and becomes unusable reaches a certain specified value, it is determined that the life of the flash file system has expired. FIG. 19 shows an embodiment for realizing a means for alerting the user. In FIG. 19, reference numeral 240 denotes a controller in the flash file system 235 for recognizing the usage limit of the own system and transmitting this to the host system. An interrupt signal 241 is an error report register indicating that the usage limit has been reached. When the host receives the interrupt signal 240 through the HDD buffer 234, the host accesses the register 241 in the flash file system to grasp the situation, and reports to the user as appropriate. FIG. 20 is a flowchart showing software for realizing this operation. (1) is a flowchart of a check routine in the flash file system, and (2) is a flowchart of a warning program for a user in the host system. . The operation will be described while also explaining the drawings. The controller of the flash file system jumps to this routine when a storage area that is considered to have reached the usage limit is detected. Then, the capacity of the storage area at the usage limit is added (a). When a certain limit value is reached (b), a value indicating that the use limit has been reached is written as an error content in an error report register in the own system (c). Then, an interrupt signal to the host is output (d), and this routine ends. The added value of the capacity (a) needs to be stored in the flash memory or another memory. Also, the limit value of the remaining capacity in (b) is set appropriately according to the system. When the host system receives the interrupt signal of (d), the process is interrupted at a good break and the routine shown in the flowchart of (2) is entered. First, the error report register in the flash file system is accessed to receive the interrupt. The reason is determined (e), and if this is a use stop request due to the use limit of the flash file system being reached (f), access to the flash file system thereafter is prohibited (g), and the user is warned (h). ). As a warning method, a method of visually appealing such as using a display device of an information device or attaching a warning indicator, and a method of auditory appealing such as emitting a warning sound can be considered. If only write access is prohibited and read access is permitted, file data can be backed up. According to this embodiment, the user can be notified immediately when the flash file system reaches the usage limit, and the reliability of data can be increased. As another embodiment, the routine shown in FIG. 20 (2) is executed on the assumption that the host system reads the error report register every time access is made without providing the interrupt signal 240 in FIG. According to the present embodiment, the usage limit can be reported by replacing the HDD without changing the hardware configuration of the host system at all. In another embodiment, the maintenance program is periodically executed by the host system, and at that time, the error report register 241 is read to check whether the usage limit has been reached, thereby recognizing the usage limit. According to the present embodiment, there is no need to change the BIOS program or system program of the host system at all.
[0020]
Next, an embodiment corresponding to the processing at the time of power shutdown will be described. The flash file system of the present invention is basically an auxiliary storage device, and is generally configured to be supplied with power from a host system. However, since the operation is asynchronous with the host, the flash file system may operate even when the host is not operating. However, if the user handling the host does not recognize it, the power of the host may be turned off, and the power supply to the operating flash file system may be stopped. An embodiment of the invention corresponding to this is shown in FIG. FIG. 21 is a diagram of a system in which backup power is supplied by a battery so that the flash file system can continue to operate even after power supply from the host is stopped. In the figure, reference numeral 251 denotes a host computer such as a personal computer. An information device, 252 is a flash file system, 253 is a backup battery, and 254 is a backflow cutoff circuit for preventing the power of the battery 253 from flowing back to the host 251 when the power of the host 251 is cut off. Reference numeral 255 denotes a detection circuit for detecting that power supply from the host 251 has been cut off, reference numeral 256 denotes a detection signal as an output thereof, reference numeral 257 denotes a shutoff circuit for shutting off the power supply of the battery 253 to the flash file system 252, and reference numeral 258 denotes a flash. This is a cutoff signal for operating the cutoff circuit 257 because the file system 252 has completed the processing that was being performed and no longer requires power supply. While the power is supplied from the host 251, the flash file system is driven by the power of the host 251. This allows trickle charging of the battery 253 by properly adjusting the output voltage of the battery 253 and the supply voltage of the host 251. However, when the battery 253 is not a secondary battery, it is necessary to add a diode for preventing inflow. Then, when the power of the host 251 is turned off and the power supply to the flash file system 252 is stopped, the power is supplied from the battery 253 and the flash file can continue to operate. Then, when the power shutdown detection circuit 255 detects the power shutdown, the flash file system recognizes the power shutdown based on the detection signal 256, completes the operation under processing, and then performs the power shutdown process. In the power cutoff process, the battery cutoff circuit 257 is finally cut off by the cutoff signal 258, and the operation of the flash file system ends. Note that the backflow cutoff circuit 254 may employ a method using a backflow prevention diode. According to the present embodiment, the host 251 is completely separated from the flash file system in terms of signals, so that only the data is exchanged in response to the access request from the host, and the operation stop of the host can be closed within the host. In other words, the host does not need to make any hardware changes due to the connection of the flash file system.
[0021]
FIG. 22 shows another embodiment corresponding to the power-off of the host. However, in the example of FIG. 22, the system is actually a system that continues to supply power from the host. In the figure, reference numeral 258 denotes a power supply line supplied from the host 251 to the flash file system 252, and reference numeral 259 denotes a power supply busy signal indicating that the flash file system 252 is in operation and needs power supply. Even if the power switch is turned off, the power supply circuit of the host 251 does not stop the power supply while the power busy signal 259 is active, and all the processes of the flash file system are completed and the power busy signal 259 becomes inactive. Then stop the power supply. That is, for the user, even if the power switch of the host information device is turned off and the power is turned off, the user does not actually cut off the operation but waits for the end of the operation of the flash file system 252. According to this embodiment, since the host recognizes the end of the operation of the flash file system and controls the power supply, there is no need for a backup power supply and the like, and there is an effect that the configuration of the power supply circuit of the flash file system is simplified.
[0022]
Next, a fifth embodiment of the present invention will be described. FIG. 25 shows a hardware configuration for realizing the present invention, FIG. 26 shows a storage configuration in a flash memory of the present invention, and FIG. 27 is a flowchart for writing data. 26 will be described for convenience. In the figure, reference numeral 311 denotes a storage area in units of 512 bytes (4 kilobits), which is a sector in which data is actually written, and is called a physical sector. On the other hand, the storage data supply side manages data using virtual sectors called logical sectors. All physical sectors 311 and logical sectors are assigned numbers having no correlation. An erasing block 312 is a unit for erasing data all at once, and its capacity differs depending on the memory. For example, if the erase block unit is 16 kilobytes, 32 physical sectors are one block. Reference numeral 313 denotes a memory chip, which is divided into 32 blocks of 1024 sectors in the case of a chip of 16 megabytes and a 4 megabit chip. Those that can be erased only on a chip basis are one chip and one block, and those that can be erased for each physical sector have the same number of blocks and the same number of physical sectors. The flash memory can perform random write access to an erased block within the block. However, once writing is performed, writing cannot be performed unless the next erasure is performed. Therefore, in a memory having a plurality of sectors as one block, all the sectors must be written and then erased. In the following description, it is assumed that the flash memory is a 4-megabit chip and the erase block is 16 kilobytes (128 kilobits). FIG. 26 shows the memory of the very configuration. FIG. 25 shows a hardware configuration in which the memory chip 313 is used. In FIG. 25, reference numeral 301 denotes a flash memory as a storage area for write data, 302 denotes an access controller for accessing the flash memory 301, and 303 denotes storage data and status data. An operating processor 304 is a logical sector table in which a physical sector number is recorded in order to refer to which physical sector of the flash memory 301 the data of the stored logical sector number is stored in. A physical sector table for referencing the logical sector number stored in the physical sector 311 of 301, a block table 306 for storing the status of each block, and whether the block is usable or what Sector is written Or, and the like are recorded. Reference numeral 307 denotes a write buffer for temporarily storing write data and quickly returning the bus right to the data supply side because the write speed of the flash memory is much slower than that of reading. Reference numeral 308 denotes an organizing data buffer for temporarily storing organizing data in an organizing routine described later. FIG. 27 is a flowchart for explaining the operation of the processor 303 of FIG. 25 for performing writing in the configuration of FIG. The operation will be described below according to this flowchart. The storage of the data to be written is performed in units of one sector = 512 bytes. That is, data less than 512 bytes is also stored in the 512-byte storage area. A number is assigned to the data in units of one sector, and this is defined as a logical sector number. It is assumed that the data supply side only needs to be aware of this logical sector number. Assuming that the data supply side requests writing of one sector, this data is given a certain logical sector number, and this data is handled with the previous logical sector number even if rewriting occurs. On the other hand, the data storage side determines the storage location of this data. The storage location is the first unwritten sector of the block pointed to by the write pointer. That is, it is the sector next to the physical sector in which the previous write was performed. For example, in FIG. 26, when the previous write is written to the third physical sector of the first block, the next write is performed to the fourth physical sector of the first block. At this time, the processor 303 determines the storage location of the data by accessing the block table. This operation is (a) in the flowchart. In (b), when there is no problem in writing, the data is written by incrementing the number of write sectors of the block. Actual write access control is performed by the access controller 302. After the writing, the written sector numbers are recorded in the physical sector table and the logical sector table, respectively. When rewriting a previously written logical sector, the previously written logical sector number is erased from the physical sector table. This is an operation for indicating that the data of the physical sector is invalid. The arrangement routine (c) is an operation routine when the block pointed to by the write pointer has already been written in all the sectors and cannot be written. This will be described with reference to the flowchart of FIG. (D) is an operation for stopping writing to that block and writing to the next block, since writing is not possible if the block is broken or if the routine has been entered. On the other hand, at the time of read access, the logical sector table in which the necessary data is stored is referred to, the physical sector number is determined, and the necessary data is read. Next, the rearranging routine will be described. The reason for the necessity of the rearrangement routine is that in the above-described writing method, data is written to another physical sector in rewriting data of the same file. That is, the data written before rewriting becomes unnecessary, but remains stored in the memory and is data to be erased. However, erasing the flash memory every time it becomes unnecessary shortens the life of the flash memory having a finite number of erasures. Therefore, the data is deleted by the rearranging routine. The pruning routine is performed when a block is full of write data. A specific method of organizing is performed according to the flowchart of FIG. Hereinafter, each part in the flowchart will be described. (A) All data in the block to be arranged is once saved in the arranged data buffer 308 in FIG. (B) When the data is saved and erasable, the block is erased. (C) Referring to the physical sector table of each sector in the organizing data buffer, it is determined whether data is necessary or unnecessary. (D) If necessary data is written into the block again. The above is the description of the operation of the embodiment of the present invention. According to this embodiment, the erasure of each erase block of the flash memory is performed sequentially without concentrating on a part, so that an effect of extending the life can be expected. In addition, there is an effect of compensating for the disadvantage that the writing speed of the flash memory is slow in writing. In addition, since unnecessary data is efficiently erased, there is an effect that the storage capacity of the semiconductor disk can be always maintained.
[0023]
Next, another embodiment will be described. FIG. 29 shows an example of the configuration of an apparatus for judging deterioration of a flash memory. In the figure, reference numeral 401 denotes a flash memory cell; 402, an erase time measurement timer for measuring the time from the start to end of erase control; An erasure control circuit for performing control for erasing data written in the cell 401, a deterioration management table 404 for storing the deterioration of the flash memory cell 401, a controller 405 for controlling the flash memory cell 401, and a management 406 for deterioration An activation signal for simultaneously activating the erasure time measurement timer 402 when the controller 405 causes the erasure control circuit 403 to start erasure, an end signal 407 for the erasure control circuit 403 notifying the erasure time measurement timer 402 of the end of the erasure process, Reference numeral 408 denotes measurement data measured by the erase time measurement timer. FIG. 30 is a flowchart for explaining the operation of the controller 405 in FIG. 29, and the determination of the deterioration of the flash memory is performed according to this flowchart. Next, the operation will be described with reference to FIGS. First, when an erasing operation is required for a certain memory cell 401 from control of the entire system, the controller 405 receives an erasing request (FIG. 30A). Then, the controller 405 instructs the erase control circuit 403 to start an erase operation and an erase operation (FIG. 30B). Upon receiving this, the erase control circuit 403 starts the erase operation of the corresponding memory cell 401 (FIG. 30c). At the same time, the controller 405 starts the erase time measurement timer 402 (FIG. 30D). The controller 405 waits until the erasure is completed, and when the memory control circuit 403 completes the erasure of the memory cell 401, it informs the controller 405 of the completion (FIG. 30e). The controller 405 refers to the erasure time measurement timer 402, recognizes the time spent for erasure, determines the degree of deterioration, and assigns a number corresponding to the degree to the storage area. For example, the degree of deterioration is divided into eight stages. If the erasing time is the same as the unused state, "0" is set. If the deterioration is advanced and the unusable state is "7", the steps between "1" and "6" are performed. Number. Then, the number assigned to the storage area is stored in the deterioration degree management table 404 (FIG. 30f). By setting the degree of deterioration to eight levels, one storage area is allocated to one byte and management becomes easy. Each storage area is handled based on this deterioration degree management table. In each of the areas where the degree of deterioration has advanced by one, the data of the area with a small degree of deterioration is transferred each time to stop the progress of the deterioration, and the deterioration of all the storage areas is averaged. The use of the area where the deterioration has reached the final stage is prohibited. This is a process performed by a controller that controls the entire storage system. FIG. 31 shows the operation flow of the controller of this storage system. 29 will be described in order. If the host system issues a write access request to the storage system and the controller of the storage system determines that an erasing operation is required when writing data (FIG. 31A), the controller 405 in FIG. A request for erasure and deterioration management is issued (FIG. 31b). When the erasing operation is completed, the deterioration degree of the erased storage area is referred to in the deterioration degree management table 404 of FIG. 29 (FIG. 31B). If the deterioration has progressed, the deterioration has not progressed the most and the replacement is performed. An area that has not yet been searched is found (FIG. 31c), and data is transferred and replaced (FIG. 31d). It is more efficient to use the replacement flag described in the first embodiment to determine that the deterioration has not progressed the most and the replacement has not been performed yet. This is because an area that has been subjected to the above-described replacement processing should not be used for replacement of deterioration averaging because stored data is not data that does not progress deterioration (data that is unlikely to be rewritten). Stand up and specify. In this embodiment, the control of the entire storage system and the control of the device for judging deterioration are separated, and the controller is different. However, the controller 405 may be shared with the controller of the storage system. Although the erase time measurement timer 402 is also configured as hardware, the erase time measurement may be performed by software control by a controller. This is what you need to do if you want to reduce the number of components in your storage system. According to this embodiment, the table for deterioration management can be changed to the erasure management table used in the previous embodiments, and the storage area used can be drastically saved. In addition, since the erasing time is a more direct criterion for determining the deterioration of the memory than the number of times of erasing, it is possible to more accurately grasp the degree of deterioration and average the deterioration.
[0024]
Next, another embodiment of the management of the number of erasures using the embodiment of FIG. 24 will be described with reference to FIG. In the method of managing the number of erasures in the embodiments described above, the number of erasures is counted up one by one when erasure is performed, and the number of erasures is grasped in detail. Truncates the bits. In the embodiment of FIG. 24, in the normal use state, the number of erasures is stored up to the least significant bit in a volatile memory such as an SRAM or a DRAM, and is transferred to the flash memory when the power is turned off. Is truncated by one or more bits (FIG. 32a). Alternatively, the data is transferred with carry (FIG. 32B). For the lower bits to be discarded, the optimum value should be considered based on the limit value of the number of times of erasure of the flash memory as long as the recognition of the deterioration by grasping the number of erasures does not lose accuracy. It is assumed that the maximum value of the number of times does not exceed 1% of the guaranteed value of the number of times of erasing the flash memory. That is, if the guaranteed value of the number of times of erasure is 10,000 times, 6 bits (maximum value 63) not exceeding 100 times are set as the cutoff limit. According to this embodiment, the number of erasures is not accurately grasped. However, since the error is set to 1% or less of the guaranteed value of the number of erasures of the flash memory, the accuracy of the guaranteed value originally has a range of about one digit. This is not an essential problem if it is to judge whether or not the data has a strong tendency to occur. As a result, the effect of reducing the capacity of the flash memory used for managing the number of erasures is great.
[0025]
Next, another embodiment for reducing the table area will be described. FIG. 33 is a configuration diagram of a storage system in which the physical sector table and the logical sector table described in the above embodiments are omitted. However, an address conversion table 411 is provided instead of these. For the other numbers already described, the address conversion table 411 does not perform the conversion for the address input of the storage area in which the data replacement for averaging the deterioration degree is not performed, but uses the address input of the storage area in which the data replacement is performed. On the other hand, it is a table for outputting the replacement destination address. Therefore, there is no need for a physical sector table or a logical sector table. Basically, an address requested by the system to access is accessed as it is in accordance with a physical address on the memory, and the deterioration of the area proceeds, and the degree of deterioration increases. After the data is exchanged for averaging, the address is converted. The first embodiment can be applied only when the storage unit (sector) of the file data and the erasure unit match as in the first embodiment. The capacity of the address conversion table depends on the capacity of the area that can be converted. That is, if the capacity of the address conversion table is reduced, the storage capacity for performing the conversion is reduced, and if a large area is secured, addresses in many areas can be converted. This is a factor directly related to the life of the system. Although FIG. 33 is a modification of the first embodiment, the present invention can also be applied to an embodiment having the deterioration management table described with reference to FIG. According to the present embodiment, there is an effect that data management is simplified and a table area can be largely reduced.
[0026]
Next, an embodiment in which an indicator indicating the operation is provided will be described. FIG. 34 is a diagram showing an example of an internal configuration showing the present embodiment. The numbers already shown are the same as those in FIG. 17 based on FIG. In addition, reference numeral 421 in the figure denotes an output port signal of the processor 3 indicating that data is being transferred from the write buffer 9 to the flash memory 1, and reference numeral 422 denotes an indicator for emitting light indicating that the transfer is being performed by the output port signal 421. Light emitting diodes are suitable as indicators. FIG. 35 is an external view of this embodiment, in which (1) is an overall view of a card shape, and (2) is a diagram showing an example in use. In the figure, 423 is an IC card as an auxiliary storage device of the present invention, 424 is a connector, 425 is a light emitting diode, and 426 is a host personal computer. In FIG. 34, when the host personal computer issues a write access processing request to the auxiliary storage device 205 via the standard IO bus 201, the processor 3 performs processing to store the write data in the write buffer 9. Upon completion of this, a signal indicating completion of writing is output to the standard bus 201. Thereafter, the processor 3 transfers and stores the data stored in the write buffer 9 to the flash memory 1. While performing this process, the processor 3 activates the output port signal 421 to cause the indicator 422 to emit light. Then, when the transfer from the write buffer 9 to the flash memory 1 is completed, the processor 3 makes the output port 421 inactive and stops the light emission of the indicator 425. FIG. 35 (1) shows an example in which the present invention is applied in the form of an IC card. An indicator 425 is attached to the side opposite to the connector so that the lighting of the indicator 425 can be confirmed when the indicator 425 is attached to the personal computer. (2) shows a state in which the indicator 425 is actually inserted into the notebook computer, and the user can work while checking whether the indicator 425 is on or off. However, the user only needs to confirm the lighting when the power is turned off. According to this embodiment, there is an effect that the circuit configuration is relatively simple, the visibility of the indicator is good, and erroneous operation of the user can be prevented.
[0027]
【The invention's effect】
According to the present inventionEven if the power supply is stopped, information for referring to the logical sector number of the data mapped to the physical sector is not lost, and therefore, the data in the flash memory is unidentified meaningless data. To becomeCan be prevented.
[Brief description of the drawings]
FIG. 1 is a hardware configuration diagram of a first embodiment of the present invention.
FIG. 2 is a storage configuration diagram of a flash memory chip according to a first embodiment of the present invention.
FIG. 3 is a flowchart of a main routine showing an operation of the first embodiment of the present invention.
FIG. 4 is a flowchart of an erase management routine showing an erase management operation according to the first embodiment of the present invention;
FIG. 5 is a hardware configuration diagram of a second embodiment of the present invention.
FIG. 6 is a storage configuration diagram of a flash memory chip according to a second embodiment of the present invention.
FIG. 7 is a flowchart of a main routine showing the operation of the second embodiment of the present invention.
FIG. 8 is a flowchart of a rearranging routine showing a sector rearranging operation according to a second embodiment of the present invention;
FIG. 9 is a flowchart of an erase management routine showing an erase management operation according to a second embodiment of the present invention.
FIG. 10 is a hardware configuration diagram of a third embodiment of the present invention.
FIG. 11 is a storage configuration diagram of a flash memory chip according to a third embodiment of the present invention.
FIG. 12 is a flowchart of an erase management routine showing an erase management operation according to a third embodiment of the present invention.
FIG. 13 is a hardware configuration diagram of a fourth invention according to the present invention.
FIG. 14 is a configuration diagram of a flash memory chip having a table for each erase block.
FIG. 15 is a configuration diagram of a flash memory chip having an area for storing information separately from a data area;
FIG. 16 is a configuration diagram of a flash memory chip having a buffer area separately from a data area.
FIG. 17 is a hardware configuration diagram of an interface portion of a flash file system according to a fourth embodiment of the present invention.
FIG. 18 is a configuration diagram of an information device using a flash file system according to a fourth embodiment of the present invention as an auxiliary storage device.
FIG. 19 is a configuration diagram of an embodiment for reporting a usage limit in the present invention.
FIG. 20 is a flowchart of an embodiment for reporting usage limits in the present invention.
FIG. 21 is a configuration diagram of an embodiment including a backup battery according to the present invention.
FIG. 22 is a configuration diagram of an embodiment having a power control signal according to the present invention.
FIG. 23 shows an embodiment of data storage in a flash memory having an information storage area separately from a data area.
24 is a configuration diagram of an embodiment in which the EEPROM is omitted from FIG.
FIG. 25 is a hardware configuration diagram of a fifth embodiment of the present invention.
FIG. 26 is a storage configuration diagram of a flash memory chip according to a fifth embodiment of the present invention.
FIG. 27 is a flowchart of a main routine showing the operation of the fifth embodiment of the present invention.
FIG. 28 is a flowchart of an organizing routine showing a sector organizing operation according to a fifth embodiment of the present invention.
FIG. 29 is a configuration diagram of an embodiment for extending the life of the system by managing deterioration over time.
FIG. 30 is an operation flow of the deterioration management controller in the embodiment of FIG. 29;
FIG. 31 is an operation flow of the storage system controller in the embodiment of FIG. 29;
FIG. 32 is an explanatory diagram of an embodiment for reducing the storage capacity of the erasure management table.
FIG. 33 is a configuration diagram of an embodiment that employs an address conversion table to reduce the storage capacity of the sector management table.
FIG. 34 is a configuration diagram of an embodiment in which an indicator indicating that the auxiliary storage device is operating is provided.
FIG. 35 is an external view of an embodiment in which an indicator indicating that the auxiliary storage device is operating is provided.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Flash memory, 3 ... Processor, 5 ... Logical sector table, 6 ... Physical sector table, 7 ... Erase count management table, 8 ... Status table, 9 ... Write buffer, 13 ... Erase block, 49 ... Write sector number table, 51: Organizing buffer, 52: Physical sector, 111: One-chip microcomputer, 112: RAM core, 113: ROM core, 114: EEPROM, 115: DRAM or SRAM, 116: Table area, 132: Table storage area, 142: Buffer Area 143 address counter 207 I / F register group 227 BIOSROM 236 I / F unit 241 error report register 253 backup battery 259 power busy signal 402 erase time measurement timer 404: Deterioration degree management Buru, 411 ... address conversion table, 421 ... output port signal 422 ... indicator, 425 ... indicator exterior.

Claims (11)

A storage device,
A flash memory including a plurality of physical sectors;
Volatile memory;
A control unit for accessing the flash memory in response to an access request from an external host system,
The flash memory stores information for referring to a logical sector number of data mapped to the physical sector,
The control unit uses the information for referencing the logical sector number of the data mapped to the physical sector stored in the flash memory at the time of system startup, and stores the data of the logical sector number in the flash memory. Create information in the volatile memory to refer to which physical sector of the memory is stored in the volatile memory,
The control unit, in response to the access request, using information for referring to which physical sector of the flash memory the data of the logical sector number created in the volatile memory is described A storage device for determining a physical sector of the flash memory corresponding to a logical sector number designated by the host system, and accessing the determined physical sector of the flash memory. The flash memory includes a plurality of erase blocks that are electrically erasable units,
2. The storage device according to claim 1, wherein each erase block includes a plurality of physical sectors. The storage device according to claim 1, wherein the control unit includes a RAM core as the volatile memory. When the host system issues a write request to the same logical sector number as the logical sector number of the past write request, the controller writes the logical sector number data created in the volatile memory to the flash memory. Using information for referring to which physical sector is described in a memory, data accompanying a write request from the host system is written to another physical sector different from a past physical sector. 3. The storage device according to any one of 3. A storage device,
A flash memory including a plurality of physical sectors;
Volatile memory;
A control unit for accessing the flash memory in response to an access request from an external host system,
The flash memory stores information for referring to a logical sector number of data mapped to the physical sector,
When the power supply is started, the control unit uses the information for referencing the logical sector number of the data mapped to the physical sector stored in the flash memory, and the data of the logical sector number is used. Creating information in the volatile memory to refer to which physical sector of the flash memory is stored,
The control unit responds to the access request by using information for referring to which physical sector of the flash memory the data of the logical sector number created in the volatile memory is described. A physical sector of the flash memory storing data of a logical sector number designated by the host system, and accessing the physical sector of the flash memory determined. The flash memory includes a plurality of erase blocks that are electrically erasable units,
The storage device according to claim 5, wherein each erase block includes a plurality of physical sectors. The storage device according to claim 5, wherein the control unit includes a RAM core as the volatile memory. When the host system issues a write request to the same logical sector number as the logical sector number of the past write request, the controller writes the logical sector number data created in the volatile memory to the flash memory. Using information for referring to which physical sector of the memory is described, write data accompanying a write request from the host system to another physical sector different from the past physical sector. 8. The storage device according to any one of 7. A storage device,
A flash memory including a plurality of erase blocks, which are electrically erasable units;
Volatile memory;
A control unit for accessing the flash memory in response to an access request from an external host system,
Each erase block of the flash memory includes a plurality of physical sectors,
The plurality of physical sectors in each of the erase blocks refer to a first area for storing data from the host system and a logical sector number of data mapped to a physical sector in the first area. Divided into a second area for storing information of
The control unit uses information for referring to a logical sector number of data mapped to the physical sector stored in the second area of each erase block of the flash memory when power supply is started. Creating, in the volatile memory, information for referencing in which physical sector of the flash memory the data of the logical sector number is stored;
The control unit responds to the access request by using information for referring to which physical sector of the flash memory the data of the logical sector number created in the volatile memory is described. A physical sector of the flash memory storing data of a logical sector number designated by the host system, and accessing the physical sector of the flash memory determined. The storage device according to claim 9, wherein the control unit includes a RAM core as the volatile memory. When the host system issues a write request to the same logical sector number as the logical sector number of the past write request, the controller writes the logical sector number data created in the volatile memory to the flash memory. 10. The data according to a write request from the host system is written in another physical sector different from the past physical sector using information for referring to which physical sector in the memory is described. The storage device according to claim 10.

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