JP3812119B2 - Pulse power supply - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a pulse power supply device including a pulse forming circuit network, which is used for driving a pulse klystron for supplying pulse power to, for example, a linear accelerator or a pulse laser. The present invention relates to means for achieving both rise and fall times and flatness.
[0002]
[Prior art]
FIG. 2 is a circuit diagram showing an example in which a conventional pulse power supply device is used for driving a pulse klystron, and FIG. 3 is an equivalent circuit diagram around the pulse power supply device of the circuit of FIG.
[0003]
The pulse power supply device 1 includes a pulse forming network (PFN) 4 formed by connecting a plurality of reactors (usually variable reactors as in this example) 6 and a plurality of capacitors 8 in a ladder shape (ladder shape), An output switch 10 connected in series to a first-stage reactor 6 (this is particularly indicated by reference numeral 6a) counted from the output side of the pulse-forming network 4, and a pulse connected to the final stage of the pulse-forming network And a DC charging power source 2 for charging the forming circuit network 4 (more specifically, each of the capacitors 8). The output switch 10 is composed of a thyratron in this example, but is not limited thereto.
[0004]
In this example, a pulse transformer 14 is connected between the output side of the output switch 10 (specifically, the cathode of the thyratron) and the ground potential side of the first stage capacitor 8 (specifically indicated by reference numeral 8a). The pulse transformer 14 is connected to a pulse klystron (pulse-type klystron) 16 for amplifying high-frequency power, and the pulse power P from the pulse klystron 16 is supplied to the linear accelerator 20. In this example, the pulse transformer 14, the pulse klystron 16, and the linear accelerator 20 constitute the load 24 shown in FIG. A line inductance 22 including a leakage inductance of the pulse transformer 14 inevitably exists between the load 24 and the output switch 10. The clipper circuit 12 is for protecting devices such as the capacitor 8 at the time of breakdown of the pulse klystron 16 and does not affect the essence of the present invention.
[0005]
When the output switch 10 is turned on while the pulse power generation circuit 4 is charged with the charging power source 2, the electric charges are discharged from the capacitors 8, and a pulse having a predetermined waveform is output from the pulse formation circuit network 4. Then, it is supplied to the pulse klystron 16 via the pulse transformer 14 and amplified there, and supplied to the linear accelerator 20 as pulse power P. The output pulse output from the pulse power supply device 1 has a trapezoidal waveform close to a square pulse, the pulse width is, for example, about several μs to several ms, and the peak value is, for example, about several tens kV to several hundreds kV. It is.
[0006]
[Problems to be solved by the invention]
When the pulse power supply device 1 and the pulse klystron 16 as described above are used for driving a linear accelerator, for example, in order to obtain uniform acceleration of a charged particle beam (for example, electron beam or ion beam) in the linear accelerator, pulse power It is necessary to improve the flatness of the flat portion of the output pulse of P, that is, the output pulse output from the pulse power supply device 1 and applied to the pulse klystron 16.
[0007]
On the other hand, it is necessary to increase the efficiency of the pulse klystron 16 by increasing the rise and fall of the output pulse applied to the pulse klystron 16 from the pulse power supply device 1 and taking a long flat portion.
[0008]
The rise and fall of the output pulse from the pulse power supply device 1 is performed by the inductance L ₁ of the first reactor 6 a of the pulse forming circuit network 4, the capacitance C ₁ of the first capacitor 8 a, and the inductance L _{0 of the} line inductance 22. It is determined by the time constant specified in. More specifically, it is almost determined by 2√ {(L ₀ + L ₁ ) · C ₁ }. Therefore, the smaller the inductance (L ₀ + L ₁ ), the faster the output pulse rises and falls.
[0009]
On the other hand, the flatness of the output pulse becomes better as the inductance (L ₀ + L ₁ ) is larger because the ripple is sufficiently suppressed by the inductance.
[0010]
Thus, the rise and fall times of the output pulse and the flatness are in a contradictory relationship, and conventionally it has been difficult to achieve both.
[0011]
SUMMARY OF THE INVENTION Accordingly, it is a primary object of the present invention to provide a pulse power supply device capable of improving the flatness of output pulses and shortening the rise and fall times.
[0012]
[Means for Solving the Problems]
In the pulse power supply device of the present invention, a bypass circuit formed by serially connecting a bypass capacitor having a smaller capacity than a capacitor of the first stage constituting the pulse forming circuit network and a resistor for suppressing resonance is connected in parallel with the reactor of the first stage. It is characterized by that.
[0013]
According to the above configuration, most of the output current flows through the bypass circuit when the output pulse rises and falls, and most of the output current flows through the first stage reactor of the pulse forming circuit network except during the rise and fall. Accordingly, the rise and fall times of the output pulse are almost independent of the inductance of the first stage reactor of the pulse forming network. Moreover, since the capacitance of the bypass capacitor constituting the bypass circuit is smaller than the capacitance of the capacitor in the first stage of the pulse forming circuit network, the rise and fall times of the output pulse are It hardly depends on the capacitance of the first stage capacitor. Therefore, as the factors defining the rise and fall times of the output pulse, the capacitance C _B of the bypass capacitor and the inductance value L ₀ of the line inductance on the output side are dominant, and the rise and rise of the output pulse are dominant. The down time is determined approximately by 2√ (L ₀ · C _B ).
[0014]
As a result, it is possible to improve the flatness of the output pulse by increasing the inductance of the reactor in the first stage of the pulse forming network, and even so, the rise and fall times of the output pulse are shortened for the above reasons. It becomes possible to maintain.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is an equivalent circuit diagram showing an example of a pulse power supply device according to the present invention. Portions that are the same as or correspond to those in the conventional example of FIG. 3 are denoted by the same reference numerals, and differences from the conventional example will be mainly described below.
[0016]
In the pulse power supply device 1a of this embodiment, a bypass capacitor 26 having a smaller capacity than the first stage capacitor 8a constituting the pulse forming circuit network 4 is disposed in parallel with the first stage reactor 6a constituting the pulse forming circuit network 4 described above. And a bypass circuit 30 in which a resonance suppression resistor 28 is connected in series.
[0017]
If the bypass capacitor 26 has a smaller capacity, if it is contrary to this, it takes a long time to charge and discharge the bypass capacitor 26 at the rise and fall of the output pulse, and the rise and fall of the output pulse is slow. Because it becomes. The capacitance C _B of the bypass capacitor 26 is preferably sufficiently smaller than the capacitance C ₁ of the capacitor 8a in the first stage of the pulse forming circuit network. For example, the capacitance C _B of the bypass capacitor 26 is preferably about 1/5 to 1/20 of the capacitance C ₁ of the first-stage capacitor 8a, and more preferably around 1/10.
[0018]
The resonance suppression resistor 28 may have a resistance value small enough to suppress the series resonance (parasitic vibration) that occurs in the bypass capacitor 26 and the line inductance 22 at the transition of the rising and falling edges of the output pulse. For example, the resistance value of the resonance suppression resistor 28 may be about several tens Ω to several hundreds Ω.
[0019]
In this pulse power supply device 1a, most of the output current flows through the bypass circuit 30 at the transition of the rising and falling of the output pulse, and most of the output current is at the first stage of the pulse forming circuit network 4 except at the rising and falling. It flows through the reactor 6a. Qualitatively speaking, when the output pulse rises, the electric charge from the capacitor 8a at the first stage of the pulse forming network 4 first flows so as to charge the bypass capacitor 26, and after charging the bypass capacitor 26, the capacitor 8a is charged. This is because the electric charge from the air flows through the reactor 6a. Speaking quantitatively, since the frequency (angular frequency) ω is extremely high during the transition of the rising and falling edges of the output pulse, the impedance of the bypass circuit 30 (≈≈the impedance (= ωL ₁ ) of the reactor 6a). 1 / ωC _{B. Since} the resistance value of the resonance suppression resistor 28 is small as described above, it is much smaller.) Since the frequency ω is very small except at the time of rising and falling, the above-mentioned On the contrary, the impedance of the reactor 6 a is much smaller than the impedance of the bypass circuit 30. Accordingly, the rise and fall times of the output pulse hardly depend on the inductance L _{1 of the} reactor 6a.
[0020]
Moreover, since the capacitance C _B of the bypass capacitor 26 is made smaller than the capacitance C ₁ of the capacitor 8a in the first stage of the pulse forming circuit network 4 as described above, the rise time and fall time of the output pulse are The capacitance C ₁ of the capacitor 8a in the first stage of the pulse forming circuit network 4 is almost independent. This is because the combined capacitance of the series circuit of the capacitor 8a and the bypass capacitor 26 formed at the rise and fall of the output pulse is almost dominated by the smaller capacitance C _B.
[0021]
Therefore, as the elements that define the rise and fall times of the output pulse, the capacitance C _B of the bypass capacitor 26 and the inductance value L ₀ of the line inductance 22 on the output side are dominant, and the rise and fall of the output pulse The fall time is determined by approximately 2√ (L ₀ · C _B ).
[0022]
As a result, it is possible to increase the inductance L ₁ of the reactor 6a in the first stage of the pulse forming network 4 to improve the flatness of the output pulse. It is possible to keep the downtime short. That is, the flatness of the output pulse can be improved, and the rise and fall times can be shortened. Such an effect can be obtained by adding a simple bypass circuit 30.
[0023]
The pulse power supply device 1a can be used other than the drive of the pulse klystron and the power supply of the linear accelerator.
[0024]
【The invention's effect】
As described above, according to the present invention, the rise and fall times of the output pulse hardly depend on the inductance of the reactor in the first stage of the pulse forming circuit network. Therefore, the flatness of the output pulse is increased by increasing the inductance of the reactor. In this case, the rise and fall times of the output pulse can be kept short. That is, the flatness of the output pulse can be improved, and the rise and fall times can be shortened.
[Brief description of the drawings]
FIG. 1 is an equivalent circuit diagram showing an example of a pulse power supply device according to the present invention.
FIG. 2 is a circuit diagram showing an example in which a conventional pulse power supply device is used for driving a pulse klystron.
FIG. 3 is an equivalent circuit diagram around the pulse power supply device of the circuit of FIG. 2;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1a Pulse power supply device 2 Charging power supply 4 Pulse formation circuit network 6 Reactor 6a Initial stage reactor 8 Capacitor 8a Initial stage capacitor 10 Output switch 26 Bypass capacitor 28 Resonance suppression resistor 30 Bypass circuit

Claims (1)

A pulse forming circuit network in which a plurality of reactors and a plurality of capacitors are connected in a ladder shape; an output switch connected in series to a first-stage reactor counted from the output side of the pulse forming circuit network; and the pulse forming circuit network In a pulse power supply device comprising a charging power source for charging the first stage reactor, a bypass capacitor having a smaller capacity than the first stage capacitor constituting the pulse forming network and a resonance suppression resistor are connected in series with the first stage reactor. A pulse power supply device characterized by connecting a bypass circuit.

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