JP3805188B2 - Composite memory module and selection method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention is equipped with a plurality of IC chips in a single package, to a multi-memory module and its selection method is formed by connecting their respective chip and the external terminals.
[0002]
[Prior art]
In recent years, with high performance of devices such as mobile phones and computer systems, memory devices mounted on these devices are required to have high density and large capacity memory chips. At the same time, a compact and lightweight mounting form is also required. Therefore, a composite memory module (device) is produced in which a plurality of IC chips are mounted in a package suitable for high-density mounting and sealed with resin or the like.
[0003]
FIG. 4 is a flowchart showing a general process flow before shipping the composite memory device. In the composite memory module, each chip is manufactured by a process suitable for manufacturing each chip, a plurality of necessary chips are mounted in one package, and sealed (assembly) process (step S1), and then the final A test determines whether the product is a non-defective product or a defective product (step S2). The composite memory module determined to be a non-defective product is further screened for initial failure by a high-temperature and high-pressure test called burn-in (step S3), and after a predetermined shipping test (step S4), the composite memory module determined to be non-defective Only after marking (step S5) and appearance inspection (step S6), the product is shipped (step S7).
[0004]
[Problems to be solved by the invention]
However, generally, a module that has undergone the final test (S2) and burn-in (S3) includes a defective memory chip due to a pattern defect or the like among a plurality of mounted memory chips. A chip that operates normally (hereinafter referred to as a non-defective chip) is subjected to excessive thermal or electrical stress during the manufacturing process (mounting process) or testing process, and the chip that does not operate normally (hereinafter referred to as “chip”). May be included).
[0005]
As described above, a module having a defective chip has been removed as a result of determining that the product (module) itself (whole) is a defective product even if other chips are operating normally. Therefore, it has been desired to effectively use a memory chip that causes a decrease in yield and operates normally.
In particular, when a compound module that has been defective in the past is changed to another specification (version, rank) and reused, the compound module that has become defective can be used for another specification (version, rank). The screening test had to be performed again, requiring a lot of cost and labor, and was inefficient.
[0006]
Also, composite memory modules that operate normally may be returned as defective if their characteristics have deteriorated due to aging, etc. after shipment.In this case, analysis should be conducted to determine the cause of deterioration as soon as possible. It is necessary to feed back the analysis contents to the manufacturing process and create a more reliable product.
Therefore, it is important to know the history of each product during the manufacturing process, the history of testing (or the history of use in the market, etc.).
[0007]
However, when referring to the manufacturing history or the like of the defective product, the production management data of the manufacturing factory is checked and the history is followed, which takes a lot of time and effort, and the analysis efficiency is not good.
[0008]
The present invention has been made to solve the above-mentioned problems, and can easily refer to the manufacturing history of the composite memory module, etc., and can effectively use the composite memory module including the defective IC chip to reduce the yield. It is an object of the present invention to provide a composite memory module that can be improved and a selection method thereof.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, the present invention has the following configuration.
The first aspect of the present invention, mounting a plurality of IC chips in one package, in the composite memory module is sealed, either of the plurality of IC chips, be non-volatile memory chips , the predetermined area of the nonvolatile memory chip, in the multi-memory module, wherein the history information including the result of the operation test of the non-volatile memory chips other than the IC chip in the multi-memory module is write rarely written .
[0010]
According to a second aspect of the present invention, there is provided the composite memory module according to the first aspect, which includes a security function that allows only a specific person to read history information written in the nonvolatile memory chip.
[0011]
According to a third aspect of the present invention, there is provided a method for selecting the composite memory module according to the first or second aspect, wherein history information of each IC chip in the composite memory device determined to be defective is obtained from the nonvolatile memory chip. A method for selecting a composite memory module , comprising: a reading step for reading, and a selecting step for selecting specification changes based on information read in the reading step.
[0012]
According to a fourth aspect of the present invention, the selection step is based on evaluation result information relating to memory capacity, operating speed, operating voltage, operating current, standby current, current consumption, operating temperature range, function, etc. included in the history information. The composite memory module selection method according to the third aspect, wherein the selection is performed by rank.
[0013]
According to a fifth aspect of the present invention, there is provided a composite memory according to the third or fourth aspect, comprising a separation step of identifying a defective IC chip based on history information and electrically disconnecting from a normal IC chip. It is in the module selection method.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
In the composite memory module according to the present embodiment, at least one of the plurality of IC chips is configured by a nonvolatile memory chip, and tests and history data regarding the IC chip in the composite memory module are stored in the nonvolatile memory chip. It can be written and read.
[0015]
In other words, since the nonvolatile memory chip, for example, the flash memory is nonvolatile, the recorded information does not disappear even when the power is turned off. Therefore, the recorded information will be recorded later, that is, even after completion as a composite memory module. This is because it is possible to read out. In this way, it is possible to refer to necessary information by a simple operation of reading out history information recorded in the composite memory module itself, and troublesome work such as checking production management data of a manufacturing factory as in the past. It is no longer necessary and quick response is possible.
[0016]
On the other hand, a normal IC chip other than the non-volatile memory chip that constitutes the conventional composite memory module does not have a function that does not erase the recorded information even if the recorded information is turned off. A composite memory module that is shipped alone does not make sense, and results in the conventional problems as described above.
[0017]
Further, in the composite memory module according to the present embodiment, it is possible to easily determine a non-defective chip by simply writing test and history data and referring to the data later, and it is possible to easily reuse the specification change and the like. Thereby, the ratio of the composite memory module processed as a defective product can be reduced, and the yield can be substantially improved.
Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same part as above-described structure, and description is abbreviate | omitted.
[0018]
FIG. 1 is a longitudinal sectional view illustrating the configuration of a composite memory module according to the present invention. A composite memory module 1 of CSP (Chip Size Package) is formed by mounting and sealing IC chips 2 and 4 and a nonvolatile memory chip 3. 5 is a lead frame, 6 is a solder ball terminal, 7 is a pad terminal, and 8 is a bonding wiring.
[0019]
In the present embodiment, it is assumed that the volatile memory chip 3 and the IC chip 4 are good chips, and the IC chip 2 is a defective chip. Further, the IC chips 2 and 4 can be constituted by a nonvolatile memory chip or an IC chip having other functions.
[0020]
If one IC chip 2 out of the three IC chips 2, 3, 4 mounted and sealed in one package 1 is determined as a defective chip, the composite memory module 1 is conventionally regarded as a defective product. Had been processed.
In the present embodiment, the manufacturing history and test history of the three IC chips 2, 3, 4 are recorded in the nonvolatile memory chip 3, so that the defective chip 2 can be read out and disabled in later processing, By using other non-defective IC chips 3 and 4, the memory module 1 can be effectively used.
[0021]
FIG. 2 is a configuration diagram of a memory area of the nonvolatile memory chip 3. In FIG. 2, 31 is a main memory area of the flash memory, 32 is an area for recording the manufacturing history and test history of the flash memory itself, and 33 is the manufacturing of other IC chips 2 and 4 mounted in the composite memory module 1. An area for recording history and test history is shown. Here, “manufacturing history” means information such as manufacturing date, manufacturing number, lot number, etc., and “test history” means IC chip operating speed, standby current, operating current, operating temperature range, test failure Means information such as items.
[0022]
Since the main memory area 31 is an area provided to the user as a standard product, it has a standard memory capacity such as 16M bits or 32M hits. On the other hand, the history storage areas 32 and 33 are recording areas with a small capacity of about several tens to one hundred bytes.
[0023]
FIG. 3 is a flowchart showing a process flow from assembly to shipment of the composite memory module shown in FIG.
The composite memory module 1 is assembled after the assembly (assembly) step (step S1) for mounting and sealing a plurality (three in this example) of IC chips 2, 3, and 4 in a package that has been subjected to high-density mounting. A test (step S2) determines whether the product is a good product or a defective product.
[0024]
The composite memory module 1 that is determined to be non-defective (OK) in the final test is further screened for initial defects by a high-temperature and high-pressure test of burn-in (step S3).
[0025]
In the shipping test after the burn-in test, test signals are inputted to and outputted from the IC chips 2, 3, and 4 through the ball terminal 6, the lead frame 5, the bonding wiring 8, and the pad terminal 7 that are in contact with a test socket (test apparatus) (not shown). (Step S4).
In the final shipment test, test items such as the operation speed, standby current, and operation current of each IC chip 2, 3, and 4 are performed.
[0026]
In this shipping test, when the test history data for each IC chip 2, 3, 4 is determined, the manufacturing history and test history information of each IC chip determined using a tester is stored in the nonvolatile memory 3. Are written in the areas 32 and 33 (steps S4a and S4b). At that time, the test history of the nonvolatile memory 3 itself is written in the area 32, and the test histories of the other IC chips 2 and 4 are written in the area 33.
[0027]
Since neither of the test histories needs to be known except by the manufacturer, information other than the manufacturer cannot be read from these areas 22 and 23. For example, there is a method in which each chip is set in a test mode that is not open to the user, and in that state, an address and data are input from the outside, the areas 32 and 33 are specified, and data is written.
These areas 32 and 33 are locked for security so that only the manufacturer can read and release them. As one of the methods, there is a method in which a lock bit for access restriction that only the manufacturer can know is added to the storage areas 32 and 33, and the lock bit is set after writing a test history or the like. In order to read out the memory contents, this bit must be reset by the manufacturer, so that other than the manufacturer cannot read out the test history or the like.
[0028]
The composite memory module 1 determined as OK (OK) in the shipping test (S4) is shipped through the marking process (S5) and the appearance inspection process (S6) after the test history and manufacturing history writing process (S4a). (S7).
[0029]
On the other hand, the composite memory module 1 determined to be defective (NO) in the shipping test (S4) is moved to the selection process (step S4c) after the test history and manufacturing history writing process (step S4b). In the present embodiment, the test history and manufacturing history writing process (S4b) is described separately from step S4a. However, the process may be performed in step S4a and then proceed to the selection process (step S4c).
[0030]
In the sorting step (S4c), the manufacturer reads the necessary history information from the non-volatile memory 3 of the composite memory module 1 using a simple tester (not shown), so that the composite memory module 1 has a memory capacity, operation speed, and consumption. It is possible to sort by specification or rank based on current, operating temperature range, function, etc. In this embodiment, since it can be known from the history information read from the nonvolatile memory 3 that the IC chip 2 is a defective chip, the composite memory module 1 that is originally a 3-chip mounted product is replaced with a 2-chip mounted product. That is, it can be selected as another product that uses only two IC chips 3 and 4.
[0031]
When the specification is changed from the 3-chip mounted product to the 2-chip mounted product as in this example, the other two IC chips 3 and 4 are not adversely affected by disconnecting the external power supply terminal of the defective IC chip 2. It can be made to operate normally.
Further, by reading test information such as the operating speed, standby current, operating temperature range, etc. from the nonvolatile memory 3 (step S4c), it is possible to sort by specification and rank (step S4d). The simple sensor used in this process only reads out tens to hundreds of bytes of data, so there is no need for high-speed operation unlike that used during shipping tests, and a cheap tester can be used. Can respond.
[0032]
The composite memory module 1 thus selected is marked for each specification and rank in the next step (step S5), and after passing the appearance inspection (step S6), is shipped (S14).
[0033]
Thus, based on the history information of each IC chip 2, 3, 4 written in the nonvolatile memory chip 3 in the composite memory module 1 determined to be defective, the composite memory module 1 is treated as intended. By selecting as a product with a different specification from the specification, the ratio of the composite memory module 1 processed as a defective product is reduced, the yield is substantially improved, and the productivity of the composite memory module 1 is increased. Can be increased.
[0034]
In addition, even if the composite memory module 1 whose performance has deteriorated due to aging in the market after shipment is returned as a defective product, the test history before shipment is recorded in the composite memory module 1 itself. Therefore, the cause analysis can be easily performed, and the analysis result can be quickly fed back to the manufacturing process.
[0035]
In the above-described embodiment, a composite memory module having a three-chip mounting product has been described. Needless to say, the present invention can also be effectively applied to a composite memory module having two, four, or more IC chips. The greater the number of chips mounted, the more effective the present invention.
[0036]
【The invention's effect】
As described above, according to the gist of the present invention, in the composite memory module, history information including the result of the operation test of each IC chip is written in a specific area of the mounted nonvolatile memory chip. Even if it is determined as a defective product in a test before shipment, the history information including the result of the operation test of each IC chip is read from the non-volatile memory chip, so that the IC chip causing the defective product can be determined. Since it can be identified, the remaining IC chip that is not defective can be effectively used and diverted to a product for another use. As a result, the ratio of the composite memory module processed as a defective product can be reduced, the yield can be substantially improved, and the productivity of the composite memory module can be increased.
[0037]
In addition, even for those whose characteristics have deteriorated due to aging, etc. after shipment, the test history before shipment is recorded in the composite memory module itself, so the cause analysis can be performed easily, and the analysis results can be quickly obtained. Since it can be fed back to the manufacturing process, a more reliable product can be created.
[0038]
Further, according to the composite memory module selection method of the present invention, the composite memory module is determined based on the history information of each IC chip written in the nonvolatile memory chip in the composite memory module determined to be defective. Since the product is selected as a product with a different specification from that of the specification, the ratio of the composite memory module processed as a defective product can be reduced to substantially improve the yield and increase the productivity of the composite memory module. it can.
[Brief description of the drawings]
FIG. 1 is a longitudinal sectional view showing a configuration example of a composite memory module according to the present invention.
FIG. 2 is an explanatory diagram showing a configuration example of a memory area of a nonvolatile memory mounted on the composite memory module shown in FIG. 1;
3 is a flowchart showing a process flow from assembly to shipment of the composite memory module shown in FIG. 1;
FIG. 4 is a flowchart showing a process flow from assembly to shipment of a conventional composite memory module.
[Explanation of symbols]
1 Compound memory module 2, 4 IC chip 3 IC chip (nonvolatile memory chip)
31 Main memory area 32 Area for storing manufacturing history and test history of flash memory 33 Area for storing manufacturing history and test history of other ICs

Claims (5)

In a composite memory module in which a plurality of IC chips are mounted and sealed in one package,
Either of said plurality of IC chips is a non-volatile memory chips,
Wherein the predetermined area of the nonvolatile memory chip, the multi-memory modules, wherein the history information including the result of the operation test of the nonvolatile memory chips than the IC chip within the composite memory module is write rarely written . 2. The composite memory module according to claim 1, further comprising a security function that allows only a specific person to read the history information written in the nonvolatile memory chip. A method for selecting a composite memory module according to claim 1, comprising:
A reading step of reading the history information of each IC chip in the composite memory module determined to be defective from the nonvolatile memory chip;
On the basis of the information read by the reading step, selecting a composite memory module and having a, a sorting step for sorting the specification change. 4. The method for selecting a composite memory module according to claim 3, wherein the selecting step selects each rank based on evaluation result information included in the history information. 5. The method of selecting a composite memory module according to claim 3, further comprising a separation step of identifying a defective IC chip based on the history information and electrically disconnecting from a normal IC chip.

Images