JP3790039B2 - 分岐予測調整方法 - Google Patents

分岐予測調整方法 Download PDF

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Publication number
JP3790039B2
JP3790039B2 JP09016398A JP9016398A JP3790039B2 JP 3790039 B2 JP3790039 B2 JP 3790039B2 JP 09016398 A JP09016398 A JP 09016398A JP 9016398 A JP9016398 A JP 9016398A JP 3790039 B2 JP3790039 B2 JP 3790039B2
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Japan
Prior art keywords
branch
instruction
prediction
branch prediction
execution
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Expired - Fee Related
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JP09016398A
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English (en)
Japanese (ja)
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JPH10283183A (ja
JPH10283183A5 (enExample
Inventor
ダグラス・ブイ・ラーソン
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HP Inc
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Hewlett Packard Co
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Publication of JPH10283183A publication Critical patent/JPH10283183A/ja
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • G06F9/3844Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Debugging And Monitoring (AREA)
JP09016398A 1997-04-09 1998-04-02 分岐予測調整方法 Expired - Fee Related JP3790039B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8/840-080 1997-04-09
US08/840,080 US5838962A (en) 1997-04-09 1997-04-09 Interrupt driven dynamic adjustment of branch predictions

Publications (3)

Publication Number Publication Date
JPH10283183A JPH10283183A (ja) 1998-10-23
JPH10283183A5 JPH10283183A5 (enExample) 2005-09-15
JP3790039B2 true JP3790039B2 (ja) 2006-06-28

Family

ID=25281399

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09016398A Expired - Fee Related JP3790039B2 (ja) 1997-04-09 1998-04-02 分岐予測調整方法

Country Status (4)

Country Link
US (1) US5838962A (enExample)
EP (1) EP0871110B1 (enExample)
JP (1) JP3790039B2 (enExample)
DE (1) DE69825350T2 (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6105102A (en) * 1998-10-16 2000-08-15 Advanced Micro Devices, Inc. Mechanism for minimizing overhead usage of a host system by polling for subsequent interrupts after service of a prior interrupt
US6578143B1 (en) * 1998-12-18 2003-06-10 Qualcomm Incorporated Method for negotiating weakened keys in encryption systems
US6954923B1 (en) 1999-01-28 2005-10-11 Ati International Srl Recording classification of instructions executed by a computer
US8065504B2 (en) 1999-01-28 2011-11-22 Ati International Srl Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor
US6763452B1 (en) 1999-01-28 2004-07-13 Ati International Srl Modifying program execution based on profiling
US7275246B1 (en) 1999-01-28 2007-09-25 Ati International Srl Executing programs for a first computer architecture on a computer of a second architecture
US8074055B1 (en) 1999-01-28 2011-12-06 Ati Technologies Ulc Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
US7111290B1 (en) 1999-01-28 2006-09-19 Ati International Srl Profiling program execution to identify frequently-executed portions and to assist binary translation
US8127121B2 (en) 1999-01-28 2012-02-28 Ati Technologies Ulc Apparatus for executing programs for a first computer architechture on a computer of a second architechture
US6978462B1 (en) 1999-01-28 2005-12-20 Ati International Srl Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled
US7941647B2 (en) 1999-01-28 2011-05-10 Ati Technologies Ulc Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination
US7065633B1 (en) 1999-01-28 2006-06-20 Ati International Srl System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU
US7013456B1 (en) 1999-01-28 2006-03-14 Ati International Srl Profiling execution of computer programs
US6314510B1 (en) * 1999-04-14 2001-11-06 Sun Microsystems, Inc. Microprocessor with reduced context switching overhead and corresponding method
US6622300B1 (en) 1999-04-21 2003-09-16 Hewlett-Packard Development Company, L.P. Dynamic optimization of computer programs using code-rewriting kernal module
US6779107B1 (en) 1999-05-28 2004-08-17 Ati International Srl Computer execution by opportunistic adaptation
US6549959B1 (en) 1999-08-30 2003-04-15 Ati International Srl Detecting modification to computer memory by a DMA device
US6934832B1 (en) 2000-01-18 2005-08-23 Ati International Srl Exception mechanism for a computer
US8214601B2 (en) * 2004-07-30 2012-07-03 Hewlett-Packard Development Company, L.P. Purging without write-back of cache lines containing spent data
US8301871B2 (en) * 2006-06-08 2012-10-30 International Business Machines Corporation Predicated issue for conditional branch instructions
US7487340B2 (en) * 2006-06-08 2009-02-03 International Business Machines Corporation Local and global branch prediction information storage
JP2008107913A (ja) * 2006-10-23 2008-05-08 Toshiba Corp プログラム、ソフトウェア変換装置及びコンピュータ
US7984279B2 (en) * 2006-11-03 2011-07-19 Qualcomm Incorporated System and method for using a working global history register
JP5082716B2 (ja) * 2007-09-20 2012-11-28 富士通セミコンダクター株式会社 プログラム変換装置、プログラム変換方法およびプログラム変換プログラム
US8099586B2 (en) * 2008-12-30 2012-01-17 Oracle America, Inc. Branch misprediction recovery mechanism for microprocessors
US8713562B2 (en) * 2012-01-06 2014-04-29 International Business Machines Corporation Intelligent and automated code deployment
US9448909B2 (en) * 2013-10-15 2016-09-20 Advanced Micro Devices, Inc. Randomly branching using performance counters
US9875106B2 (en) * 2014-11-12 2018-01-23 Mill Computing, Inc. Computer processor employing instruction block exit prediction
GB2574042B (en) * 2018-05-24 2020-09-09 Advanced Risc Mach Ltd Branch Prediction Cache
US11086629B2 (en) * 2018-11-09 2021-08-10 Arm Limited Misprediction of predicted taken branches in a data processing apparatus
US11275607B2 (en) * 2020-03-17 2022-03-15 Arm Limited Improving the responsiveness of an apparatus to certain interrupts

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4124893A (en) * 1976-10-18 1978-11-07 Honeywell Information Systems Inc. Microword address branching bit arrangement
US4176394A (en) * 1977-06-13 1979-11-27 Sperry Rand Corporation Apparatus for maintaining a history of the most recently executed instructions in a digital computer
US4370711A (en) * 1980-10-21 1983-01-25 Control Data Corporation Branch predictor using random access memory
US4435756A (en) * 1981-12-03 1984-03-06 Burroughs Corporation Branch predicting computer
US4679141A (en) * 1985-04-29 1987-07-07 International Business Machines Corporation Pageable branch history table
US4901233A (en) * 1987-07-20 1990-02-13 International Business Machines Corporation Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries
JPH0795271B2 (ja) * 1989-06-20 1995-10-11 富士通株式会社 分岐命令実行装置
EP0550286A3 (en) * 1992-01-03 1993-11-03 Amdahl Corp 2-level multi-processor synchronization protocol
US5367703A (en) * 1993-01-08 1994-11-22 International Business Machines Corporation Method and system for enhanced branch history prediction accuracy in a superscalar processor system
US5717909A (en) * 1995-05-26 1998-02-10 National Semiconductor Corporation Code breakpoint decoder
US5659752A (en) * 1995-06-30 1997-08-19 International Business Machines Corporation System and method for improving branch prediction in compiled program code
SE520343C2 (sv) * 1997-02-12 2003-07-01 Ericsson Telefon Ab L M Förfarande, system och dator för grenprediktion

Also Published As

Publication number Publication date
DE69825350T2 (de) 2005-07-21
EP0871110B1 (en) 2004-08-04
EP0871110A3 (en) 1999-01-20
EP0871110A2 (en) 1998-10-14
JPH10283183A (ja) 1998-10-23
US5838962A (en) 1998-11-17
DE69825350D1 (de) 2004-09-09

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