JP3786229B2 - Image reading device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present inventionThe document image to be sub-scanned is read one main scanning line at a time by the line image sensor configured by arranging a plurality of image sensor chips each composed of a plurality of reading pixels arranged one-dimensionally in the main scanning direction. Outputs image signals for each pixel constituting the line image sensorThe present invention relates to an image reading apparatus.
[0002]
[Prior art]
In recent years, in facsimile machines, copying machines, etc., the optical path length can be set short and the apparatus can be miniaturized. Therefore, the same size image sensor is often used as an image reading apparatus for reading a document. .
[0003]
This equal-magnification image sensor is an image sensor chip in which a plurality of read pixels are formed in a one-dimensional manner (hereinafter also referred to simply as a sensor chip), as can be seen in “Image Sensor” described in JP-A-61-69256. Are arranged in the same direction as the arrangement direction of the pixels on the base material.
[0004]
The sensor chip is a line image sensor that uses a sensor chip to read an A4 size or A3 size document with an equal-magnification optical system because the size in the longitudinal direction is regulated by the wafer size that is fundamental in manufacturing semiconductors. In order to obtain the above, it is necessary to secure a necessary reading length by arranging a plurality of sensor chips.
[0005]
When scanning the width direction (about 210 mm) of an A4 size document with a scanning resolution of 400 DPI (Dot Per Inch: about 15.4 mm is about 25.4 mm) with a 1 × magnification image sensor, the pixel interval is about 63.5 μm.
[0006]
The pixel spacing inside one sensor chip is, of course, the high precision obtained in the semiconductor manufacturing process, and it is easy to align them at regular intervals. However, a line image is obtained by arranging multiple sensor chips on a substrate. When configuring a sensor, the pixel interval (boundary pixel interval) at the joint can be aligned only with accuracy when a plurality of sensor chips are mounted on a substrate. However, the accuracy is lower than the accuracy obtained in the semiconductor manufacturing process, and it is very difficult to match the pixel interval inside the sensor chip and the boundary pixel interval with high accuracy.
[0007]
On the other hand, if the pixel interval inside the sensor chip is different from the boundary pixel interval, the read image may be adversely affected.
[0008]
For example, when an oblique line on a document is read by a line image sensor configured by an array of a plurality of sensor chips, a step is generated at the joint position of the sensor chip in the oblique line portion of the read image. Also, when a halftone document is read, the moire caused by the difference between the halftone dot pitch (spatial frequency) and the pixel spacing of the sensor may be disturbed at the joint position of the sensor chip and look like vertical stripes. is there.
[0009]
As the ratio of the error between the boundary pixel interval between adjacent sensor chips with respect to the pixel interval inside the sensor chip is larger, the adverse effect generated in the read image becomes larger. Therefore, if the resolution of the sensor chip is increased, the pixel interval inside the sensor chip is reduced. As a result, even if the error of the boundary pixel interval between the sensor chips is the same, the ratio to the pixel interval inside the sensor chip is relatively large. Thus, the influence on the read image becomes more remarkable.
[0010]
In recent years, in line with the demand for high-quality reading, the resolution of line image sensors has been increasing. For example, line image sensors having a resolution of 600 DPI have also appeared.
[0011]
On the other hand, it is important to keep the seam error between sensor chips small in order to improve the image quality associated with higher resolution, but this is achieved with high accuracy because it is an error in placing sensor chips. It has become difficult to do.
[0012]
As a proposal for countermeasures against this, there is an “image reading apparatus” described in Japanese Patent Laid-Open No. 61-256860.
[0013]
This is because each pixel forming the one-dimensional image sensor is composed of a plurality of sensor elements, and the elements are selectively used according to the positional deviation of the arrangement of the sensor chip, thereby correcting the influence of the positional deviation. It is a thing.
[0014]
[Problems to be solved by the invention]
However, an obvious drawback of the proposed apparatus is that the accuracy of the correction is rough. In other words, the accuracy of correction is determined by how many elements each pixel is composed of, and even if the number of constituent elements is sufficiently increased, the accuracy of correction can be increased. The open area is greatly reduced, the reflected light from the read original cannot be received with a sufficient amount of light per pixel, and the quality of the read image is deteriorated due to a decrease in the S / N of the sensor output. is there.
[0015]
On the other hand, as the demand for image quality increases in the future, the resolution of the image sensor will continue to increase. In this case, the influence of the assembly accuracy of the image sensor chip described above will be relatively increased, resulting in higher image quality. Contrary to the goal, there are many factors that degrade image quality.
[0016]
  The present invention has been made in view of such circumstances, and is an image reading apparatus capable of correcting a displacement of a plurality of image sensor chips constituting a line image sensor with high accuracy and removing an adverse effect on a read image.PlaceThe purpose is to provide.
[0017]
[Means for Solving the Problems]
  In order to achieve the above object, an image reading apparatus according to claim 1 is one-dimensional.With pixel spacing dA line image sensor configured by arranging a plurality of image sensor chips composed of a plurality of arranged pixels in the main scanning direction reads a document image to be sub-scanned one main scanning line at a time, and the line image sensor ConfigurePaintingImage reading device that outputs image signal for each elementBecause,A boundary which is an arrangement interval of pixels at each boundary between the pixel interval d and each image sensor chipStorage means for storing information on pixel intervals in advance;Image sensor chips A and B are sequentially arranged adjacent to each other in a plurality of image sensor chips constituting the line image sensor, and the boundary stored in the storage unit for the image sensor chips A and B Assuming that the pixel interval is the boundary pixel interval D, the predetermined number (a) of pixels at the head of the image sensor chip B is the image sensor chip regardless of the physical pixel arrangement of the a pixels. By assuming that the pixels are arranged at equal intervals of (d + (D−d) / (a)) from the last pixel of A, a virtual pixel arrangement of each pixel constituting the line image sensor is determined, and the image Among the pixels constituting the sensor, the position on the virtual pixel arrangement is the same as the position on the physical pixel arrangement in the image sensor. For the pixel to be output, the image signal output from the pixel is directly output as the image signal for the pixel, while the position on the virtual pixel arrangement does not match the position on the physical pixel arrangement in the image sensor. With respect to the pixel, a predetermined value is determined based on the positional relationship between the peripheral pixel, which is a pixel located on the physical pixel arrangement around the pixel on the virtual pixel arrangement, and an image signal output from the peripheral pixel. The image signal calculated by the approximate calculation method is output as the image signal for the pixel.And a correcting means.
[0018]
  Claim2The described image reading apparatus includes a plurality of one-dimensionally arranged image reading apparatuses.PaintingAn original image to be sub-scanned is read one main scanning line at a time by a line image sensor configured by arranging a plurality of elemental image sensor chips in the main scanning direction.Configure the line image sensorIn an image reading apparatus that outputs an image signal for each pixel, storage means for storing in advance information on the arrangement interval of the boundary pixels of each image sensor chip and the pixel interval in each image sensor chip, and the storage Based on the information stored in the means, the physical pixel arrangement of the line image sensor,The difference in pixel spacing between the physical pixel arrangement of the line image sensor and the virtual pixel arrangement in the vicinity of the boundary pixel at each boundary between the image sensor chips is calculated from the line image sensor.In synchronization with the pixel readout cycle,By reducing the pixel currently being read from the line image sensor at a predetermined rate as it is separated from each boundary, at each boundary,A first correction unit configured to correct a virtual pixel arrangement by dispersing a difference between the arrangement interval of the boundary pixels and a pixel interval in each of the image sensor chips in peripheral pixels of the boundary pixels; and the line image sensor An image signal for each pixel from the first correction meansFrom the line image sensorAnd a second correction means for correcting the image signal from the virtual pixel arrangement obtained in synchronization with the pixel readout cycle.
[0034]
First, an image reading apparatus according to an embodiment of the present invention will be described in detail. FIG. 1 shows a block configuration of an image reading apparatus according to an embodiment of the present invention.
[0035]
  In the figure, reference numeral 201 denotes a line image sensor composed of a plurality of image sensor chips, which is not shown.IndeedThe document image to be further sub-scanned is read one main scanning line at a time, and an image signal for each pixel is output. FIG. 2 shows a partial configuration of the image sensor 201.
[0036]
In the image sensor 201 shown in FIG. 2, reference numeral 101 denotes a substrate material, which is usually made of ceramic or glass epoxy having high resistance and high rigidity. Reference numerals 102a and 102b denote image sensor chips arranged on the substrate material 101, and a plurality of pixels are formed in the longitudinal direction. In the figure, only two sensor chips 102a and 102b are shown on the substrate material 101, but in actuality, the number of sensor chips whose total length in the main scanning direction exceeds the necessary reading width is shown. Is arranged. Reference numeral 103 denotes an aperture for receiving light of each pixel, and an interval between the apertures is a pixel interval in the image sensor chip.
[0037]
As described above, at a reading resolution of 400 DPI, the pixel interval d takes a value of about 63.5 μm. D is a pixel interval (boundary pixel interval) at the boundary between the sensor chips 102a and 102b, and varies depending on the accuracy of mounting the image sensor chip 102a and the chip 102b on the substrate material.
[0038]
There is no problem when the boundary pixel interval D substantially coincides with the pixel interval d. However, when the boundary pixel interval D is larger or smaller than the pixel interval d, a failure occurs in the read image depending on the degree. What is conspicuous among the obstacles is that when the oblique line on the original is read, a step is generated at the joint position of the image sensor chip in the oblique line of the read image. Also, when a halftone document is read, moiré caused by the difference between the halftone dot pitch (spatial frequency) and the pixel interval of the image sensor is disturbed at the joint position, and may appear as a vertical stripe. Since there are a large number of literatures on moire, the explanation is omitted here.
[0039]
In the image sensor 201 shown in FIG. 2, generally, a circuit made of a conductor is formed on a substrate material 101 by etching or vapor deposition, whereby power is supplied to each image sensor chip and a signal is supplied. A read signal is taken out.
[0040]
In FIG. 1, reference numeral 202 denotes an A / D conversion unit that converts an analog image signal output from the image sensor 201 into digital image data. Although not shown, amplification, level conversion, and the like necessary before conversion are performed. The analog signal processing unit is also included.
[0041]
A shading correction unit 203 normalizes the output of the image sensor 201 using a black reference plate reading value or a reading value when the illumination light source is turned off as a black reference value and a white reference plate reading value as a white reference value. Correction of offset output in the dark, sensitivity variations for each pixel of the sensor, and illumination variations due to optical components such as a light source and a lens. Since this shading operation is a known technique, further explanation is omitted here.
[0042]
Reference numeral 204 denotes a seam correction unit that performs an operation of correcting a displacement between a plurality of sensor chips constituting the image sensor 201. A detailed description of this block will be given later.
[0043]
An image processing unit 205 performs various image processing operations as an image reading apparatus, and performs known processes such as image filtering, scaling (resolution conversion), and binarization. Since the operation relating to this block is not directly related to the present invention, further explanation is omitted.
[0044]
The image signal read by the image sensor 201 and processed by each block is finally used by a subsequent processing unit (not shown) via the image processing unit 205. For example, when the reading apparatus according to the present invention is applied to a facsimile machine, the image data to be transmitted to the other apparatus, and in the case of a copying machine, the image data recorded and output by a plotter may be a scanner apparatus. For example, it is used as image data transferred to a host device such as a personal computer.
[0045]
A clock generation unit 206 generates and supplies a clock, a synchronization signal, and the like necessary for each block.
[0046]
Next, the configuration and operation of the seam correction unit 204 will be described. Prior to that, the operation of the seam correction unit 204 will be conceptually described with reference to FIG.
[0047]
In the figure, the actual pixel arrangement (actual sampling position) indicates the position (the physical arrangement position of the pixel) where the aperture 103 exists in the image sensor chip arranged on the substrate material 101 in the image sensor 201. ing.
[0048]
In the figure, the state of the boundary portion between the image sensor chips A and B (corresponding to the positional relationship between the image sensor chips 102a and 102b in FIG. 2) adjacent to each other with the pixel interval d and the boundary pixel interval D is shown. Represents. The actual sampling position means a physical position where a pixel actually exists as described above. The upper part of the drawing shows the case where the boundary pixel interval D is larger than the pixel interval d (D> d), and the lower part shows the case where the boundary pixel interval D is larger than the pixel interval d (D <d). .
[0049]
The image sensor chips A and B are composed of N pixels. In the figure, the last three pixels of the image sensor chip A, A (N−2), A (N−1), and A (N). The positions of the first six pixels B (1), B (2), B (3), B (4), B (5), and B (6) of the image sensor chip B are expressed. The pixel intervals in the same image sensor chip are all d as described above, and the pixel interval (boundary pixel interval) of the image sensor chip boundary, that is, the interval D between A (N) and B (1) is the image sensor chip A. Depending on the mounting accuracy of B and B, either the case of (D> d) shown in the upper stage or the case of (D <d) shown in the lower stage can occur.
[0050]
As described above, if there is a place having a distance D that is significantly different from the distance d in only one of the pixels regularly arranged at the distance d, various obstacles occur in the image reading performance. As described above, for example, when an oblique line on a document is read, a step is generated at the joint position of the image sensor chip in the oblique line portion of the read image. Further, when a halftone document is read, moire caused by the difference between the halftone dot pitch (open frequency) and the pixel interval of the image sensor is disturbed at the joint position, and may appear as vertical stripes.
[0051]
To prevent this, set the virtual sampling points so that the pixels that are physically arranged (at the actual sampling position) are arranged at approximately equal intervals at unequal intervals that may occur at the boundaries between the image sensor chips. However, if a pixel is present at this virtual sampling position, an image signal that should be output from the pixel in the virtual arrangement is transferred to the virtual pixel of the physical arrangement. What is necessary is just to correct | amend the nonuniform pixel space | interval which may arise in the boundary between image sensor chips by calculating | requiring by calculation based on the image signal actually output from the pixel located in the periphery of the pixel of various arrangement | positioning.
[0052]
A method of calculating virtual sampling data (pixel value that should be output from a temporary pixel arranged at a virtual sampling position) from actual sampling data (pixel values actually output from each pixel of the image sensor) by calculation is as follows: Various proposals have been made so far, for example, the third page of “Image Data Scaling Processing Device” described in Japanese Patent Publication No. 8-28810 also includes a recent pixel replacement method, a distance distribution method between adjacent pixels, Although there is a description of a cubic function convolution method or the like, among them, the linear distribution method between adjacent pixels and the cubic function convolution method are applicable to the present embodiment, and in particular, the cubic function convolution method is The accuracy of the approximation operation based on the sampling theorem is good, and is optimal for this embodiment.
[0053]
  In FIG. 3, the pixel at the virtual sampling position indicated by the white circle corresponding to the pixel at the actual sampling position indicated by the black circle (for example, A (N−2)) is expressed as A ′ (N−2) or the like. Show correspondenceHaveThe In the figure, the pixel at the actual sampling position and the pixel at the virtual sampling position are misaligned in B ′ (1), B ′ (2), and B ′ (3) indicated by white circles. Yes, the difference (D−d) between the boundary pixel interval D and the pixel interval d is divided into four by the deviation of these virtual pixels, and the pixel interval non-uniformity generated at the boundary between the image sensor chips is distributed to peripheral pixels I am doing so.
[0054]
That is, B ′ (1) is set at a position separated from A ′ (N) by (d + (D−d) / 4), and B ′ (2) is similarly set to (d + ( D'd) / 4) is set at a position separated from B '(3), and B' (3) is set at a position separated from B '(2) by (d + (D-d) / 4). As a result, the deviation (D−d) between the virtual sampling position and the actual sampling position at the sensor chip boundary is dispersed by (D−d) / 4, and finally the virtual sampling position and the actual sampling position at the position B ′ (4). This is continued as long as the sampling positions match and reading from the image sensor chip B continues. In the case of (D> d) shown in the upper stage and the case of (D <d) shown in the lower stage, the sign of the deviation (D−d) between the virtual sampling position and the actual sampling position at the sensor chip boundary is Although different, as will be described later, by determining this code, it is possible to switch the pixel at the actual sampling position to be referred to when calculating the pixel value of the pixel at the virtual sampling position.
[0055]
In the present embodiment, as shown in FIG. 3, the difference between the boundary pixel interval D and the pixel interval d is divided into four parts, and the non-uniform pixel interval generated at the boundary between the image sensor chips is distributed to the peripheral pixels. However, it is not limited to four divisions, but it is better in terms of performance to carry out more slowly, for example, eight divisions or 16 divisions described later. However, the calculation accuracy for calculating the virtual sampling data is required accordingly.
[0056]
Based on the conceptual operation of the seam correction unit 204 described above, the configuration and operation of the seam correction unit 204 will be described with reference to FIG.
[0057]
  In the figure, reference numeral 311 denotes a frequency divider, a pixel clock PCLK indicating the timing of each pixel, a line synchronization clock LSYNC indicating the reading timing of each line of the image sensor 201, and the validity of the input image signal in one line. A gate signal LGATE indicating a period is input from the clock generator 206,Gate signal that is the effective period of the input image signal in one lineDuring the LGATE assertion period, every time the number of pixel clocks PCLK corresponding to the number of pixels held by each of the plurality of sensor chips constituting the image sensor 201 is counted.Output pulseTo do.
[0058]
Reference numeral 312 denotes an address counter. By counting the output of the frequency divider 311 over one line period, the image sensor chip number corresponding to the current reading is addressed as each pixel of the image sensor 201 is sequentially read from the top. (The signal name in the figure is chip_address). For example, if an image is currently read from a pixel formed on the fourth image sensor chip from the top, an address of 3 smaller by 1 is output (for the first image sensor chip, 0 address is output).
[0059]
  Reference numeral 314 denotes a storage unit which reads out and outputs the stored arrangement interval data of each image sensor chip according to the designation of the output address of the address counter 312 (signal names in the figure arechip_pitch_data).
[0060]
An example of the data configuration inside the storage unit 314 is shown in FIG. In the figure, chip arrangement interval data (corresponding to the boundary pixel interval D in FIG. 3) is stored in order at a predetermined storage address of the storage unit 314 as stored contents. The first address (address 0) of the storage unit 314 stores a value d, which is an original pixel interval in the image sensor chip, for convenience of operation. Needless to say, this value d is data corresponding to 63.5 μm in the case of the above-mentioned 400 DPI. The form of chip arrangement interval data to be stored may be arbitrary, but here, it is assumed that the data is normalized by the value d. That is, 0 is the same value as “d”, +0.2 if the interval is 20% greater than “d”, and −0.2 if the interval is 20% less than “d”.
[0061]
Reference numeral 313 denotes a pixel address counter that is reset by the output of the frequency divider 311 and counts the pixel clock PCLK. The pixel address counter 313 outputs an address signal indicating how many pixels are being read from the head in the image sensor chip (see FIG. The signal name inside is pixel_address).
[0062]
  Reference numeral 315 denotes arrangement interval data of the image sensor chip output from the storage unit 314 according to the pixel position address (pixel_address) in the chip output from the counter 313.chip_virtual sampling position information (distance from the actual sampling position) necessary for performing an operation on the pitch_data) and removing an image abnormality caused by an arrangement error of the image sensor chip (pitch_data). When the pixel being read out is the first pixel of the image sensor chip, the arrangement interval data output from the storage unit 314 (chip_A value close to (pitch_data) is output, and the value is reduced as reading progresses, and approaches 0. This operation is as described above with reference to FIG.
[0063]
  The processing procedure of this calculation operation will be described with reference to FIG. In the figure, the calculation unit 315 determines whether the pixel position address (pixel_address) input from the counter 313 is smaller than 4 (determination S01), and when it is 4 or more (No in determination S01), the virtual sampling position information(pitch_data) Is substituted (output) (step S03). If it is less than 4 (Yes in judgment S01), virtual sampling position information (pitch_data), (chip_Pitch_data × (3-pixel_address) / 4) is substituted (output) (processing S02).
[0064]
  The LUT (Look Up Table) 310 is virtual sampling position information output from the calculation unit 315 (pitch_data) To perform the actual correction operationCountingThe example number is output to the multipliers 305, 306, 307 and 308.
[0065]
The multipliers 305, 306, 307, and 308 receive outputs from D-FFs (flip-flops) 304, 303, 302, and 301, respectively, and multiply their input values by the operation coefficient from the LUT 310. The result is output to the adder 309. The adder 309 adds the values input from the multipliers 305, 306, 307, and 308, and outputs the result as an image signal to the image processing unit 205.
[0066]
D-FFs (flip-flops) 304, 303, 302, and 301 are D-FFs having the same configuration, and multipliers 305, 306, and 307 are provided by delaying the image signal from the shading correction unit 203 by one pixel clock. And 308, respectively, are generated. In the example of FIG. 3, in a state where the pixel value A (N) is stored in the D-FF 304, the pixel value B (1) is stored in the D-FF 303, and B (2 The pixel value of B (3) is stored in the D-FF 301.
[0067]
As a method for determining the calculation coefficient output by the LUT 310, there is a technique using a cubic function convolution method described on page 9 of “Image data scaling processing device” described in the above Japanese Patent Publication No. 8-28810. Applicable.
[0068]
  In that case, the pixel at the actual sampling position referred to for calculating the pixel value of the pixel at the virtual sampling position is the virtual sampling position information (pitch_data) Depending on the sign.
[0069]
  Nasuchipitch_dataIf the sign of the image sensor chip is positive, in the example of FIG.chip_pitch_data), that is, the sign of (D−d) / d is positive, which corresponds to the case where the boundary pixel interval D> pixel interval d in the upper stage of FIG.
[0070]
Thus, for example, the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (1) are A (N−1), A (N), B (1) and B ( 2), and the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (2) are A (N), B (1), B (2), and B (3). ) And the pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (3), are B (1), B (2), B (3), and B (4). It becomes.
[0071]
  on the other hand,pitch_dataIf the sign of is negative, in the example of FIG. 3, the arrangement interval data of the image sensor chip (chip_pitch_data), that is, (D−d) / d has a negative sign, which corresponds to the case where the boundary pixel interval D <pixel interval d in the lower part of FIG.
[0072]
Therefore, for example, the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (1) are A (N), B (1), B (2), and B (3). The pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (2), are B (1), B (2), B (3), and B (4). Yes, the pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (3), are B (2), B (3), B (4), and B (5). .
[0073]
  The virtual sampling pixels after the virtual sampling pixel B ′ (4) in both cases where the upper boundary pixel interval D> pixel interval d or the lower boundary pixel interval D <pixel interval d. The pixel value ofpitch_dataIs equal to 0, the pixel values of the actual sampling pixels after the actual sampling pixel B (4) coincide with each other.
[0074]
  Therefore, the LUT 310 ispitch_dataAccording to the positive / negative of the value of, the sequential relationship between the four actual sampling pixels to be referred to in order to calculate the pixel value of the virtual sampling pixel whose pixel value is to be obtained and the positional relationship between the virtual sampling pixels is logically 1 Shift pixels. In addition, the LUT 310pitch_dataIf the value of 0 is 0, the value of the D-FF 302 or D-FF 303 in which the pixel value from the actual sampling pixel corresponding to the virtual sampling pixel for which the pixel value is to be obtained is stored is left as it is, and the virtual sampling is performed. The calculation coefficient output to the multipliers 305, 306, 307, and 308 is switched so that the pixel value of the pixel is output from the adder 309. Specifically, in order to make the value of the D-FF 302 or D-FF 303 unchanged, the arithmetic coefficient output to the multiplier 307 or the multiplier 306 is set to 1, and the arithmetic coefficient for other multipliers is set to 0. Is output.
[0075]
In this way, by setting the virtual sampling position, calculating the virtual sampling data and using it as an image signal, it is possible to disperse the non-uniform pixel spacing that occurs at the boundary between the image sensor chips to the peripheral pixels. It is possible to eliminate the influence of the position error of the chip arrangement on the read image.
[0076]
Since the virtual sampling data is obtained from the actual sampling data, if the image sensor sensitivity unevenness and illumination optical system unevenness are not removed prior to the calculation, virtual sampling data including this will be obtained. Further, the above-described unevenness removal (shading correction) is complicated in construction and difficult, but in the image reading apparatus according to the present embodiment described above, the shading correction before the joint correction unit 204 is performed. Since such processing is performed in advance in the unit 203, such a problem does not occur.
[0077]
Next, the line image sensor according to the embodiment of the present invention will be described in detail by dividing it into first, second and third embodiments. First, FIG. 7 shows a block configuration of the line image sensor 401 according to the first embodiment of the present invention.
[0078]
In the figure, reference numeral 501 denotes a photoelectric conversion unit, which is an image sensor composed of a plurality of image sensor chips, and reads an original image sub-scanned by a sub-scanning mechanism (not shown) one main scanning line at a time for each pixel. A signal is output. Its configuration is the same as that of the image sensor 201 shown in FIG. Since the configuration of the image sensor illustrated in FIG. 2 has already been described in detail in the description of the image reading apparatus according to the present embodiment described above, the configuration of the photoelectric conversion unit 501 is described here by using the description. The detailed description of is omitted. The conceptual operation of the line image sensor 401 is similar to the operation described with reference to FIG. 3 in the description of the seam correction unit 204 of the image reading apparatus according to the present embodiment described above. The detailed description of the conceptual operation of the line image sensor 401 will be omitted by using the description.
[0079]
A signal processing unit 502 converts and amplifies the output of the photoelectric conversion unit 501 into a voltage signal of a predetermined level. Reference numeral 503 denotes a drive control unit which receives a pixel clock PCLK indicating timing for each pixel and a line synchronization clock LSYNC indicating reading timing for each line of the photoelectric conversion unit 501 from the outside. While supplying a drive control signal for output extraction control of the sensor pixel, a gate signal LGATE indicating a valid period of the input image signal in one line is output.
[0080]
Reference numeral 504 denotes a frequency divider, which indicates a pixel clock PCLK indicating timing for each pixel, a line synchronization clock LSYNC indicating reading timing for each line of the photoelectric conversion unit 501, and an effective period of an input image signal in one line. The gate signal LGATE is input, and during the LGATE assertion period, a pulsed output is asserted every time the pixel clocks PCLK corresponding to the number of pixels held in each of the plurality of sensor chips constituting the photoelectric conversion unit 501 are asserted.
[0081]
Reference numeral 505 denotes an address counter. By counting the output of the frequency divider 504 over one line period, the image sensor chip number corresponding to the current reading is obtained as each pixel of the photoelectric conversion unit 501 is sequentially read from the top. This is output as an address (the signal name in the figure is chip_address). For example, if an image is currently read from a pixel formed on the fourth image sensor chip from the top, an address of 3 smaller by 1 is output (for the first image sensor chip, 0 address is output).
[0082]
Reference numeral 506 denotes a storage unit which reads and outputs data stored in the arrangement interval of each image sensor chip according to the designation of the output address of the address counter 505 (the signal name in the figure is chip_pitch_data).
[0083]
  Memory506The internal data configuration example is the same as that shown in FIG. In the figure, chip arrangement interval data (corresponding to the boundary pixel interval D in FIG. 3) is stored in order at a predetermined storage address of the storage unit 506 as stored contents. In the first address (address 0) of the storage unit 506, a value d which is an original pixel interval in the image sensor chip is stored for the convenience of operation. Needless to say, this value d is data corresponding to 63.5 μm in the case of the above-mentioned 400 DPI. The form of chip arrangement interval data to be stored may be arbitrary, but here, it is assumed that the data is normalized by the value d. That is, 0 is the same value as “d”, +0.2 if the interval is 20% greater than “d”, and −0.2 if the interval is 20% less than “d”.
[0084]
Reference numeral 507 denotes a pixel address counter that is reset by the output of the frequency divider 504 and counts the pixel clock PCLK. The pixel address counter 507 outputs an address signal indicating the number of pixels being read from the head in the image sensor chip (see FIG. The signal name inside is pixel_address).
[0085]
508 performs calculation on the arrangement interval data (chip_pitch_data) of the image sensor chip output from the storage unit 506 in accordance with the pixel position address (pixel_address) in the chip output from the counter 507, and is caused by the arrangement error of the image sensor chip. It is a calculation part which outputs virtual sampling position information (distance from an actual sampling position) (pitch_data) required in order to remove the image abnormality to perform. When the pixel being read is the first pixel of the image sensor chip, a value close to the arrangement interval data (chip_pitch_data) output from the storage unit 506 is output, and this is reduced as reading progresses and approaches 0. . This operation is as described above with reference to FIG.
[0086]
The processing procedure of this calculation operation will be described with reference to FIG. In the figure, the calculation unit 508 determines whether the pixel position address (pixel_address) input from the counter 507 is smaller than 4 (determination S101), and when it is 4 or more (No in determination S101), the virtual sampling position 0 is assigned (output) to information (pitch_data) (processing S103). If it is smaller than 4 (Yes in judgment S101), (chip_pitch_data × (3-pixel_address) / 4) is substituted (output) in the virtual sampling position information (pitch_data) (processing S102).
[0087]
As a result, the image signal from the signal processing unit 502 is output from the line image sensor 401 shown in FIG. 7, and the virtual sampling position information (pitch_data) from the calculation unit 508 is synchronized with each pixel of the image signal. Is output.
[0088]
FIG. 9 shows an example of the configuration of an image reading apparatus that can eliminate the influence of uneven arrangement intervals of image sensor chips using the line image sensor 401 according to the first embodiment shown in FIG.
[0089]
In FIG. 9, 401 is a line image sensor having the configuration shown in FIG. An image signal output from the line image sensor 401 is input to an A / D conversion unit 402. The A / D conversion unit 402 converts an analog image signal output from the image sensor 401 into digital image data. Although not shown, analog signal processing such as amplification and level conversion required before the conversion is performed. The part is also included.
[0090]
A shading correction unit 403 normalizes the output of the image sensor 401 with a black reference plate reading value or a reading value when the illumination light source is turned off as a black reference value and a white reference plate reading value as a white reference value. Correction of offset output in the dark, sensitivity variations for each pixel of the sensor, and illumination variations due to optical components such as a light source and a lens. Since this shading operation is a known technique, further explanation is omitted here.
[0091]
Reference numeral 404 denotes an interpolation calculation processing unit, which performs a calculation to correct a displacement between the image sensor sensor chips in accordance with virtual sampling position information (pitch_data) appropriately output from the image sensor 401 as the image reading progresses. A detailed description of the interpolation calculation unit 404 will be described later.
[0092]
Reference numeral 405 denotes an image processing unit that performs various image processing operations as an image reading apparatus, and performs known processes such as image filtering, scaling (resolution conversion), and binarization. Since the operation relating to this block is not directly related to the present invention, further explanation is omitted.
[0093]
The image signal read by the image sensor 401 and processed by each block is finally used by a subsequent processing unit (not shown) via the image processing unit 405. For example, when an image reading apparatus using the line image sensor 401 according to the present invention is applied to a facsimile apparatus, it is recorded and output by a plotter in the case of a copying machine as image data to be transmitted to a partner apparatus. As image data, if it is a scanner device, it is used as image data transferred to a host device such as a personal computer.
[0094]
FIG. 10 shows a block configuration of the interpolation calculation processing unit 404.
[0095]
  In the figure, a LUT (Look Up Table) 610 is a calculation required to perform an actual correction calculation operation according to virtual sampling position information (pitch_data) output from the calculation unit 508 of the image sensor 401.coefficientIs output to the multipliers 605, 606, 607 and 608.
[0096]
The multipliers 605, 606, 607, and 608 receive outputs from D-FFs (flip-flops) 604, 603, 602, and 601, respectively, and multiply the input values by the operation coefficient from the LUT 610. The result is output to the adder 609. The adder 609 adds the values input from the multipliers 605, 606, 607, and 608 and outputs the result as an image signal to the image processing unit 405.
[0097]
D-FFs (flip-flops) 604, 603, 602, and 601 are D-FFs having the same configuration, and delay the image signal from the shading correction unit 403 by one pixel clock to thereby multiply the multipliers 605, 606, 607. And 608 are generated for the respective output terms. In the example of FIG. 3, in a state where the pixel value A (N) is stored in the D-FF 604, the pixel value B (1) is stored in the D-FF 603 and B (2 is stored in the D-FF 602. ), The pixel value B (3) is stored in the D-FF 601.
[0098]
As a method of determining the calculation coefficient output by the LUT 610, there is a technique using a cubic function convolution method described on page 9 of “Image data scaling processing device” described in Japanese Patent Publication No. 8-28810. Applicable.
[0099]
In this case, the pixel at the actual sampling position referred to for calculating the pixel value of the pixel at the virtual sampling position varies depending on the sign of the virtual sampling position information (pitch_data).
[0100]
  That is, when the sign of pitch_data is positive, in the example of FIG. 3, the arrangement interval data (chip_pitch_data) of the image sensor chip, that is, (D−d)./ DIs positive and corresponds to the case of the boundary pixel interval D> pixel interval d in the upper part of FIG.
[0101]
Thus, for example, the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (1) are A (N−1), A (N), B (1) and B ( 2), and the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (2) are A (N), B (1), B (2), and B (3). ) And the pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (3), are B (1), B (2), B (3), and B (4). It becomes.
[0102]
  On the other hand, when the sign of pitch_data is negative, in the example of FIG. 3, the arrangement interval data (chip_pitch_data) of the image sensor chip, that is, (D−d)./ DThe sign of is negative and corresponds to the case of the boundary pixel interval D <pixel interval d in the lower part of the figure.
[0103]
Therefore, for example, the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (1) are A (N), B (1), B (2), and B (3). The pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (2), are B (1), B (2), B (3), and B (4). Yes, the pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (3), are B (2), B (3), B (4), and B (5). .
[0104]
The virtual sampling pixels after the virtual sampling pixel B ′ (4) in both cases where the upper boundary pixel interval D> pixel interval d or the lower boundary pixel interval D <pixel interval d. Since the value of pitch_data is 0, the pixel value of each of the pixel values coincides with the pixel values of the actual sampling pixels after the actual sampling pixel B (4).
[0105]
Therefore, the LUT 610 determines the position of the virtual sampling pixel and four consecutive real sampling pixels that are referred to in order to calculate the pixel value of the virtual sampling pixel whose pixel value is about to be obtained according to the sign of the value of the pitch_data. The relationship is logically shifted by one pixel. In addition, when the value of the pitch_data is 0, the LUT 610 stores the pixel value from the actual sampling pixel corresponding to the virtual sampling pixel for which a pixel value is currently obtained, and the value of the D-FF 602 or D-FF 603 As is, the calculation coefficient output to the multipliers 605, 606, 607, and 608 is switched so that the pixel value of the virtual sampling pixel is output from the adder 609. Specifically, in order to make the value of the D-FF 602 or D-FF 603 unchanged, the operation coefficient output to the multiplier 607 or the multiplier 606 is set to 1, and for other multipliers, 0 is set as the operation coefficient. Is output.
[0106]
In this way, by setting the virtual sampling position, calculating the virtual sampling data and using it as an image signal, it is possible to disperse the non-uniform pixel spacing that occurs at the boundary between the image sensor chips to the peripheral pixels. It is possible to eliminate the influence of the position error of the chip arrangement on the read image.
[0107]
Since the virtual sampling data is obtained from the actual sampling data, if the image sensor sensitivity unevenness and illumination optical system unevenness are not removed prior to the calculation, virtual sampling data including this will be obtained. Further, the above-described unevenness removal (shading correction) is structurally complicated and difficult, but in the image reading apparatus using the line image sensor 401 according to the first embodiment, the interpolation calculation processing unit 404 is used. Since these processes are performed in advance in the previous shading correction unit 403, such a problem does not occur.
[0108]
Next, a line image sensor according to a second embodiment of the present invention will be described.
[0109]
FIG. 11 shows a block configuration of a line image sensor 701 according to the second embodiment of the present invention.
[0110]
In the figure, reference numeral 802 denotes a photoelectric conversion cell array, which is an image sensor composed of a plurality of image sensor chips, which reads an original image sub-scanned by a sub-scanning mechanism (not shown) one main scanning line at a time for each pixel. A signal is output. The configuration of the photoelectric conversion cell array 802 is the same as that of the image sensor 201 shown in FIG. The configuration of the image sensor illustrated in FIG. 2 has already been described in detail in the description of the image reading device according to this embodiment described above, and here, the configuration of the photoelectric conversion cell array 802 is incorporated by using the description. The detailed description of is omitted.
[0111]
Reference numeral 801 denotes a drive control unit, which supplies a pixel clock PCLK indicating timing for each pixel supplied from a clock generation unit 708 of the image reading apparatus shown in FIG. 15 to be described later, and reading timing for each line of the photoelectric conversion cell array 802. The line synchronization clock LSYNC shown is given from the outside, and the photoelectric conversion cell array 802 is supplied with a drive control signal for controlling the output extraction of the sensor pixel, while the valid period and invalidity of the image signal output during the reading period of one line A gate signal L_gate indicating a period and a signal CLOCK which is the pixel clock PCLK itself are output. A signal processing unit 803 converts and amplifies the output of the photoelectric conversion cell array 802 into a voltage signal of a predetermined level.
[0112]
Reference numeral 806 denotes a storage unit that stores data of arrangement intervals of the sensor chips constituting the photoelectric conversion cell array 802. Here, an example of the data configuration inside the storage unit 806 is shown in FIG. In the figure, each of the chip arrangement intervals of the image sensor chips 1 to n arranged in a line in order to form the photoelectric conversion cell array 802 is arranged in the storage section 1806 to the storage addresses 1 to (n−1). Data (corresponding to the boundary pixel interval D in FIG. 2) is sequentially stored as stored contents. The first address (address 0) of the storage unit 806 stores a value d, which is an original pixel interval in the image sensor chip, for convenience of operation. Needless to say, this value d is data corresponding to 63.5 μm in the case of the above-mentioned 400 DPI. The form of chip arrangement interval data to be stored may be arbitrary, but here, it is assumed that the data is normalized by the value d. That is, 0 is the same value as “d”, +0.2 if the interval is 20% greater than “d”, and −0.2 if the interval is 20% less than “d”.
[0113]
  A parallel / serial conversion unit 807 converts M (for example, M = 8) bit parallel output data from the storage unit 806 into a serial signal. Reference numeral 804 denotes an M frequency divider, which is used to output the image signal output from the photoelectric conversion cell array 802 output from the drive control unit 801./ InvalidL_gate signal indicating the periodIndicates invalidity of image signal output of photoelectric conversion cell array 802The clock signal obtained by dividing the CLOCK signal, which is the pixel clock PCLK itself, by M, that is, by the number of bits per address of the storage unit 806, only during the period during which the image signal output from the photoelectric conversion cell array 802 is invalid. Output M_clock.
[0114]
  The L_gate signal from the drive control unit 801 is input to the counter 805 as a reset, and the L_gate signal isThe validity of the image signal output of the photoelectric conversion cell array 802 is shown.From stateIndicates invalidIt is reset at the time when the state changes, that is, when the image signal output of the photoelectric conversion cell array 802 becomes invalid, and counting of the output clock M_clock of the M frequency divider 804 is started from that time. The count value output from the counter 805 is input to the storage unit 806 as an address.
[0115]
Thus, the address input to the storage unit 806 is incremented for each CLOCK signal for M cycles, and M-bit parallel data is output from the storage unit 806 for each CLOCK signal for M cycles. Become.
[0116]
The parallel data output from the storage unit 806 is input to the parallel / serial conversion unit 807. When the clock M_clock is input from the M divider 804, the parallel / serial conversion unit 807 latches the parallel data input from the storage unit 806, and the latched M-bit data is stored in one cycle of the CLOCK signal. One bit is output every time. As a result, the data stored in the storage unit 806 is input to the output selection unit 808 as a serial signal synchronized with the pixel CLK that is also a clock for taking out the output of the sensor pixel in the photoelectric conversion cell array 802.
[0117]
  An image signal output from the photoelectric conversion cell array 802 is input to the output selection unit 808 via the signal processing unit 803, a serial signal from the parallel / serial conversion unit 807 is input, and an L_gate signal is further output selected. It is input as a signal. The output selection unit 808 is a period during which an image signal output from the photoelectric conversion cell array 802 is valid, that is, an L_gate signal.Indicates that the image signal output of the photoelectric conversion cell array 802 is valid.In the period, the image signal from the signal processing unit 803 is selectively output, and the image signal output from the photoelectric conversion cell array 802 is invalid, that is, the L_gate signal.Indicates invalidity of the image signal output of the photoelectric conversion cell array 802.During the period, the arrangement interval data of each sensor chip as illustrated in FIG. 12 and the pixel interval in the sensor chip, which are sequentially read from the storage unit 806 and converted into a serial signal by the parallel / serial conversion unit 807. Select and output data.
[0118]
FIG. 13 shows a timing chart of the schematic operation of signal output selection in the image sensor 701.
[0119]
  In this figure, when the line synchronization signal LSYNC is input to the drive control unit 801, the drive control unit 801 outputs an L_gate signal in which the first half of the line synchronization signal LSYNC is H level and the second half is L level, and output selection is performed. The unit 808 receives the L_gate signalH levelIn the meantime, the serial image signal from the photoelectric conversion cell array 802 is output., L levelIn the meantime, the arrangement interval data as the storage contents of the storage unit 806 is output as a serial signal.
[0120]
As described above, data such as the arrangement interval between the sensor chips is converted into a serial signal, and is switched to the image signal and output to the outside during the invalid period of the image signal, thereby being stored in the storage unit 806 in the image sensor 701. Dedicated connection terminals for outputting data such as the arrangement interval between the sensor chips to the outside can be omitted, and accordingly, the number of external connection terminals of the image sensor 701 can be reduced, and high reliability of the entire apparatus can be achieved. Become.
[0121]
Next, a line image sensor according to a third embodiment of the present invention will be described.
[0122]
FIG. 14 shows a block configuration of a line image sensor 701 according to the third embodiment of the present invention.
[0123]
The configuration of the line image sensor 701 according to the third embodiment shown in FIG. 14 is substantially the same as the configuration according to the second embodiment shown in FIG. 11, and the corresponding components are denoted by the same reference numerals and described. Omitted.
[0124]
The configuration shown in FIG. 14 is different from the configuration shown in FIG. 11 in that the L_gate signal cannot be output from the drive control unit 801, and an output selection signal SEL is input from the outside instead of the L_gate signal. Is a point.
[0125]
  The output selection signal SEL is input to the M divider 804 instead of the L_gate signal, and the M divider 804 receives the output selection signal SEL.L level periodOnly in the meantime, a clock M_clock obtained by dividing the CLOCK signal, which is the pixel clock PCLK itself, by M, that is, the number of bits per address of the storage unit 806 is output.
[0126]
  The output selection signal SEL is input to the reset terminal of the counter 805 instead of the L_gate signal, and the counter 805 receives the output selection signal SEL.H levelEtL levelThe count is reset at the time of change, and counting of the output clock M_clock of the M frequency divider 804 is started from that time. The count value output from the counter 805 is input to the storage unit 806 as an address.
[0127]
  The output selection signal SEL is input to the output selection unit 808 as an output selection signal instead of the L_gate signal. The output selection unit 808 receives the output selection signal SEL.H levelIn the meantime, the image signal from the signal processing unit 803 is selectively output, and the output selection signal SELL levelIn the meantime, the arrangement interval data of each sensor chip as illustrated in FIG. 12 and the pixel interval in the sensor chip, which are sequentially read from the storage unit 806 and converted into a serial signal by the parallel / serial conversion unit 807. Select and output data.
[0128]
In this manner, data such as the arrangement interval between the sensor chips is converted into a serial signal, and is switched to the image signal and output to the outside in accordance with an instruction from the outside, thereby being stored in the storage unit 806 in the image sensor 701. The dedicated connection terminals for outputting data such as the arrangement interval between the sensor chips to the outside can be omitted, and the number of external connection terminals of the image sensor 701 can be reduced correspondingly, thereby improving the reliability of the entire apparatus. It becomes possible.
[0129]
FIG. 15 shows a configuration example of an image reading apparatus that can remove the influence of uneven arrangement intervals of image sensor chips using the line image sensor 701 according to the first or second embodiment shown in FIG. 11 or FIG. 14, respectively. .
[0130]
In FIG. 15, reference numeral 701 denotes a line image sensor having the configuration shown in FIG. 11 or FIG. A control unit 706 controls each unit of the image reading apparatus. The control unit 706 controls the selection circuit 707 to input an image signal output as a serial signal from the image sensor 701 to the A / D conversion unit 702 and store the storage unit 806 output as a serial signal from the image sensor 701. Data such as the arrangement interval of the image sensor chip as the contents is input to the seam correction unit 704 as necessary.
[0131]
An image signal output from the line image sensor 701 during reading of a document image is input to an A / D conversion unit 702. The A / D conversion unit 702 converts an analog image signal output from the image sensor 701 into digital image data. Although not shown, analog signal processing such as amplification and level conversion required before the conversion is performed. The part is also included.
[0132]
A shading correction unit 703 normalizes the output of the image sensor 701 using the black reference plate reading value or the reading value when the illumination light source is turned off as the black reference value and the white reference plate reading value as the white reference value. Correction of offset output in the dark, sensitivity variations for each pixel of the sensor, and illumination variations due to optical components such as a light source and a lens. Since this shading operation is a known technique, further explanation is omitted here.
[0133]
Reference numeral 704 denotes a seam correction unit, which performs an operation of correcting a displacement between a plurality of sensor chips constituting the image sensor 701. A detailed description of the seam correction unit 704 will be described later.
[0134]
Reference numeral 705 denotes an image processing unit that performs various image processing operations as an image reading apparatus, and performs known processes such as image filtering, scaling (resolution conversion), and binarization. Since the operation relating to this block is not directly related to the present invention, further explanation is omitted. The image signal read by the image sensor 701 and processed by each block is finally output from the image processing unit 705, and the output image signal is processed by a subsequent processing system. Specifically, it is recorded by a plotter, transmitted by facsimile, or filed.
[0135]
A clock generation unit 708 generates and supplies a clock, a synchronization signal, and the like necessary for each block.
[0136]
  With the above configuration, the control unit 706 controls the selection circuit 707 prior to starting the reading of the document to switch the output of the image sensor 701 to the seam correction unit 704, and the image sensor 701 has the first configuration shown in FIG. In the case of the image sensor according to the third embodiment, the output selection signal SEL input to the image sensor 701 is changed from the H level state to the L level state, and a serial signal (in the drawing) is received from the image sensor 701 in response to the change. The signal name ofchip_The storage contents of the storage unit 806 output as “pitch_data”, that is, the data such as the arrangement interval of each sensor chip as illustrated in FIG. 12 is stored in the storage unit 914 described later of the joint correction unit 704.
[0137]
If the image sensor 701 is the image sensor according to the second embodiment shown in FIG. 11, the storage unit 806 that is output as a serial signal from the image sensor 701 during the invalid period of the image signal in the reading cycle of one line. The storage content, that is, data such as the arrangement interval of each sensor chip as illustrated in FIG. 12 is stored in the storage unit 914 described later of the joint correction unit 704.
[0138]
As a result, the seam correction unit 704 has obtained information about the arrangement interval of each sensor chip constituting the image sensor 701 and the pixel interval in the sensor chip. Based on the information, the seam correction unit 704 obtains information from the image sensor 701. A seam correction process is performed on the image signal.
[0139]
Next, the configuration and operation of the seam correction unit 704 will be described. Prior to that, the operation of the seam correction unit 704 will be conceptually described with reference to FIG.
[0140]
In the same figure, it is assumed that the sensor chips 102a and 102b arranged adjacent to each other as shown in FIG. 2 are sensor chip A and sensor chip B, respectively, and the arrangement position error of these sensor chips is corrected. Yes.
[0141]
The sensor chip arrangement shown in FIG. 6A represents the actual arrangement of sensor chips in the image sensor, and is the same as that shown in FIG.
[0142]
The pixel interval shown in FIG. 2B indicates the pitch of the pixels formed in each image sensor chip, and is d within the image sensor chip and D at the boundary between the sensor chips. In the actual pixel position (actual sampling position) shown in FIG. 4C, the black dots indicate the locations where the pixels of the image sensor actually exist.
[0143]
Each of the centimeter chips A and B is composed of N pixels. In FIG. 5C, the last two pixels of the sensor chip A, A (N−1) and A (N), and the sensor chip. The first 9 pixels B (1), B (2), B (3), B (4), B (5), B (6), B (7), B (8) and B (9) The existence position is represented by black dots. Note that the actual sampling position means a position where a pixel actually exists.
[0144]
The pixel pitches in the same sensor chip are all “d”, and the pixel pitch at the sensor chip boundary, that is, the interval between A (N) and B (1) is “D”, which is slightly wider than “d”. Among the pixels regularly arranged at the interval “d”, there is a place with an interval “D” that is different from “d” at only one location, which causes various obstacles in image reading performance. That is, as described above, for example, when an oblique line on a document is read, a step is generated at the joint position of the sensor chip in the oblique line portion of the read image. Further, when a halftone document is read, moire generated due to the difference between the halftone dot pitch (spatial frequency) and the pixel pitch of the image sensor is disturbed at the joint position, and may appear as a vertical stripe.
[0145]
In order to prevent this, the virtual sampling points are set so that the pixel pitches are arranged at substantially equal intervals so that the image is not disturbed, and the output when it is assumed that the pixels exist at the virtual sampling positions, that is, The virtual sampling data may be regarded as an image signal. That is, the pitch error (Δd = D−d) that occurs at a stretch at the joint position may be divided into a plurality of minute amounts that do not disturb the image and be generated near the joint.
[0146]
Various methods for calculating virtual sampling data from actual sampling data (actual pixel output values) by calculation have been proposed in the past. For example, a method of “image data scaling processing device” described in Japanese Patent Publication No. 8-28810 is disclosed. Although described on the third page, for example, an interpolation operation based on a sampling theorem, which is called a cubic function convolution method, is a method with good accuracy.
[0147]
In FIG. 16D, the virtual sampling pixel position corresponding to the actual pixel position A (K) or B (K) (where K is an integer from 1 to N) shown in FIG. Alternatively, although expressed as B ′ (K) or the like, the difference “Δd = D−d” between the interval “D” and the interval “d” is divided into 8 parts so as to gradually eliminate pitch unevenness. A virtual sampling position is determined.
[0148]
That is, B ′ (1) is set at a position separated from A ′ (N) by (d ′ = d + (D−d) / 8), and B ′ (2) is the same as B ′ (1). And (d + (D−d) / 8) apart. Then, the virtual sampling position and the actual sampling position coincide with each other at the position B ′ (8), and the coincidence is continued as long as reading from the chip B continues.
[0149]
Thus, by setting the virtual sampling point and calculating the image data by calculation, the pitch error (Dd) that occurs at a stretch at the joint position is divided into a minute amount ((Dd) / 8). Therefore, the adverse effect on the read image can be removed.
[0150]
Based on the conceptual operation of the seam correction unit 704 described above, the configuration and operation of the seam correction unit 704 will be described with reference to FIG.
[0151]
In the figure, reference numeral 911 denotes a frequency divider, a pixel clock PCLK indicating the timing of each pixel, a line synchronization clock LSYNC indicating the reading timing of each line of the image sensor 701, and the validity of the input image signal in one line. A gate signal LGATE indicating a period is input from the clock generation unit 708, and in the LGATE assertion period, each time a pixel clock PCLK corresponding to the number of pixels held by each of a plurality of sensor chips constituting the image sensor 701 is pulsed. Assert the output of.
[0152]
Reference numeral 912 denotes an address counter. By counting the output of the frequency divider 911 over one line period, each pixel of the image sensor 701 is sequentially read from the top, and the image sensor chip number corresponding to the current read is addressed. (The signal name in the figure is chip_address). For example, if an image is currently read from a pixel formed on the fourth image sensor chip from the top, an address of 3 smaller by 1 is output (for the first image sensor chip, 0 address is output).
[0153]
  Reference numeral 914 denotes a storage unit which reads out and outputs the stored arrangement interval data of each image sensor chip according to the designation of the output address of the address counter 912 (signal names in the figure arechip_pitch_data).
[0154]
  The storage unit 914 receives a serial signal (from the image sensor 701 under the control of the control unit 706 as described above.chip_The data stored in the storage unit 806 output as “pitch_data”, that is, data on the pixel interval in the sensor chip and the arrangement interval of each sensor chip as illustrated in FIG. 12 is stored in advance.
[0155]
Reference numeral 913 denotes a pixel address counter that is reset by the output of the frequency divider 911 and counts the pixel clock PCLK. The pixel address counter 913 outputs an address signal indicating how many pixels from the top of the image sensor chip are being read (see FIG. The signal name inside is pixel_address).
[0156]
  Reference numeral 915 denotes image sensor chip arrangement interval data output from the storage unit 914 (pixel_address) in accordance with the pixel position address (pixel_address) in the chip output from the counter 913.chip_virtual sampling position information (distance from the actual sampling position) necessary for performing an operation on the pitch_data) and removing an image abnormality caused by an arrangement error of the image sensor chip (pitch_data). When the pixel being read out is the first pixel of the image sensor chip, the arrangement interval data output from the storage unit 914 (chip_A value close to (pitch_data) is output, and the value is reduced as reading progresses, and approaches 0. This operation is as described above with reference to FIG.
[0157]
  The processing procedure of this calculation operation will be described with reference to FIG. In the figure, the calculation unit 915 determines whether the pixel position address (pixel_address) input from the counter 913 is smaller than 8 (determination S201), and when it is 8 or more (No in determination S201), the virtual sampling position information(pitch_data) Is substituted (output) (step S203). If it is smaller than 8 (Yes in judgment S101), the virtual sampling position information (pitch_data), (chip_Pitch_data × (7-pixel_address) / 8) is substituted (output) (processing S202).
[0158]
  The LUT (Look Up Table) 910 is virtual sampling position information output from the calculation unit 915 (pitch_data), The number of calculation examples necessary for performing the actual correction calculation operation is output to the multipliers 905, 906, 907, and 908.
[0159]
The multipliers 905, 906, 907, and 908 receive the outputs from the D-FFs (flip-flops) 904, 903, 902, and 901, respectively, and multiply the input values by the operation coefficient from the LUT 910. The result is output to the adder 909. The adder 909 adds the values input from the multipliers 905, 906, 907, and 908, and outputs the result as an image signal to the image processing unit 705.
[0160]
D-FFs (flip-flops) 904, 903, 902, and 901 are D-FFs having the same configuration, and multipliers 905, 906, 907 are provided by delaying the image signal from the shading correction unit 703 by one pixel clock. And 908, the operation terms to be output are generated. In the example of FIG. 16, in a state where the pixel value A (N) is stored in the D-FF 904, the pixel value B (1) is stored in the D-FF 903 and B (2 is stored in the D-FF 902. ), The pixel value B (3) is stored in the D-FF 901.
[0161]
As a method for determining the calculation coefficient output by the LUT 910, there is a technique using the cubic function convolution method described on page 9 of “Image data scaling processing device” described in Japanese Patent Publication No. 8-28810. Applicable.
[0162]
  In that case, the pixel at the actual sampling position referred to for calculating the pixel value of the pixel at the virtual sampling position is the virtual sampling position information (pitch_data) Depending on the sign.
[0163]
  Nasuchipitch_data16 is positive, in the example of FIG. 16, the arrangement interval data of the image sensor chip (chip_pitch_data), that is, the sign of (D−d) / d is positive. Thus, for example, the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (1) are A (N−1), A (N), B (1) and B ( 2), and the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (2) are A (N), B (1), B (2), and B (3). ) And the pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (3), are B (1), B (2), B (3), and B (4). It becomes.
[0164]
  on the other hand,pitch_dataIf the sign of the image sensor chip is negative, in the example of FIG.chip_pitch_data), that is, the sign of (D−d) / d is negative. Therefore, for example, the pixels at the actual sampling position referred to for calculating the pixel value of the virtual sampling pixel B ′ (1) are A (N), B (1), B (2), and B (3). The pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (2), are B (1), B (2), B (3), and B (4). Yes, the pixels at the actual sampling position, which are referred to for calculating the pixel value of the virtual sampling pixel B ′ (3), are B (2), B (3), B (4), and B (5). .
[0165]
  In the same figure, the pixel values of the virtual sampling pixels after the virtual sampling pixel B ′ (8) are as follows:pitch_dataIs equal to the pixel value of the actual sampling pixel after the actual sampling pixel B (8).
[0166]
  Therefore, LUT 910pitch_dataAccording to the positive / negative of the value of, the sequential relationship between the four actual sampling pixels to be referred to in order to calculate the pixel value of the virtual sampling pixel whose pixel value is to be obtained and the positional relationship between the virtual sampling pixels is logically 1 Shift pixels. In addition, the LUT 910pitch_dataWhen the value of 0 is 0, the value of D-FF 902 or D-FF 903 in which the pixel value from the actual sampling pixel corresponding to the virtual sampling pixel for which the pixel value is to be obtained is stored is left as it is. The calculation coefficient output to the multipliers 905, 906, 907, and 908 is switched so that the pixel value of the pixel is output from the adder 909. Specifically, in order to make the value of D-FF 902 or D-FF 903 unchanged, the arithmetic coefficient output to the multiplier 907 or the multiplier 906 is set to 1, and the arithmetic coefficient for other multipliers is set to 0. Is output.
[0167]
In this way, by setting the virtual sampling position, calculating the virtual sampling data and using it as an image signal, it is possible to disperse the non-uniform pixel spacing that occurs at the boundary between the image sensor chips to the peripheral pixels. It is possible to eliminate the influence of the position error of the chip arrangement on the read image.
[0168]
Since the virtual sampling data is obtained from the actual sampling data, if the image sensor sensitivity unevenness and illumination optical system unevenness are not removed prior to the calculation, virtual sampling data including this will be obtained. Further, it is difficult to remove the unevenness (shading correction) described above, which is structurally complicated and difficult. However, in the image reading apparatus using the line image sensor according to the second or third embodiment described above, Since these processes are performed in advance in the shading correction unit 703 before the joint correction unit 704, such a problem does not occur.
[0169]
【The invention's effect】
According to the present invention, at each boundary between the image sensor chips constituting the line image sensor, a difference in pixel spacing between the physical pixel arrangement of the line image sensor in the vicinity of the boundary pixel and the virtual pixel arrangement. Is reduced at a predetermined rate as the pixels are separated from each boundary, thereby distributing the difference between the arrangement interval of the boundary pixels and the pixel interval in each image sensor chip to the peripheral pixels of the boundary pixels. Therefore, an effect that it is possible to remove the adverse effect on the image due to the displacement of the image sensor chips is obtained.
[Brief description of the drawings]
FIG. 1 is a block diagram of an image reading apparatus according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an arrangement of image sensor chips in the image sensor.
FIG. 3 is a diagram for conceptually explaining joint correction processing of an image sensor chip.
FIG. 4 is a diagram illustrating a detailed configuration of a seam correction unit.
FIG. 5 is a diagram illustrating an example of stored contents of a storage unit of a seam correction unit.
FIG. 6 is a flowchart illustrating a calculation procedure in a calculation unit of the seam correction unit.
FIG. 7 is a diagram showing a block configuration of the image sensor according to the first embodiment of the present invention.
FIG. 8 is a flowchart showing a calculation procedure in a calculation unit of the image sensor according to the first embodiment of the present invention.
FIG. 9 is a block diagram of an image reading apparatus using the image sensor according to the first embodiment of the present invention.
FIG. 10 is a diagram illustrating a detailed configuration of an interpolation calculation processing unit.
FIG. 11 is a diagram showing a block configuration of an image sensor according to a second embodiment of the present invention.
FIG. 12 is a diagram illustrating an example of stored contents of a storage unit of an image sensor.
FIG. 13 is a timing chart for explaining a signal output selection operation in the image sensor according to the second embodiment of the present invention.
FIG. 14 is a diagram showing a block configuration of an image sensor according to a third embodiment of the present invention.
FIG. 15 is a diagram showing a block configuration of an image reading apparatus using an image sensor according to a second or third embodiment of the present invention.
16 is a view different from FIG. 3 for conceptually explaining the seam correction processing of the image sensor chip.
FIG. 17 is a diagram illustrating a detailed configuration of a seam correction unit.
FIG. 18 is a flowchart showing a calculation procedure in a calculation unit of a seam correction unit of the image reading apparatus using the image sensor according to the second or third embodiment of the present invention.
[Explanation of symbols]
101 Substrate material
101a, 101b Image sensor chip
103 aperture
201, 401, 701 Image sensor
202, 402, 702 A / D converter
203, 403, 703 Shading correction unit
204, 704 Seam correction unit
205, 405, 705 Image processing unit
206, 708 clock generator
301, 302, 303, 304, 601, 602, 603, 604, 901, 902, 903, 904 D-flip flop
305, 306, 307, 308, 605, 606, 607, 608, 905, 906, 907, 908 Multiplier
309, 609, 909 adder
310, 610, 910 LUT (Look Up Table)
311 504 911 divider
312, 505, 912 Address counter
313, 507, 805, 913 counter
314, 506, 806, 914 storage unit
315, 508, 915 arithmetic unit
404 Interpolation calculation processing unit
501 Photoelectric converter
502, 803 Signal processor
503, 801 Drive control unit
706 Control unit
707 selection circuit
802 Photoelectric conversion cell array
804 1 / M frequency divider
807 Parallel / serial converter
808 Output selector

Claims (1)

A document image to be sub-scanned is scanned one main scanning line at a time by a line image sensor configured by arranging a plurality of image sensor chips composed of a plurality of pixels arranged one-dimensionally at a pixel interval d in the main scanning direction. an image reading apparatus for outputting an image signal of the image Motogoto that make up the line image sensor reads,
Storage means for preliminarily storing information on the pixel interval d and the boundary pixel interval which is the pixel arrangement interval at each boundary of each image sensor chip ;
Image sensor chips A and B are sequentially arranged adjacent to each other in a plurality of image sensor chips constituting the line image sensor, and the boundary stored in the storage unit for the image sensor chips A and B Assuming that the pixel interval is the boundary pixel interval D, the predetermined number (a) of pixels at the head of the image sensor chip B is the image sensor chip regardless of the physical pixel arrangement of the a pixels. By assuming that the pixels are arranged at equal intervals of (d + (D−d) / (a)) from the last pixel of A, a virtual pixel arrangement of each pixel constituting the line image sensor is determined,
Of each pixel constituting the image sensor,
For a pixel in which the position on the virtual pixel arrangement matches the position on the physical pixel arrangement in the image sensor, an image signal output from the pixel is directly output as an image signal for the pixel,
As for a pixel in which the position on the virtual pixel arrangement and the position on the physical pixel arrangement in the image sensor do not match, a pixel located on the physical pixel arrangement around the pixel on the virtual pixel arrangement And a correction means for outputting an image signal calculated by a predetermined approximate calculation method from the positional relationship between the peripheral pixel and the pixel and the image signal output from the peripheral pixel as an image signal for the pixel. An image reading apparatus characterized by the above.

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