JP3778778B2 - Semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a semiconductor device that realizes a hybrid integrated circuit device having a small size by reducing bonding by a thin metal wire.
[0002]
[Prior art]
Conventionally, in a hybrid integrated circuit device set in an electronic device, a conductive pattern is formed on, for example, a printed circuit board, a ceramic substrate, or a metal substrate, on which an active element such as an LSI or a discrete TR, a chip capacitor, a chip Passive elements such as resistors or coils are mounted. The conductive pattern and the element are electrically connected to realize a circuit having a predetermined function.
[0003]
As an example of a hybrid integrated circuit device, an audio circuit is shown in FIG.
[0004]
In FIG. 12, the outermost rectangular line is the mounting substrate 1 whose surface is insulated at least. And the conductive pattern 2 which consists of Cu is affixed on this. The conductive pattern 2 includes an external extraction electrode 2A, a wiring 2B, a die pad 2C, a bonding pad 2D, an electrode 4 to which the passive element 3 is fixed.
[0005]
On the die pad 2C, a TR, a diode, a composite element, an LSI, or the like is fixed in a bare chip shape via solder. The electrodes on the fixed chip and the bonding pads 2D are electrically connected through the fine metal wires 5A, 5B, and 5C. This metal thin wire is generally classified into small signal and large signal, and the small signal portion employs an Au wire 5A or Al wire composed of about 40 μmφ, and the large signal portion comprises an Au wire or Al wire of about 100 to 300 μmφ. It has been adopted. In particular, since a large signal has a large wire diameter, 150 μmφ Al wire 5B and 300 μmφ Al wire 5C are selected in consideration of cost.
[0006]
Further, the power TR6 for flowing a large current is fixed to the heat sink 7 on the die pad 2C in order to prevent the temperature of the chip from rising.
[0007]
The wiring 2B is extended to various places in order to use the external extraction electrode 2A, the die pad 2C, the bonding pad 2D, and the electrode 4 as a circuit. In addition, jumping lines 8A and 8B are employed when the wirings intersect due to the position of the chip and the way the wirings extend.
[0008]
[Problems to be solved by the invention]
In FIG. 12, a region surrounded by a circle is a portion where the power TR6 fixed to the heat sink 7 and a jumping line 8C arranged in the vicinity thereof are arranged. This portion is shown in FIG. This illustrates the connection between the first bonding pad 9A and the second bonding pad 9B with the jumping wire 8C. As shown in the figure, the jumping wire 8C is attached to the head of the capillary 10, and the wire guide 11 This jumping line 8C is supplied.
[0009]
However, as shown in the drawing, since the wire guide 11 hits the heat sink 7 or the power TR 6 during the second bonding, the interval between the second bonding pad 9B and the heat sink 7 (or the die pad 2C) is increased, the bonding order and the jumping are performed. There was also a problem that restrictions were imposed on the direction of drawing out the line.
[0010]
Therefore, the substrate of the hybrid integrated circuit device is expanded, and the bonding process is complicated.
[0011]
[Means for Solving the Problems]
The present invention has been made in view of the above-described problems. First, the wiring includes electrically separated wiring and an insulating resin that exposes and integrally supports the back surface of the wiring, and includes two regions of the wiring. The problem is solved by providing an insulating film on the back surface of the conductive path so that is exposed.
[0012]
Second, it includes electrically separated wiring and an insulating resin that exposes and integrally supports the back surface of the wiring, and two regions of the wiring are provided to be recessed from other wiring regions. It will be solved by.
[0013]
Third, an electrically separated wiring and an insulating resin that exposes and integrally supports the back surface of the wiring are provided, and two regions of the wiring are provided to protrude from the back surface of the insulating resin. It will be solved.
[0014]
Fourth, the die pad and the wiring electrically separated by the separation groove, the semiconductor chip fixed on the die pad, the semiconductor chip is covered and the separation groove between the die pad and the wiring is filled and the This is solved by providing an insulating resin that exposes the back surface of the conductive path and supports it integrally, and an insulating coating is provided so that at least two regions of the wiring are exposed.
[0015]
Fifth, the die pad and the wiring electrically separated by the separation groove, the semiconductor chip fixed on the die pad, the semiconductor chip is covered and the separation groove between the die pad and the wiring is filled and the This is solved by providing an insulating resin that exposes the back surface of the conductive path and supports the conductive path integrally, and the two areas of the wiring are provided to be recessed from the area of the other wiring.
[0016]
Sixth, the die pad and the wiring electrically separated by the separation groove, the semiconductor chip fixed on the die pad, the semiconductor chip is covered, and the separation groove between the die pad and the wiring is filled. This problem is solved by providing an insulating resin that exposes and integrally supports the back surface of the conductive path, and the two regions of the wiring are provided so as to protrude from the back surface of the insulating resin.
[0017]
Since a semiconductor device molded in an insulating resin is employed as the jumping wire, wire bonding is not necessary. Moreover, since only the back surface of the wiring is exposed, it can be brought close to the heat sink and the power TR. Therefore, the size of the mounting substrate which is one configuration of the hybrid integrated circuit device can be reduced.
[0018]
Further, by providing the semiconductor device incorporating the semiconductor chip with wiring that performs the function of the jumping line, the number of bonding to the mounting substrate and the number of die bonding of the semiconductor chip can be reduced, and the number of assembly steps can be greatly reduced.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
The present invention relates to a semiconductor device capable of simplifying an assembly process in a hybrid integrated circuit device, and more particularly to a semiconductor device capable of reducing the bonding of fine metal wires and die bonding of semiconductor elements.
In this embodiment, the conductive path is a conductive member built in the circuit device. For example, referring to FIG. 10B, the conductive path is arranged on the die pad 1, the bonding pads 2, 3, and the right side thereof. Included wiring.
The wiring is one form of a conductive path built in the circuit device, and a plurality of contact portions 26A and 26B are provided on the back surface as shown in FIG.
Furthermore, the conductive pattern is patterned on the surface of the mounting substrate 21, for example, referring to FIG.
[0020]
Generally, in a hybrid integrated circuit device, an electronic circuit is constituted by various circuit elements, and an active element such as a TR chip, an IC chip or an LSI chip, and a passive element such as a chip capacitor or a chip resistor are mounted as necessary. These circuit elements are electrically connected to a conductive pattern formed on the mounting substrate. Further, in order to realize as a circuit, wiring is provided in the conductive path, and the circuit elements are electrically connected via a brazing material, a conductive ball, a solder ball, a conductive paste, or a fine metal wire.
[0021]
In the present invention, a packaged wiring is used in place of a thin metal wire functioning as a jumping wire, and the crossover portion and a heat sink (or power TR) arranged in the vicinity thereof can be arranged close to each other. . (See Figure 1)
In addition, the jumping line is packaged in advance so that the crossover portion and the heat sink (or power TR) disposed in the vicinity thereof can be arranged close to each other. (See Figure 2)
Now, a first embodiment will be described with reference to FIG. A rectangle indicated by a thick line indicates the semiconductor device 20 of the present invention, and a region surrounded by a wavy line around the semiconductor device 20 is a mounting substrate 21 employed in the hybrid integrated circuit device. The semiconductor device 20 is formed by supporting and sealing three wirings 23 </ b> A to 23 </ b> C with an insulating resin 24. As apparent from the manufacturing method of FIGS. 3 to 7, the back surface of the wiring 23 is exposed from the insulating resin 24, and therefore, the back surface of the semiconductor device 20 is covered with the insulating coating 25. At a position indicated by a symbol 26, at least a part of the wiring 23 is exposed from the insulating film 25 and is electrically connected to the wiring 27 on the mounting substrate 21.
[0022]
Since the conductive patterns 28 </ b> A to 28 </ b> D of the mounting substrate 21 extend vertically with respect to the paper surface, the insulating film 25 is provided, so that the wirings 23 </ b> A to 23 </ b> C function as jumping lines.
[0023]
Reference numeral 29 denotes a die pad provided on the mounting substrate 21, and reference numeral 30 denotes a heat sink fixed on the die pad 29. Reference numeral 31 denotes a power TR fixed to the heat sink 30.
[0024]
Conventionally, as shown in FIG. 13, the bonding pad 9B and the die pad 2C have to be sufficiently separated in order to employ an apparatus for bonding the fine metal wire 8C, particularly the capillary 10 and the wire guide 11.
[0025]
However, since the present invention uses a package in which the wiring 23 functioning as a jumping line is sealed with an insulating resin 24, it is not necessary to take the above-described separation distance into consideration at all.
[0026]
Further, the contact portions 26A and 26B of the wiring 23C are located at both ends of the wiring, but it is sufficient that the conductive pattern 28 on the mounting substrate 21 side passes between them. Good. In the wiring 23A, an example is shown in which contacts are provided at three locations.
Next, a second embodiment will be described with reference to FIG. Here, a thin metal wire 32 is employed as a jumping wire. The thin metal wires 32A to 32C that electrically connect the bonding pads 33A to 33F and the bonding pads 33A to 33B, 33C to 33D, and 33E to 33F are embedded with the insulating resin 24 to constitute the semiconductor device 20.
[0027]
Unlike FIG. 1, since only the bonding pad is sealed with an insulating resin, there is an advantage that the wirings 28A to 28D can be passed through the back surface of the semiconductor device without using the insulating film 25 of FIG. Have.
Description of Method for Manufacturing Semiconductor Device 20 Next, a method for manufacturing the semiconductor device 20 will be described with reference to FIGS.
[0028]
First, as shown in FIG. 3, a sheet-like conductive foil 60 is prepared. The conductive foil 60 is selected in consideration of the adhesiveness, bonding property, and plating property of the brazing material. As the material, a conductive foil mainly composed of Cu, a conductive foil mainly composed of Al, or Fe is used. A conductive foil made of an alloy of -Ni, an Al-Cu laminate, an Al-Cu-Al laminate, or the like is employed.
[0029]
The thickness of the conductive foil is preferably about 35 μm to 300 μm in consideration of later etching, and here, a copper foil of 70 μm (2 ounces) is employed. However, basically 300 μm or more and 10 μm or less are good. As will be described later, it is only necessary that the separation groove 61 shallower than the thickness of the conductive foil 60 can be formed.
[0030]
In addition, the sheet-like conductive foil 60 is prepared by being wound in a roll shape with a predetermined width, and this may be conveyed to each step described later, or a conductive foil cut into a predetermined size is prepared, You may convey to each process mentioned later. (See Figure 3 above)
Subsequently, there is a step of removing the conductive foil 60 excluding at least the region to be the wiring 51 thinner than the thickness of the conductive foil 60.
[0031]
First, a photoresist (etching resistant mask) PR is formed on the Cu foil 60, and the photoresist PR is patterned so that the conductive foil 60 excluding the region to be the wiring 51 is exposed (see FIG. 4 above). Then, etching may be performed through the photoresist PR.
[0032]
The depth of the separation groove 61 formed by etching is, for example, 50 μm, and its side surface is a rough surface, so that the adhesiveness with the insulating resin 50 is improved.
[0033]
Further, the side walls of the separation groove 61 have different structures depending on the removing method. This removal process can employ wet etching, dry etching, laser evaporation, and dicing. Moreover, you may form with a press. In the case of wet etching, ferric chloride or cupric chloride is mainly used as the etchant, and the conductive foil is dipped in the etchant or showered with the etchant. Since wet etching is generally non-anisotropic, the side surface has a curved structure as shown in FIG. 5B.
[0034]
In the case of dry etching, etching can be performed anisotropically or non-anisotropically. At present, it is said that Cu cannot be removed by reactive ion etching, but it can be removed by sputtering. Etching can be anisotropic or non-anisotropic depending on sputtering conditions.
[0035]
Further, in the laser, the separation groove can be formed by direct laser light irradiation. In this case, the side surface of the separation groove 61 is formed to be straight.
[0036]
In FIG. 5, instead of the photoresist PR, a conductive film resistant to the etching solution may be selectively coated. If the conductive film is selectively deposited on the conductive path, this conductive film becomes an etching protective film, and the separation groove can be etched without employing a resist. Possible materials for this conductive film are Ni, Ag, Au, Pt, Pd, and the like. In addition, these corrosion-resistant conductive films have the feature that they can be used as they are as die pads and bonding pads.
[0037]
For example, the Ag coating adheres to Au and also to the brazing material. Therefore, if the Au coating is coated on the back surface of the chip, the chip can be thermocompression bonded to the Ag coating on the conductive path 51 as it is, and the chip can be fixed via a brazing material such as solder. Further, since an Au fine wire can be adhered to the Ag conductive film, wire bonding is also possible. Accordingly, there is an advantage that these conductive films can be used as they are as die pads and bonding pads. (See Figure 5 above)
Subsequently, as shown in FIG. 6, there is a step of attaching an insulating resin 50 to the Cu foil 60 and the separation groove 61 to be the wiring 51. This can be realized by transfer molding, injection molding, or dipping. As the resin material, a thermosetting resin such as an epoxy resin can be realized by transfer molding, and a thermoplastic resin such as polyimide resin or polyphenylene sulfide can be realized by injection molding.
[0038]
In the present embodiment, the thickness of the insulating resin coated on the surface of the conductive foil 60 is adjusted so as to cover about 100 μm. This thickness can be increased or decreased in consideration of strength.
[0039]
The feature of this step is that the conductive foil 60 to be the wiring 51 becomes a support substrate until the insulating resin 50 is covered. For example, in the case where a printed board or a flexible sheet is used, a conductive path is formed by using a support board (printed board or flexible sheet) that is not originally required. In the present invention, the conductive foil 60 serving as a support board is It is a material necessary as a conductive path. Therefore, there is a merit that the work can be performed with the constituent materials omitted as much as possible, and the cost can be reduced.
[0040]
Further, since the separation groove 61 is formed shallower than the thickness of the conductive foil, the conductive foil 60 is not individually separated as the wiring 51. Accordingly, the sheet-like conductive foil 60 can be handled as one body, and particularly when an insulating resin is molded, it has a feature that the work of transporting to the mold and mounting to the mold becomes very easy.
[0041]
Subsequently, there is a step of chemically and / or physically removing the back surface of the conductive foil 60 and separating it as the wiring 51. Here, this removal step is performed by polishing, grinding, etching, laser metal evaporation, or the like.
[0042]
In the experiment, the entire surface is cut by about 30 μm by a polishing apparatus or a grinding apparatus, and the insulating resin 50 is exposed from the separation groove 61. In addition, an insulating coating RF is formed on the back surface in order to allow the wiring on the mounting substrate to pass down. As a result, the conductive paths 51 having a thickness of about 40 μm are separated. (See Figure 7 above)
Further, as shown in FIG. 8, a structure in which one region of the wiring 51 is recessed to a depth at which the wiring on the mounting substrate side can pass may be employed. In this case, the contact portion may be covered with a photoresist or the like, and the recess portion may be exposed to be etched.
[0043]
Furthermore, as shown in FIG. 9, the contact portion of the wiring 51 may protrude from the back surface of the insulating resin 50. For example, in FIG. 6, when an etching-resistant mask is formed in the contact portion and the exposed wiring is etched, the structure shown in FIG. 9 is obtained.
[0044]
Finally, a conductive material such as solder is deposited on the exposed contact portion as necessary to complete the semiconductor device.
[0045]
In this manufacturing method, only the wiring is packaged, but a semiconductor element and a passive element may be mounted as shown in FIGS. Further, the semiconductor device may be arranged in a matrix as a unit.
[0046]
And when arrange | positioning at matrix form, after isolate | separating a conductive path, it isolate | separates each with a dicing apparatus.
[0047]
With the above manufacturing method, a semiconductor device in which the wiring 51 is embedded in the insulating resin 50 can be realized.
[0048]
This manufacturing method is characterized in that the insulating resin 50 can be used as a support substrate and the wiring 51 can be separated. The insulating resin 50 is a necessary material for embedding the wiring 51 and does not require an unnecessary support substrate. Therefore, it has the characteristics that it can be manufactured with a minimum amount of material and cost can be reduced.
[0049]
Next, the semiconductor device of FIG. 2 will be briefly described. Since it is substantially the same as the previous description, it demonstrates using FIGS. In this semiconductor device, since the bonding pad is formed, the photoresist PR shown in FIG. 4 is formed in a portion corresponding to the bonding pad. Then, as shown in FIG. 5, etching is performed through the photoresist PR. At this stage, parts other than the bonding pad are half-etched. Then, after that, a fine metal wire is connected to the bonding pad and molded using an insulating resin as shown in FIG. Then, as shown in FIG. 7, the Cu foil on the back surface may be removed to separate the bonding pads.
[0050]
In FIG. 6, a plurality of semiconductor devices are molded at once with the insulating resin 50. However, the interval between the separation grooves 61 may be widened, and each one may be individually molded.
Furthermore, as shown in FIGS. 10 and 11, the circuit elements may be molded together. Similar to the above description, description will be made with reference to FIGS. In this semiconductor device, in addition to the bonding pads, wirings, die pads, and the like are formed. Therefore, the photoresist PR shown in FIG. 4 is formed at portions corresponding to the conductive paths such as the bonding pads, wirings, and die pads. Then, as shown in FIG. 5, etching is performed through the photoresist PR. At this stage, parts other than the bonding pad, die pad and wiring are half-etched. After that, the semiconductor element is fixed to the die pad, and further, a fine metal wire is connected to the bonding pad. And it molds using insulating resin like FIG. 6, removes Cu foil of a back surface like FIG. 7, and a conductive path is isolate | separated.
[0051]
【The invention's effect】
As is clear from the above description, in the present invention, since a semiconductor device molded in an insulating resin is employed as a jumping wire, the number of wire bondings on the mounting substrate can be reduced. In addition, the semiconductor device can be disposed in the vicinity of the heat sink or the power TR. Therefore, the size of the mounting substrate which is one configuration of the hybrid integrated circuit device can be reduced.
[0052]
In addition, by providing the semiconductor device having the semiconductor chip built therein with the wiring functioning as the jumping line, the number of bonding to the mounting substrate and the number of die bonding of the semiconductor chip can be reduced, and the number of assembly processes can be greatly reduced.
[Brief description of the drawings]
FIG. 1 illustrates a semiconductor device of the present invention.
FIG. 2 illustrates a semiconductor device of the present invention.
FIG. 3 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 4 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 5 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 6 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 7 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 8 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 9 is a diagram illustrating a method for manufacturing a semiconductor device of the present invention.
FIG. 10 is a diagram illustrating a semiconductor device of the present invention.
FIG. 11 illustrates a semiconductor device of the present invention.
FIG. 12 is a diagram illustrating a conventional hybrid integrated circuit device.
FIG. 13 is a diagram illustrating a conventional problem.
[Explanation of symbols]
20 Semiconductor Device 21 Mounting Board 23 Wiring 24 Insulating Resin 25 Insulating Coating 26 Contact Portion 27 Wiring on Mounting Board

Claims (11)

An electrically separated wiring; an insulating resin that exposes and integrally supports the back surface of the wiring; and an insulating film that covers the back surface of the insulating resin from which the wiring is exposed.
At least two back surfaces of the wiring are exposed from the insulating film,
The circuit device according to claim 1, wherein a side surface of the wiring is a curved surface .   The circuit device according to claim 1, wherein a back surface of the wiring is recessed and exposed from a back surface of the insulating resin.   A plurality of bonding pads; a thin metal wire that connects the bonding pads; and an insulating resin that exposes a back surface of the bonding pad to cover and integrally support the fine metal wire and the bonding pad. A circuit device characterized. The circuit device according to claim 3 , wherein a side surface of the bonding pad is a curved surface. A conductive path electrically separated by a separation groove, a semiconductor chip electrically connected to the conductive path, and a semiconductor chip that covers the semiconductor chip and is filled in the separation groove and exposes the back surface of the conductive path. Comprising an insulating resin to be supported on, and an insulating film covering the back surface of the insulating resin from which the conductive path is exposed,
The conductive path includes a die pad to which the semiconductor chip is fixed, and a wiring that is not connected to the semiconductor chip,
A circuit device, wherein at least two back surfaces of the wiring are exposed from the insulating film. 6. The circuit device according to claim 5 , wherein a back surface of the conductive path is exposed to be recessed from a back surface of the insulating resin. 6. The circuit device according to claim 5 , wherein a side surface of the conductive path is a curved surface. A mounting substrate; a conductive pattern formed on a surface of the mounting substrate; and a circuit device fixed to the conductive pattern.
The circuit device includes an electrically separated wiring, an insulating resin that exposes and integrally supports a back surface of the wiring, and an insulating film that covers the back surface of the insulating resin from which the wiring is exposed. And at least two places where the back surface of the wiring is exposed from the insulating coating, the side surface of the wiring is a curved surface,
The exposed portion of the wiring of the circuit device is electrically connected to the conductive pattern,
Wherein the circuit device the wiring built in, at least one of the conductive patterns transcend to the conductive pattern each other hybrid integrated circuit device characterized in that it is electrically connected. A mounting substrate; a conductive pattern formed on a surface of the mounting substrate; and a circuit device fixed to the conductive pattern.
The circuit device includes: a plurality of bonding pads; a metal thin wire that connects the bonding pads; an insulating resin that covers the metal thin wire and the bonding pad so that a back surface of the bonding pad is exposed and is integrally supported; Comprising
The exposed portion of the bonding pad of the circuit device is electrically connected to the conductive pattern,
The hybrid integrated circuit device is characterized in that the conductive patterns are electrically connected to each other across at least one of the conductive patterns by the thin metal wires incorporated in the circuit device. A mounting substrate; a conductive pattern formed on a surface of the mounting substrate; and a circuit device fixed to the conductive pattern.
The circuit device includes: a conductive path electrically separated by a separation groove; a semiconductor chip electrically connected to the conductive path; and a back surface of the conductive path that covers the semiconductor chip and is filled in the separation groove An insulating resin that exposes and integrally supports the insulating resin, and an insulating film that covers a back surface of the insulating resin from which the conductive path is exposed, and the conductive path includes a die pad to which the semiconductor chip is fixed; Including a wiring that is not connected to the semiconductor chip, and the back surface of at least two of the wiring is exposed from the insulating film,
The exposed portion of the wiring of the circuit device is electrically connected to the conductive pattern,
The hybrid integrated circuit device, wherein the conductive patterns are electrically connected to each other across at least one of the conductive patterns by the wiring incorporated in the circuit device. The circuit device includes a hybrid integrated circuit device according to claim 10 claim 8, characterized in that disposed in the vicinity of the heat sink affixed to the surface of the mounting substrate.

Images