JP3776302B2 - コンピュータ・プログラムのハザードを検出するシステム - Google Patents

コンピュータ・プログラムのハザードを検出するシステム Download PDF

Info

Publication number
JP3776302B2
JP3776302B2 JP2000310363A JP2000310363A JP3776302B2 JP 3776302 B2 JP3776302 B2 JP 3776302B2 JP 2000310363 A JP2000310363 A JP 2000310363A JP 2000310363 A JP2000310363 A JP 2000310363A JP 3776302 B2 JP3776302 B2 JP 3776302B2
Authority
JP
Japan
Prior art keywords
instruction
instructions
data
group
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000310363A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001117772A (ja
JP2001117772A5 (enExample
Inventor
ドナルド・チャールズ・ソルティス・ジュニア
ロニー・リー・アーノルド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2001117772A publication Critical patent/JP2001117772A/ja
Publication of JP2001117772A5 publication Critical patent/JP2001117772A5/ja
Application granted granted Critical
Publication of JP3776302B2 publication Critical patent/JP3776302B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
JP2000310363A 1999-10-14 2000-10-11 コンピュータ・プログラムのハザードを検出するシステム Expired - Fee Related JP3776302B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/417,582 US6711670B1 (en) 1999-10-14 1999-10-14 System and method for detecting data hazards within an instruction group of a compiled computer program
US09/417582 1999-10-14

Publications (3)

Publication Number Publication Date
JP2001117772A JP2001117772A (ja) 2001-04-27
JP2001117772A5 JP2001117772A5 (enExample) 2005-06-23
JP3776302B2 true JP3776302B2 (ja) 2006-05-17

Family

ID=23654573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000310363A Expired - Fee Related JP3776302B2 (ja) 1999-10-14 2000-10-11 コンピュータ・プログラムのハザードを検出するシステム

Country Status (2)

Country Link
US (1) US6711670B1 (enExample)
JP (1) JP3776302B2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4368320B2 (ja) * 2005-03-16 2009-11-18 富士通株式会社 情報処理システム，パイプライン処理装置，ビジー判定プログラム及び同プログラムを記録したコンピュータ読取可能な記録媒体
GB2447907B (en) * 2007-03-26 2009-02-18 Imagination Tech Ltd Processing long-latency instructions in a pipelined processor
US20090150653A1 (en) * 2007-12-07 2009-06-11 Pedro Chaparro Monferrer Mechanism for soft error detection and recovery in issue queues
US8635501B2 (en) 2011-07-25 2014-01-21 Microsoft Corporation Detecting memory hazards in parallel computing
US8707107B1 (en) * 2011-12-09 2014-04-22 Symantec Corporation Systems and methods for proactively facilitating restoration of potential data failures
US9372695B2 (en) * 2013-06-28 2016-06-21 Globalfoundries Inc. Optimization of instruction groups across group boundaries
US9348596B2 (en) 2013-06-28 2016-05-24 International Business Machines Corporation Forming instruction groups based on decode time instruction optimization
KR102179385B1 (ko) * 2013-11-29 2020-11-16 삼성전자주식회사 명령어를 실행하는 방법 및 프로세서, 명령어를 부호화하는 방법 및 장치 및 기록매체
US11409530B2 (en) * 2018-08-16 2022-08-09 Arm Limited System, method and apparatus for executing instructions

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2038264C (en) * 1990-06-26 1995-06-27 Richard James Eickemeyer In-memory preprocessor for a scalable compound instruction set machine processor
US5471591A (en) * 1990-06-29 1995-11-28 Digital Equipment Corporation Combined write-operand queue and read-after-write dependency scoreboard
KR100309566B1 (ko) * 1992-04-29 2001-12-15 리패치 파이프라인프로세서에서다중명령어를무리짓고,그룹화된명령어를동시에발행하고,그룹화된명령어를실행시키는방법및장치
US5481743A (en) * 1993-09-30 1996-01-02 Apple Computer, Inc. Minimal instruction set computer architecture and multiple instruction issue method
US5848288A (en) * 1995-09-20 1998-12-08 Intel Corporation Method and apparatus for accommodating different issue width implementations of VLIW architectures

Also Published As

Publication number Publication date
US6711670B1 (en) 2004-03-23
JP2001117772A (ja) 2001-04-27

Similar Documents

Publication Publication Date Title
JP3659877B2 (ja) ライトアフターライトデータハザードにより生じるエラーを効率的に防止するためのスーパースケーラ処理システム及び方法
JP2986071B2 (ja) 格納要求処理方法および取出し／格納バッファ
CN100392622C (zh) 具有存储器顺序缓冲器的处理器
US5881280A (en) Method and system for selecting instructions for re-execution for in-line exception recovery in a speculative execution processor
US20070118720A1 (en) Technique for setting a vector mask
JP2002508564A (ja) 実行パイプラインの外部に複数のプログラム・カウンタとトレース・バッファを有するプロセッサ
JP3773769B2 (ja) 命令のインオーダ処理を効率的に実行するスーパースケーラ処理システム及び方法
US6301654B1 (en) System and method for permitting out-of-order execution of load and store instructions
US7363470B2 (en) System and method to prevent in-flight instances of operations from disrupting operation replay within a data-speculative microprocessor
JP3776302B2 (ja) コンピュータ・プログラムのハザードを検出するシステム
US5727177A (en) Reorder buffer circuit accommodating special instructions operating on odd-width results
US6449713B1 (en) Implementation of a conditional move instruction in an out-of-order processor
JP3808314B2 (ja) 長レイテンシ命令に対する命令属性およびステータス情報を示す処理システムおよび方法
US7844799B2 (en) Method and system for pipeline reduction
JP3759398B2 (ja) コンピュータ・プログラムのハザードを検出するシステム
US20050283770A1 (en) Detecting memory address bounds violations
JP3756410B2 (ja) 述語データを提供するシステム
US5848256A (en) Method and apparatus for address disambiguation using address component identifiers
US6829699B2 (en) Rename finish conflict detection and recovery
KR100508320B1 (ko) 고속 및 저속 리플레이 경로를 갖는 리플레이 구조를구비한 프로세서
US20030084272A1 (en) Handling problematic events in a data processing apparatus
JP2008537208A (ja) 条件付命令を実行しない時のソース・オペランドの停止待機
EP1050805B1 (en) Transfer of guard values in a computer system
US7865706B2 (en) Information processing method and instruction generating method
US10552156B2 (en) Processing operation issue control

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041007

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041007

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060210

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060215

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060222

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100303

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees