JP3772807B2 - Gallium nitride compound semiconductor light emitting device - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a gallium nitride-based compound semiconductor chip used for light-emitting devices such as blue, green or red light-emitting diodes and laser diodes, and in particular, a general formula In _X Al _Y Ga _1-XY N (0 The present invention relates to a gallium nitride compound semiconductor light-emitting element in which gallium nitride compound semiconductors (hereinafter referred to as nitride semiconductors) represented by ≦ X <1, 0 ≦ Y <1) are stacked.
[0002]
[Prior art]
In general, a dicer or a scriber is generally used for an apparatus that cuts a semiconductor material laminated on a substrate into a chip for a light emitting device. A dicer is generally called a dicing saw. The wafer is fully cut directly by the rotational movement of a blade with a diamond edge, or a groove wider than the edge width is cut (half cut), and the wafer is moved by external force. It is a device that breaks. On the other hand, a scriber is a device that draws an extremely thin scribe line (ruled line) on a wafer, for example, in a grid pattern by a reciprocating linear motion of a needle having a diamond tip, and then breaks the wafer by an external force.
[0003]
Conventionally, when semiconductor wafers are cut into chips using these devices, for example, crystals of zinc zinc structure such as GaP and GaAs have a cleavage property in the “110” direction. By inserting a scribe line in this direction, it can be easily separated into chips. However, since the nitride semiconductor is laminated on the sapphire substrate, the wafer does not have a cleavage property due to the nature of the hexagonal sapphire crystal and is difficult to cut with a scriber. On the other hand, even when cutting with a dicer, since the gallium nitride compound semiconductor wafer has a so-called heteroepitaxial structure in which a gallium nitride compound semiconductor is stacked on sapphire as described above, lattice constant irregularities are large and thermal Since the expansion coefficients are different, there is a problem that the gallium nitride compound semiconductor is easily peeled off from the sapphire substrate when an external force is applied. Furthermore, since both sapphire and gallium nitride compound semiconductors are very hard materials with a Mohs hardness of approximately 9, cracks and chipping are likely to occur on the cut surface, so that they could not be cut accurately.
[0004]
Since the nitride semiconductor is laminated on the insulating substrate called sapphire as described above, in order to take out the electrode from the p-type layer and the n-type layer, etching is usually performed on the same side of the nitride semiconductor layer. And both layers are exposed. When the nitride semiconductor wafer in this state is separated into chips, using the scriber, dicer, etc., and cutting directly from the nitride semiconductor side of the etched surface, cracks and the like are generated on the cut surface, and the yield is not good. There was a problem.
[0005]
[Problems to be solved by the invention]
It is very important to obtain as many light-emitting chips as possible from a single wafer to increase productivity, and to obtain many chips without damaging the crystallinity of the nitride semiconductor is an essential requirement. Chips made of nitride semiconductors have not yet been put into practical use, but in order to use blue and green light emitting diodes, laser diodes, etc. using nitride semiconductors in the near future, more and more advanced chip technology will be used. It has been demanded. Therefore, the present invention has been made in view of such circumstances, and the object of the present invention is to generate cracks and chipping on the cut surface when the nitride semiconductor wafer having a sapphire substrate is separated into chips. Provided is a method of manufacturing a nitride semiconductor chip that prevents, has a good yield and obtains a desired shape and size, and a nitride semiconductor crystal in which a p-type layer or an n-type layer is etched to provide an electrode by this method It is to provide a gallium nitride-based compound semiconductor light emitting device that can be manufactured without impairing the properties.
[0006]
[Means for Solving the Problems]
The gallium nitride-based compound semiconductor light emitting device according to the present invention includes an n-type layer and a p-type layer that are sequentially stacked on a sapphire substrate and etched so that the electrode-forming surface of the n-type layer is exposed. In a gallium nitride-based compound semiconductor light emitting device manufactured by dividing a wafer provided with a split groove, the sapphire substrate is positioned below the electrode formation surface as a surface for forming the split groove It has a split groove forming surface provided, and the thickness of the sapphire substrate is 200 μm or less.
In the gallium nitride compound semiconductor light emitting device according to the present invention, it is preferable that the split groove forming surface is formed by etching.
Furthermore, the gallium nitride-based compound semiconductor light emitting device according to the present invention is preferably manufactured by dividing the wafer using a scriber.
Furthermore, in the gallium nitride compound semiconductor light emitting device according to the present invention, it is preferable that the sapphire substrate has a thickness of 50 μm or more.
Furthermore, the gallium nitride compound semiconductor light emitting device according to the present invention can be manufactured by the following manufacturing method.
That is, the nitride semiconductor chip manufacturing method according to the element of the present invention includes a gallium nitride compound semiconductor etched on a sapphire substrate so that the electrode formation surface of the p-type layer or n-type layer is exposed in advance. A method for separating a gallium-based compound semiconductor wafer into chips, wherein, apart from the etching of the electrode-forming surface of the gallium nitride-based compound semiconductor, a new etching is performed on the gallium nitride-based compound semiconductor surface to form a first groove Forming a linear shape with a desired chip size, and then forming a second dividing groove from above the first dividing groove in a line shape with a depth that reaches the sapphire substrate or more. A step of adjusting the line width (W2) of the second dividing groove to be narrower than the line width (W1) of the dividing groove, and a process of separating the wafer into chips along the second dividing groove Characterized by including and.
[0007]
In the manufacturing method according to the element of the present invention, either wet etching or dry etching may be used as the etching means for forming the first split groove. For wet etching, for example, a mixed acid of sulfuric acid and phosphoric acid is used. On the other hand, in the case of dry etching, techniques such as reactive ion etching (RIE), ion milling, focused beam etching, and ECR etching can be used. Preferably, dry etching is less likely to damage the nitride semiconductor crystal. However, it goes without saying that a mask having a predetermined shape is formed on the surface of the nitride semiconductor so as to have a desired chip size before etching.
[0008]
Next, in order to form the second split groove, a technique such as dicing, scribing, or etching can be used. The second split groove is formed on the first split groove, that is, at the mark of the first split groove. This second split groove needs to be formed at a depth greater than the depth reaching the sapphire substrate, and further needs to be narrower than the width of the first split groove. The formation method is not particularly limited, but scribe is particularly preferably used. This is because the scribing can easily make the line width of the second dividing groove smaller than the line width of the first dividing groove, and can form the dividing groove more quickly than etching. Further, as compared with dicing, since the area for scraping the sapphire substrate when cutting the wafer is small, there is an advantage that many chips can be obtained from a single wafer.
[0009]
Further, it is preferable to polish and thin the sapphire substrate before forming the first split groove or before forming the second split groove. It is desirable to adjust the thickness of the polished sapphire substrate to 200 μm or less, more preferably 150 μm or less. This is because a nitride semiconductor wafer usually has a sapphire substrate thickness of 300 to 800 μm, and a nitride semiconductor laminated thereon has a thickness of at most several tens of μm, most of which is occupied by the thickness of the sapphire substrate. ing. In addition, as described above, nitride semiconductors are stacked on materials having different lattice constants and thermal expansion coefficients, and thus have a property that is very difficult to cut. Therefore, the sapphire substrate can be divided substantially vertically by adjusting the thickness of the sapphire substrate to the above range. In particular, when the second split groove is formed by scribing, a substantially vertical cut surface can be obtained by one scribing by polishing the sapphire substrate in the above range. The lower limit of the thickness of the substrate is not particularly limited. However, if the thickness is too thin, the wafer itself is liable to break during polishing. Therefore, a practical value is preferably 50 μm or more.
[0010]
[Action]
The operation of the manufacturing method according to the element of the present invention will be described with reference to the drawings. FIGS. 1 to 8 are schematic cross-sectional views for explaining one process of the manufacturing method of the present invention. In particular, FIGS. 7 and 8 show an enlarged state of the wafer when forming the second split groove. .
[0011]
FIG. 1 is a schematic cross-sectional view of a wafer in which an n-type nitride semiconductor layer 2 (n-type layer) and a p-type nitride semiconductor layer 3 (p-type layer) are stacked on a sapphire substrate 1. 3 is pre-etched to expose the n-type layer 2 for providing a negative electrode.
[0012]
Next, as shown in FIG. 2, a first split groove 11 is formed in a linear shape with a width of W1 by etching from above the exposed n-type layer 2. Needless to say, a mask for forming the first groove is formed on the surface of the p-type layer 3 and the exposed n-type layer 2 before etching. The means for forming the first split groove 11 by etching is less likely to damage the crystal of the nitride semiconductor than other techniques such as scribe and dicing, and the physical stress is a pn junction of the nitride semiconductor. There is an effect of not depending on the interface, the interface between the sapphire and the nitride semiconductor. Further, when the first split groove 11 is formed until it reaches the sapphire substrate 1 as shown in this figure, the exposed surface at the position where the second split groove 22 is to be formed next is only sapphire. Most preferable is that the cutting edge of a dicer, scriber or the like, which is a means for forming the groove 22, does not touch the nitride semiconductor at all.
[0013]
Next, as shown in FIG. 3, after forming the first split groove 11, a new second split groove 22 is linearly formed with a width W 2 narrower than the line width W 1 of the first split groove 11. Form. Moreover, the depth is not less than the depth reaching the sapphire substrate 1. (In FIG. 3, since the first dividing groove 11 is formed until it reaches the sapphire substrate, in this case, the depth of the second dividing groove 22 is not less than the depth that naturally reaches the sapphire substrate.) By making the line width W2 of the second dividing groove 22 narrower than the line width W1 of the first dividing groove 11, the cutting edge of a dicer, scriber or the like, which is a means for forming the second dividing groove 22, is made of a nitride semiconductor. Since the side surface, that is, the n-type layer 2 where the electrode is to be formed is not touched, the crystallinity is not impaired. Further, since the depth of the second split groove 22 is set to be more than reaching the sapphire substrate, only the sapphire substrate can be substantially cut, and the shape of the target nitride semiconductor can be accurately controlled and separated into chips. be able to. In addition, this figure shows the possibility that sapphire can be broken obliquely as shown by the broken line because the sapphire substrate 1 is not polished and the second split groove 22 is formed by scribing. The sapphire can be cut vertically by half-cutting the dividing groove 22 to reduce the thickness of the sapphire substrate to 200 μm or less, or by full-cutting.
[0014]
FIG. 4 shows a state where the wafer shown in FIG. 1 or FIG. 2 is polished on the sapphire substrate 1 side to have a thickness of 200 μm or less. By polishing and thinning the substrate in this way, the sapphire substrate 1 can be split substantially vertically even if the second split groove 22 is formed by scribing. However, the step of polishing the sapphire substrate is preferably performed before forming the first split groove or before forming the second split groove. This is because if the substrate is polished after the second split groove 22 is formed, the substrate tends to break at undesired positions during polishing.
[0015]
5 and 6 are schematic cross-sectional views showing the structure of a wafer obtained in one step according to another embodiment of the present application. FIG. 5 does not form the first dividing groove 11 until it reaches the sapphire substrate 1. FIG. 6 shows a state in which the n-layer 2 is stopped halfway, and FIG. 6 shows that the second split groove 22 is newly formed at a depth that reaches the sapphire substrate 1 from the top of the first split groove 11 shown in FIG. Shows the state. As shown in FIG. 6, if the second split groove 22 can be formed at a depth greater than the depth reaching the sapphire substrate 1, it is necessary to etch until the first split groove 11 reaches the sapphire substrate as shown in FIG. There is no. However, after the first split groove 11 is formed, if the thickness of the nitride semiconductor (in this case, the n-type layer 2) at the position where the second split groove is to be formed is thick, the second split groove is formed later. Since the interface between the sapphire substrate 1 and the n layer 2 is easily peeled off by the stress of the scriber and the dicer when forming the n layer 2, the thickness of the n layer 2 where the second split groove 22 should be normally formed is 5 μm. It is preferable to adjust to the following.
[0016]
7 and 8 are enlarged schematic sectional views showing the structure of the wafer when the second split groove 22 is formed. FIG. 7 shows that the second split groove 22 is formed using a scriber. FIG. 8 shows the formation by a dicer. In any case, it is understood that the wafer can be separated along the flaw after the flaw is formed on the surface of the sapphire substrate 1 by the second groove 22, but the second groove 22 is formed by a scriber as shown in FIG. Since the width W1 of the first dividing groove 11 can be narrowed by forming, it can be seen that many chips can be obtained. Further, since the width W2 of the second split groove 22 is narrower than W1, the side surface of the nitride semiconductor is not damaged by the cutting edge of the scriber, the blade of the dicer, or the like. 8A shows a state in which the first split groove 11 leaves the n-type layer 2, that is, the same state as FIG. 5, but is cut by the second split groove 22. Since this part is not the n-type layer 2 to be etched and provided with a negative electrode, even if the side surface is scratched, it is a part that is not particularly important for the chip, and thus affects the light emission characteristics of the chip. There is no.
[0017]
【Example】
[Example 1]
A wafer in which an n-type layer 2 (n-type GaN in this case) and a p-type layer 3 (in this case p-type GaN) are laminated in order on a sapphire substrate 1 having a thickness of 400 μm and a size of 2 inches φ are stacked. prepare. However, the p-type GaN layer of this wafer is etched in advance in a predetermined shape at a depth of 2 μm to partially expose the n-type layer 2 to be provided with electrodes as shown in FIG. (Thus, the thickness of the n-type layer 2 exposed by etching is 5 μm.) FIG. 9 shows a plan view of the etched wafer as viewed from the nitride semiconductor layer side.
[0018]
Next, a mask made of SiO2 is put on the p-type layer 3 and the etched n-type GaN layer 2 of the wafer by a photolithography technique so as to have a predetermined chip size, and then the sapphire substrate is formed using RIE. Etching is further performed on the n-type GaN layer 2 until it is exposed to form a first split groove 11. The first dividing groove has a line width (W1) of 40 μm and a pitch of 350 μm. The line width and pitch of this first split groove are shown in FIG.
[0019]
After forming the first split grooves 11 as described above, the sapphire substrate 1 side of the wafer is polished by a polishing machine, and the substrate is lapped and polished to a thickness of 100 μm.
[0020]
Next, an adhesive tape is affixed to the sapphire substrate 1 side of the polished wafer, the wafer is attached to the scriber table, and fixed with a vacuum chuck. The table can move in the X-axis (left and right) and Y-axis (front and back) directions and has a rotatable structure. After fixing, the center line of the first split groove is scribed once with a scriber diamond needle at a pitch of 350 μm, a depth of 5 μm, and a line width (W2) of 5 μm in the X-axis direction. Rotate the table 90 ° and scribe in the same way in the Y-axis direction. In this way, a scribe line is inserted to form a 350 μm square chip, and a second split groove is formed.
[0021]
After scribing, the vacuum chuck was released, the wafer was peeled off from the table, and lightly pressed from the sapphire substrate side with a roller to obtain a large number of 350 μm square chips from a 2-inch φ wafer. The chip can be cut almost perpendicularly from the second kerf, the crack is not generated on the cut surface, and when the nitride semiconductor is not peeled off from the sapphire substrate, the yield is 99% or more. Met.
[0022]
[Example 2]
In the step of forming the first split groove in Example 1, the n-type layer of the portion where the second split groove 22 is to be formed next is separated in the same manner except that the etching depth is 4 μm. In the same manner, except that the thickness of 2 was 1 μm, the chip was separated into 350 μm square chips, and the yield was also 99% or more.
[0023]
[Example 3]
The first split groove is formed in the same manner as in Example 1 until the first split groove reaches the sapphire substrate. However, the line width (W1) is 100 μm and 500 μm pitch.
[0024]
Next, the sapphire substrate 1 side of the wafer was polished by a polishing machine, and the substrate was lapped and polished to a thickness of 200 μm. By dicing the substrate, the dicing time can be shortened in the next step of forming the second groove.
[0025]
The polished wafer is fixed on a dicer table, and the center line of the first groove is similarly 500 μm pitch in the X axis direction, the depth is 50 μm, and the line width (W2) is 80 μm using a blade having a blade width of 80 μm. The second split groove is formed by dicing and half-cutting. Thus, the cut surface can be made substantially vertical by deeply inserting the second split groove with a dicer and reducing the thickness of the sapphire substrate at the cut portion.
[0026]
After half-cutting, the wafer was peeled off from the table and lightly pressed from the sapphire substrate side with a roller to obtain many 500 μm square chips from a 2-inch φ wafer. The yield of this chip was similarly 99% or more.
[0027]
【The invention's effect】
As described above, according to the method of the present invention, even a nitride semiconductor wafer that does not have a cleavage property can be accurately cut with a method such as scribing and dicing, and productivity is improved. . In addition, since the nitride semiconductor on which the electrode is to be formed is not damaged at all, when the chip separated by the method of the present invention is used as a light emitting element, the yield of the element is dramatically improved.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view illustrating one step of a production method of the present invention.
FIG. 2 is a schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 3 is a schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 4 is a schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 5 is a schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 6 is a schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 7 is an enlarged schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 8 is an enlarged schematic cross-sectional view illustrating one step of the manufacturing method of the present invention.
FIG. 9 is a plan view for explaining one step of the manufacturing method of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Sapphire substrate 2 ... n-type layer 3 ... p-type layer 11 ... first dividing groove 22 ... second dividing groove

Claims (4)

A n-type layer and a p-type layer are sequentially stacked on a sapphire substrate, and a wafer including a gallium nitride-based compound semiconductor etched so as to expose the electrode formation surface of the n-type layer is divided by forming a dividing groove. In the gallium nitride compound semiconductor light emitting device manufactured by
The sapphire substrate has a split groove forming surface located below the electrode forming surface and provided as a surface for forming the split groove, and the thickness of the sapphire substrate is 200 μm or less. Gallium nitride compound semiconductor light emitting device.   The gallium nitride compound semiconductor light emitting device according to claim 1, wherein the split groove forming surface is formed by etching.   The gallium nitride-based compound semiconductor light-emitting device according to claim 1 or 2, wherein the wafer is produced by dividing the wafer using a scriber.   The gallium nitride compound semiconductor light-emitting element according to claim 1, wherein the sapphire substrate has a thickness of 50 μm or more.

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