JP3753691B2 - Magnetic disk unit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to an information recording technique for a magnetic disk device, and particularly relates to a technique for controlling the magnitude of an overshoot of a recording current supplied to a recording head.
[0002]
[Prior art]
  In a magnetic disk device such as a hard disk drive (also referred to as an HDD) which is a peripheral device of a computer, digital information is magnetically recorded on the surface of a magnetic recording medium (also referred to as a medium) of the disk. In recent years, a GMR (Giant Magneto Resistance) head is generally used for reproducing information recorded on a medium, while a recording head constituted by an inductive coil is used for recording.
[0003]
  The recording head forms a magnetic field corresponding to the energizing direction of the recording current energized to the inductive coil. This magnetic field determines the direction of magnetization reversal on the media surface, and digital information is written and recorded on the media.
[0004]
  FIG. 6 shows a configuration of a recording current driving circuit 1 in a conventional general magnetic disk device. A conventional magnetic disk apparatus has a recording head (coil L1) connected from a VCC terminal via head contacts HD1 and HD2 by an H bridge circuit 11 composed of bipolar transistors Q1, Q2, Q3, and Q4. The amount and direction of energization of the recording current IL flowing through the resistor R1 to the GND terminal is controlled. This control is performed based on the recording signal DT1 applied to the recording signal input terminal WD and the recording signal DT2 applied to the recording signal input terminal WDN and having a phase opposite to that of the recording signal DT1.
[0005]
  The transistors Q3 and Q4 in the upper stage of the H bridge circuit 11 are driven by the recording signals DT1 and DT2, respectively, to control the energization direction of the recording current IL. On the other hand, the lower transistors Q1 and Q2 of the H-bridge circuit 11 are driven with a bias adjusted by a circuit comprising a constant voltage source VREF, resistors R1 and R2, and MOS transistors M1, M2, M3, and M4, and the amount of the recording current IL. To control.
[0006]
  The MOS transistor M1 applies a bias voltage determined by the constant voltage source VREF and the resistor R2 to the transistor Q1 based on the recording signal DT2. The MOS transistor M3 sets the bias voltage applied to the transistor Q1 to the GND level based on the recording signal DT1. Similarly, the MOS transistor M2 applies a bias voltage determined by the constant voltage source VREF and the resistor R2 to the transistor Q2 based on the recording signal DT1. Further, the MOS transistor M4 sets the bias voltage applied to the transistor Q2 to the GND level based on the recording signal DT2.
[0007]
  The amount of the recording current IL is controlled by the bias adjustment described above. That is, the smaller the resistance value of the resistor R1, the greater the amount of recording current IL. In other words, the amount of the recording current IL increases as the current I3 flowing through the resistor R1 increases. Further, the amount of the recording current IL increases as the voltage of the constant voltage source VREF increases.
[0008]
  A recording current applied to the magnetic head by the conventional magnetic disk apparatus configured as described above will be described with reference to the timing chart of FIG.
[0009]
  7A shows the recording signal DT1, FIG. 7B shows the recording signal DT2, and FIG. 7C shows the recording current IL flowing through the coil L1. Here, regarding the recording current IL, the direction from the head contact HD1 to the head contact HD2 is a positive direction (see FIG. 6).
[0010]
  When the recording signal DT1 is “H”, the transistors Q3 and Q2 are turned on, and the recording current driving circuit 1 has the VCC terminal, the transistor Q3, the coil L1 (positive direction), the transistor Q2, the resistor R1, and the GND terminal. A recording current I1 flows in the direction. When the recording signal DT1 becomes “L” and the recording signal DT2 becomes “H”, the transistors Q3 and Q2 are turned off, and the transistors Q4 and Q1 are turned on instead. In the recording current driving circuit 1, a recording current I2 flows from the VCC terminal in the direction of the transistor Q4, the coil L1 (negative direction), the transistor Q1, the resistor R1, and the GND terminal. As described above, the digital information of the recording signals DT1 and DT2 can be recorded on the medium by inverting the energizing direction to the coil L1 in accordance with the recording signals DT1 and DT2.
[0011]
  The reliability of a magnetic disk device greatly depends on the reliability with respect to recording and reproduction of information on the medium surface. In recent years, since the recording density of media has increased dramatically, it is essential to further improve the reliability by further reducing the recording / reproducing error rate (bit error rate). Of these, one important point for improving the recording reliability relates to the overshoot of the recording current.
[0012]
  In FIG. 7C, the recording current IL flowing through the coil L1 takes a value exceeding the steady value at the moment when the energization direction to the coil L1 is reversed, and settles to the steady value after a while. The portion beyond the steady value is overshoot (A in FIG. 7). By rapidly increasing this overshoot and quickly returning to a steady state, a strong magnetic field can be temporarily formed in the coil L1. As a result, the medium can be magnetized in a short time according to the magnetic field formed by the coil L1, and information recording at a high rate is possible.
[0013]
  The overshoot can be presumed to be qualitatively caused by resonance and vibration with the coil L1 and various parasitic capacitances and parasitic resistances connected thereto. The coil L1 includes, for example, the parasitic resistance and capacitance of the coil L1 itself, the parasitic inductance of the wire connecting the lead frame and the chip, the parasitic capacitance of the pads in the head contacts HD1 and HD2, and the parasitic capacitance and inductance of the aluminum wiring in the chip. A parasitic capacitance of the transistors Q1 to Q4 constituting the recording current driving circuit 1 is accompanied. In particular, the transistors Q1 to Q4 are designed to increase the transistor shape (gate width and element area) in order to ensure the capability of flowing a large recording current IL, and have a very large parasitic capacitance.
[0014]
  As described above, since various parasitic elements are complicatedly associated with the coil L1, it is complicated to quantitatively express the overshoot with an accurate mathematical expression. For this reason, it has been generally difficult to control the amount of overshoot.
[0015]
  In order to solve this problem, there is a conventional technique in which the H bridge coil drive circuit is improved (for example, see Patent Document 1). FIG. 8 shows a circuit configuration of a conventional improved H-bridge coil driving circuit. The H bridge coil drive circuit 20 is provided with boost capacitor circuits 40 and 41 at the gates of the MOS transistors 13 and 15 corresponding to the transistors Q1 and Q2, respectively, and when the recording signals S1 and S2 are at low potentials, The gate voltage is temporarily increased. Thereby, when the magnetism of the magnetic head is reversed, the overshoot of the recording current is temporarily increased.
[0016]
  In addition, there is a technique in which improvements other than the above are performed (for example, see Patent Document 2). FIG. 9 shows a circuit configuration of a conventional improved H-bridge coil drive circuit having a configuration different from the above. The H bridge coil drive circuit 45 includes MOS transistors 60 and 62 in parallel with MOS transistors 47 and 49 corresponding to the transistors Q1 and Q2, respectively. Boost capacitors are provided between the gates of the MOS transistors 47, 49, 60 and 62 and the recording signal input terminals VCDI and / VCDI, respectively. Then, when the recording signals VCDI and / VCDI are each at a low potential, two MOS transistors provided in parallel are simultaneously turned on, thereby temporarily increasing the overshoot of the recording current.
[0017]
[Patent Document 1]
      Japanese Patent Laid-Open No. 11-149604 (page 4-5, FIG. 2)
[0018]
[Patent Document 2]
      JP-A-11-149605 (page 6, FIG. 2)
[0019]
[Problems to be solved by the invention]
  In the conventional magnetic disk device, the minimum time interval from the rising (or falling) edge to the falling (or rising) edge of the recording current IL is about several ns, and the rising time and the falling time are as short as 1 ns or less. Is. Therefore, the overshoot must be completed in a very short time width of about several hundreds ps. The frequency of recording signals in a magnetic disk device is increasing year by year, and it is necessary to control overshoot in a shorter time in the future. That is, faster overshoot control is required.
[0020]
  According to the conventional H bridge coil drive circuit, the overshoot can surely be temporarily increased. However, in the H-bridge coil drive circuit shown in FIG. 8, just by providing the boost capacitor circuits 40 and 41, the time constant for overshoot control is not constant, and there are many variations, and the operation margin is increased accordingly. Must be set. Therefore, there is a limit to speeding up overshoot control.
[0021]
  Further, in the H bridge coil drive circuit shown in FIG. 9, since the MOS transistors 47 and 60 and the MOS transistors 49 and 62 are provided in parallel, the parasitic capacitance connected to the magnetic head 50 is increased, and high-speed switching operation is performed. It becomes a hindering factor. Therefore, even with this conventional technique, there is a limit to speeding up overshoot control.
[0022]
  In view of the above problems, the present invention can control the overshoot of the recording current supplied to the magnetic head so as to be agile and quickly return to the steady state, and has a higher magnetic property. An object is to provide a disk device.
[0023]
[Means for solving the problems]]
  UpMeans taken by the present invention to solve the above-mentioned problem has an H bridge circuit configured by connecting a magnetic head between the connection points of a pair of transistors connected in series, And a second recording signal having the opposite phase to the switching signal of the H-bridge circuit to control the direction of energization of the recording current that is energized to the magnetic head. In addition, a first resistive element that is provided between the H-bridge circuit and the ground and determines the amount of the recording current, a constant voltage source that generates a predetermined bias voltage, and an energization direction of the recording current are reversed. And an overshoot control unit for controlling the magnitude of the overshoot of the recording current generated when the recording current is generated. Here, the overshoot control unit includes a base or gate of a first transistor that is turned on based on the first recording signal among transistors that control the amount of the recording current in the H-bridge circuit, and the first A second capacitive element that is turned on based on the second recording signal among the first capacitive element provided between the recording signal input terminal and a transistor that controls the amount of the recording current in the H-bridge circuit. Generated by the constant voltage source at the second capacitive element provided between the base or gate of the transistor and the input terminal of the second recording signal, and at the base or gate of the first and second transistors A second resistive element that provides a predetermined bias voltage, a resistive element that the constant voltage source has as an internal resistance, and the second resistor A third transistor that is connected between the active element and the base or gate of the first transistor and that is turned on based on the first recording signal; the second resistive element; and the second transistor. A fourth transistor connected between the base and the gate and turned on based on the second recording signal;A fifth transistor connected between the base or gate of the first transistor and the ground and turned on based on the second recording signal; and between the base or gate of the second transistor and the ground. And a sixth transistor that is turned on based on the first recording signal,It shall have. The first and second capacitive elements share the second resistive element, and the third and fourth transistors are switched, so that the first and second differential pulses alternately. It shall constitute a generation part.
[0024]
  According to the present invention,When the fifth and sixth transistors are turned on respectivelyFirst and second recording signals are differentiated by the first and second differential pulse generators configured by the first and second capacitive elements and the second resistive element, respectively. Superposed on the bias voltages of the first and second transistors, respectively. As a result, the amount of the recording current temporarily increases during the transition period in which the polarity of the current applied to the magnetic head is reversed, and the overshoot of the recording current is emphasized. Therefore, the substantial recording current for magnetizing the medium is increased, the magnetic field for information recording is enhanced, and recording at a higher rate becomes possible.
[0025]
  Further, according to the present invention, since the first and second differential pulse generators share one resistive element (second resistive element), it becomes easy to adjust each time constant to the same extent. . For this reason, variation in the differential voltage superimposed on the bias voltage applied to the first and second transistors can be suppressed, and the operation margin of the H-bridge circuit can be further reduced. As a result, the high frequency characteristics of the magnetic disk device can be further improved.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
  Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0027]
  (First embodiment)
  FIG.Is the first1 shows a recording current drive circuit 1 and an overshoot control unit 2 in a magnetic disk device according to an embodiment. Since the recording current driving circuit 1 according to the present embodiment has the same configuration as that of the conventional one, the description thereof is omitted, and the overshoot control unit 2 will be described.
[0028]
  The overshoot control unit 2 includes differential pulse generation units 21 and 2.2 andMOS transistors M5 and M6 andConsists of. The source of the MOS transistor M5 is connected to the GND terminal, and the drain is connected to the emitters of the lower transistors Q1 and Q2 of the H bridge circuit 11. That is, the source and drain of the MOS transistor M5 are connected to the resistor R1Connected in parallel. Similarly, the source and drain of the MOS transistor M6 are connected in parallel to the resistor R1.
[0029]
  The capacitor C1 and the resistor R3 in the differential pulse generator 21 are connected to the gate of the MOS transistor M5. The other end of the capacitor C1 is connected to the recording signal input terminal WD, and the other end of the resistor R3 is connected to the GND terminal. That is, the differential pulse generator 21 generates the recording signal DT.1Differentiated and differentiated pulse signal DT1AThis is a differentiation circuit to be generated. The resistor R3 is a polysilicon resistor.
[0030]
  The capacitor C2 and the resistor R4 in the differential pulse generator 22 are connected to the gate of the MOS transistor M6. The other end of the capacitor C2 is connected to the recording signal input terminal WDN, and the other end of the resistor R4 is connected to the GND terminal. That is, the differential pulse generator 22 generates the recording signal DT.2Differentiated and differentiated pulse signal DT2AThis is a differentiation circuit to be generated. The resistor R4 is a polysilicon resistor.
[0031]
  The operation of the magnetic disk device including the overshoot control unit 2 configured as described above will be described below with reference to the timing chart of FIG.
[0032]
  The recording signal DT1 (FIG. 2 (a)) is differentiated by the differential pulse generator 21, and becomes a differential pulse in which rising and falling edges are emphasized for a certain period of time. Then, the differential pulse signal DT1A is output to the gate of the MOS transistor M5 (FIG. 2C). When the recording signal DT1 becomes “H” and the differential pulse signal DT1A exceeds a predetermined threshold value Vth, the gate of the MOS transistor M5 is turned on, and a differential current I4 (see FIG. 1) flows from the drain to the source (see FIG. 1). FIG. 2 (e)).
[0033]
  During the period when the recording signal DT1 is “H”, the recording current I1 flows from the VCC terminal to the transistor Q3, the coil L1 (positive direction), the transistor Q2, the resistor R1, and the GND terminal. As described above, since the source and drain of the MOS transistor M5 are connected in parallel to the resistor R1, the recording current I1 is the sum of the current I3 and the differential current I4. Therefore, the gate of the MOS transistor M5 is turned on, and a large amount of differential current I4 flows between the drain and the source. As a result, the recording current I1 increases and the overshoot is the conventional one (on the positive polarity side in FIG. 2 (g)). A) is emphasized (A ′ on the positive polarity side in FIG. 2G).
[0034]
  The recording signal DT2 (FIG. 2B) also operates in the same manner as described above. The recording signal DT2 is differentiated by the differential pulse generator 22 and becomes a differential pulse in which rising and falling edges are emphasized for a certain time. Then, it is output to the gate of the MOS transistor M6 as the differential pulse signal DT2A (FIG. 2 (d)). When the recording signal DT2 becomes “H” and the differential pulse signal DT2A exceeds a predetermined threshold value Vth, the gate of the MOS transistor M6 is turned on, and a differential current I5 (see FIG. 1) flows from the drain to the source (see FIG. 1). FIG. 2 (f)).
[0035]
  During the period when the recording signal DT2 is “H”, the recording current I2 flows from the VCC terminal to the transistor Q4, the coil L1 (negative direction), the transistor Q1, the resistor R1, and the GND terminal. As described above, since the source and drain of the MOS transistor M6 are connected in parallel to the resistor R1, the recording current I2 is the sum of the current I3 and the differential current I5. Therefore, the gate of the MOS transistor M6 is turned on, and a large amount of differential current I5 flows between the drain and source. As a result, the recording current I2 increases and the overshoot is conventional (on the negative polarity side in FIG. 2 (g)). A) is emphasized (A ′ on the negative polarity side in FIG. 2G).
[0036]
  It is the mutual conductance gm that determines the magnitude of the drain current with respect to the gate voltages of the MOS transistors M5 and M6 that determines the amount of occurrence of the overshoot. This mutual conductance gm can be adjusted by changing the gate width of the MOS transistors M5 and M6. Therefore, it is easy to adjust the duration and amount of overshoot. Also, the amount of overshoot can be adjusted by adjusting the capacitors C1 and C2 and the resistors R3 and R4.
[0037]
  As described above, according to the present embodiment, it is possible to increase the generation amount by adjusting the overshoot generation period of the recording current IL supplied to the coil L1 by the overshoot control unit 2. As a result, the reliability of information recording in the magnetic disk device can be improved.
[0038]
  Further, by providing the MOS transistors M5 and M6 in series with the H bridge circuit 11, the parasitic capacitances of the MOS transistors M5 and M6 are connected in series with the parasitic capacitances of the transistors Q1 and Q2 constituting the H bridge circuit 11. Therefore, even if the MOS transistors M5 and M6 are provided, the parasitic capacitance between the magnetic head L1 and the ground does not increase significantly. That is, the overshoot of the recording current IL can be emphasized based on the differential pulse signals DT1A and DT2A without impairing the high frequency characteristics of the magnetic disk device.
[0039]
  The differential pulse generators 21 and 22 are configured by resistors R3 and R4 and capacitors C1 and C2, respectively. However, the differential pulse generators 21 and 22 may generate pulses for a certain period in synchronization with the recording signals DT1 and DT2. If possible, another configuration may be used. Further, instead of the MOS transistors M5 and M6, the overshoot control unit 2 may be configured by a bipolar transistor having the same effect as these. The transistors Q1 to Q4 are bipolar transistors, but may be MOS transistors or the like.
[0040]
  (Second Embodiment)
  FIG.Is the first6 shows a recording current drive circuit 1 and an overshoot control unit 2A in the magnetic disk device according to the second embodiment. Since the recording current drive circuit 1 according to the present embodiment has the same configuration as that of the conventional one, the description thereof will be omitted, and the overshoot control unit 2A will be described.
[0041]
  The overshoot control unit 2A includes differential pulse generation units 23 and 24 and, Resistance R2(No.2 equivalent element). FIG. 4 shows the configuration of the differential pulse generators 23 and 24 according to this embodiment. This is an excerpt from FIG.
[0042]
  The differential pulse generator 23 includes a capacitor C3.(No.2), the MOS transistor M1 in the recording current drive circuit 1(No.4) and a resistor R2. The capacitor C3 is connected in parallel between the gate and the source of the MOS transistor M1, that is, the transistor Q1 constituting the H-bridge circuit 11.(No.2) and a recording signal input terminal WDN(No.2 corresponding to the input terminal of the recording signal 2). The differential pulse generator 23 operates as a differential circuit when the MOS transistor M1 is turned on. The resistor R2 is a polysilicon resistor.
[0043]
  Similarly, the differential pulse generator 24 includes a capacitor C4.(No.1), and the MOS transistor M2 in the recording current drive circuit 1(No.3) and a resistor R2. The capacitor C4 is connected in parallel between the gate and the source of the MOS transistor M2, that is, the transistor Q2 constituting the H-bridge circuit 11.(No.1) and recording signal input terminal WD(No.1 corresponding to the input terminal of the recording signal 1). The differential pulse generator 24 operates as a differential circuit when the MOS transistor M2 is turned on.
[0044]
  Further, in general, in a bipolar transistor, a delay occurs between the time when the bias voltage is turned off and the time when the collector current is turned off (turned off) due to the charge accumulated in the base when the transistor is turned on. In order to reduce this delay, it is necessary to discharge the charge accumulated in the base. The capacitor C3 (or C4) in this embodiment also functions as a speed-up capacitor for discharging the electric charge accumulated in the base of the transistor Q1 (or Q2), and the switching speed of the transistor Q1 (or Q2) is increased. Improve.
[0045]
  The operation of the magnetic disk drive including the overshoot control unit 2A configured as described above will be described below with reference to the timing chart of FIG.
[0046]
  During the period in which the recording signal DT1 (FIG. 5A) is “H”, from the VCC terminal, the transistor Q3, the coil L1 (positive direction), the transistor Q2, and the resistor R1(Equivalent to the first resistive element)The recording current I1 flows in the direction of the GND terminal. The recording signal DT1 is differentiated by the differential pulse generator 24, and becomes a differential pulse in which the potential in the vicinity of the rising edge rises for a certain time. This differential pulse is superimposed on the bias voltage from the constant voltage source VREF to become a composite pulse signal DT1B, which is applied to the base of the transistor Q2 (FIG. 5 (c)). In addition, in FIG.5 (c), the differential pulse on which the hatched part was superimposed is shown.
[0047]
  During the period in which the differential pulse is generated, the bias voltage for the transistor Q2 temporarily increases and the emitter current increases. Furthermore, since the charge stored in the base of the transistor Q1 is rapidly discharged through the capacitor C3, the transistor Q1 is quickly turned off. Then, the speed at which the emitter current of the transistor Q2 increases can be increased by speeding up the turn-off of the transistor Q1 and avoiding the state in which the transistors Q1 and Q2 are simultaneously turned on. Therefore, the increase in the emitter current of the transistor Q2 results in an increase in the recording current I1, and the overshoot is emphasized more than the conventional one (A on the positive polarity side in FIG. 5 (e)) (FIG. 5 (e)). A ″ on the positive side of the inside).
[0048]
  The recording signal DT2 (FIG. 5B) also operates in the same manner as described above. During the period when the recording signal DT2 (FIG. 5B) is “H”, the recording current I2 flows from the VCC terminal to the transistor Q4, the coil L1 (negative direction), the transistor Q1, the resistor R1, and the GND terminal. . The recording signal DT2 is differentiated by the differential pulse generator 23, and becomes a differential pulse in which the potential in the vicinity of the rising edge rises for a certain time. This differential pulse is superimposed on the bias voltage from the constant voltage source VREF to become a composite pulse signal DT2B, which is applied to the base of the transistor Q1 (FIG. 5 (d)). In addition, in FIG.5 (d), the differential pulse on which the hatched part was superimposed is shown.
[0049]
  During the period in which the differential pulse is generated, the bias voltage for the transistor Q1 temporarily increases and the emitter current increases. Furthermore, since the charge stored at the base of transistor Q2 is rapidly discharged through capacitor C4, transistor Q2 turns off quickly. The speed at which the emitter current of the transistor Q1 increases can be increased by speeding up the turn-off of the transistor Q2 and avoiding the state where the transistors Q1 and Q2 are simultaneously turned on. Therefore, the increase in the emitter current of the transistor Q1 results in an increase in the recording current I2, and the overshoot is emphasized more than the conventional one (A on the negative polarity side in FIG. 5 (e)) (FIG. 5 (e)). A ″ on the negative polarity side in the middle.
[0050]
  Note that the amount and period of the overshoot can be adjusted by changing the capacitors C3 and C4 and the resistor R2.
[0051]
  Further, when the resistance value of the resistor R2 is small, a resistor element that is not a resistor such as an internal resistor of the constant voltage source VREF, for example, an emitter resistor of a transistor that constitutes an output circuit section of the constant voltage source is used. If the resistance value is large, a resistive element such as a polysilicon resistor formed on a semiconductor substrate may be used.
[0052]
  As described above, according to the present embodiment, the overshoot control unit 2 </ b> A is configured by adding the capacitors C <b> 3 and C <b> 4 to the recording current driving circuit 1. The overshoot control unit 2A can emphasize the overshoot of the recording current IL supplied to the coil L1, and can improve the reliability of information recording in the magnetic disk device.
[0053]
  Further, since the differential pulse generators 23 and 24 share the resistor R2, it is easy to adjust the time constant to the same extent. For this reason, variation in the differential voltage superimposed on the bias voltage applied to the transistors Q1 and Q2 can be suppressed, and the operation margin of the H-bridge circuit 11 can be further reduced. Thereby, the H-bridge circuit 11 can be driven with a recording signal having a higher frequency. That is, it is possible to realize a magnetic disk device with better high frequency characteristics.
[0054]
  Note that what is added to the recording current driving circuit 1 is not limited to the capacitors C3 and C4, but may be any that generates a pulse for a certain period in synchronization with the recording signals DT1 and DT2. The transistors Q1 to Q4 are bipolar transistors, but may be MOS transistors or the like.
[0055]
  In the above description, the resistors R3 and R4 are polysilicon resistors. However, the present invention is not limited to this, and may be diffused resistors, for example. However, since the polysilicon resistor has a small parasitic capacitance and is superior in high frequency characteristics, it is preferable to use a polysilicon resistor.
[0056]
【The invention's effect】
  As described above, according to the present invention, when the magnetic disk apparatus records information on the medium, it is possible to quickly increase the overshoot of the recording current applied to the magnetic head and quickly return to the steady state. Thus, the magnetic field formed by the magnetic head can be strengthened. As a result, high-reliability recording is possible in high-speed recording, and the bit error rate can be reduced. In addition, since the magnetic disk device of the present invention has better high frequency characteristics than the conventional one, information can be recorded at a higher data transfer rate.
[Brief description of the drawings]
[Figure 1]First1 is a configuration diagram of a magnetic disk device according to one embodiment. FIG.
FIG. 2 is a timing chart showing the operation of the magnetic disk device of FIG.
[Fig. 3]First2 is a configuration diagram of a magnetic disk device according to a second embodiment. FIG.
4 is a configuration diagram of a differential pulse generation unit in the magnetic disk device of FIG. 3;
5 is a timing chart showing the operation of the magnetic disk device of FIG.
FIG. 6 is a configuration diagram of a conventional magnetic disk device.
7 is a timing chart showing the operation of the magnetic disk device of FIG.
FIG. 8 is a circuit diagram of a conventional improved H-bridge coil driving circuit.
FIG. 9 is a circuit diagram of a conventional improved H-bridge coil drive circuit.
[Explanation of symbols]
  11 H bridge circuit
  2,2A overshoot controller
  21, 24 Differential pulse generator (first differential pulse generator)
  22, 23 Differential pulse generator (second differential pulse generator)
  L1 coil (magnetic head)
  Q1 transistor (second transistor that is turned on based on the second recording signal)
  Q2 transistor (first transistor that is turned on based on the first recording signal)
  Q3 and Q4 transistors
  M1 MOS transistor (fourth transistor)
  M2 MOS transistor (third transistor)
  M3 MOS transistor (sixth transistor)
  M4 MOS transistor (fifth transistor)
  M5 MOS transistor (first transistor)
  M6 MOS transistor (second transistor)
  R1 resistance (resistive element, first resistive element)
  R2 resistance (second resistive element)
  R3, R4 resistance (resistive element)
  C1, C2 capacitors (capacitive elements)
  C3 capacitor (second capacitive element)
  C4 capacitor (first capacitive element)
  IL, I1, I2 Recording current
  VREF constant voltage source
  DT1 recording signal (first recording signal)
  DT2 recording signal (second recording signal)
  DT1A differential pulse signal (first differential pulse signal)
  DT2A differential pulse signal (second differential pulse signal)

Claims (1)

An H-bridge circuit configured by connecting a magnetic head between connection points of a pair of transistors connected in series, and based on a given first recording signal and a second recording signal that is opposite in phase to the first recording signal And a switching control of the transistors constituting the H-bridge circuit to control the energization direction of the recording current energized to the magnetic head,
A first resistive element that is provided between the H-bridge circuit and ground and determines the amount of the recording current;
A constant voltage source for generating a predetermined bias voltage;
An overshoot control unit for controlling the magnitude of the overshoot of the recording current that occurs when the energization direction of the recording current is reversed,
The overshoot control unit
Among the transistors for controlling the amount of the recording current in the H-bridge circuit, provided between the base or gate of the first transistor turned on based on the first recording signal and the input terminal of the first recording signal. A first capacitive element formed;
Provided between the base or gate of the second transistor that is turned on based on the second recording signal among the transistors that control the amount of the recording current in the H-bridge circuit and the input terminal of the second recording signal. A second capacitive element,
A second resistive element that applies a predetermined bias voltage generated by the constant voltage source to the bases or gates of the first and second transistors;
A third transistor connected between the second resistive element and a base or gate of the first transistor and turned on based on the first recording signal;
A fourth transistor connected between the second resistive element and a base or gate of the second transistor and turned on based on the second recording signal ;
A fifth transistor connected between the base or gate of the first transistor and the ground and turned on based on the second recording signal;
A sixth transistor connected between a base or gate of the second transistor and the ground and turned on based on the first recording signal ;
The first and second capacitive elements share the second resistive element, and the first and second differential pulse generators are alternately formed by switching the third and fourth transistors. A magnetic disk device characterized by comprising:

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