JP3748850B2 - Switching power supply - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a switching power supply device having a constant current drooping characteristic as an output characteristic.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, for example, as a power supply device for a charger, a switching power supply device having a constant current drooping characteristic that is an excellent output characteristic with respect to a load variation has been widely used.
[0003]
A conventional switching power supply apparatus as described above (see, for example, Patent Document 1) will be described below with reference to the drawings.
FIG. 5 is a circuit diagram showing a configuration example of a conventional switching power supply device for a charger. In FIG. 5, reference numeral 130 denotes a semiconductor device for controlling a switching power supply, which is composed of a switching element 101 and its control circuit.
[0004]
The semiconductor device 130 has, as external input terminals, an input terminal (DRAIN) of the switching element 101, an auxiliary power supply voltage input terminal (VCC), an internal circuit power supply terminal (VDD), a feedback signal input terminal (FB), and an overcurrent protection value variable. There are six terminals: a terminal (CL), an output terminal of the switching element 101, and a GND terminal (GND) of the control circuit.
[0005]
Reference numeral 102 denotes a regulator for supplying the internal circuit power of the semiconductor device 130, a switch 102A for flowing a starting current to VCC, a switch 102B for flowing a starting current to VDD, and a current for supplying current from VCC to VDD. Switch 102C. Reference numeral 103 denotes a starting constant current source for supplying a starting circuit current, and supplies a starting current to the VCC via the switch 102A at the time of starting. In addition, when VCC is equal to or lower than a certain voltage after startup, a circuit current is supplied to VDD via the switch 102B.
[0006]
Reference numeral 107 denotes a start / stop circuit for controlling the start / stop of the semiconductor device 130. The VDD circuit detects a voltage of VDD, and when the VDD is below a certain level, a signal for stopping the switching operation of the switching element 101 is sent to a NAND circuit. To 105.
[0007]
A drain current detection circuit 106 detects a current flowing through the switching element 101, converts the detected current into a voltage signal, and outputs a signal to the comparator 108. A feedback signal control circuit 111 converts a current signal input to the FB terminal into a voltage signal and outputs the signal to the comparator 108. The comparator 108 outputs a signal to the reset terminal (R) of the RS flip-flop circuit 110 when the output signal from the feedback signal control circuit 111 is equal to the output signal from the drain current detection circuit 106.
[0008]
Reference numeral 112 denotes a clamp circuit for determining the maximum value of the output signal of the feedback signal control circuit 111, which determines the maximum value of the current flowing through the switching element 101 and functions as overcurrent protection for the switching element 101.
[0009]
Reference numeral 113 denotes a clamp voltage variable circuit for changing the clamp voltage value of the clamp circuit 112. When the current flowing from the CL terminal through the P-type MOSFET 114 increases, the clamp voltage by the clamp circuit 112 increases. That is, when the current flowing into the CL terminal increases, the overcurrent protection level of the switching element 101 increases. When the current flowing from the CL terminal through the P-type MOSFET 114 becomes a certain value or less, an oscillation frequency lowering signal is output to the oscillation circuit 109.
[0010]
The P-type MOSFET 114 is an element for passing a current from the CL terminal to the clamp voltage variable circuit 113 and fixing the voltage at the CL terminal to a constant value, and has a drain connected to the clamp circuit 112 and a gate connected to a reference voltage source. And its source is connected to the CL terminal.
[0011]
An oscillation circuit 109 outputs a maximum duty cycle signal 109A that determines the maximum duty cycle of the switching element 101 and a clock signal 109B that determines the oscillation frequency of the switching element 101. Further, when an oscillation frequency lowering signal is input from the clamp voltage variable circuit 113, the oscillation frequency is decreased. The maximum duty cycle signal 109A is input to the NAND circuit 105, and the clock signal 109B is input to the set terminal of the RS flip-flop circuit 110.
[0012]
To the NAND circuit 105, the output signal of the start / stop circuit 107, the maximum duty cycle signal 109A, and the output signal (Q) of the RS flip-flop circuit 110 are input. The output signal of the NAND circuit 105 is input to the gate driver 104 and controls the switching operation of the switching element 101.
[0013]
A transformer 140 includes a primary winding 140A, a secondary winding 140B, and an auxiliary winding 140C. A rectifying / smoothing circuit including a diode 131 and a capacitor 132 is connected to the auxiliary winding 140 </ b> C, which is utilized as an auxiliary power supply unit of the semiconductor device 130 and input to VCC.
[0014]
Reference numeral 133 denotes a VDD stabilization capacitor. Reference numeral 135 denotes a control signal transmission circuit for transmitting a control signal from the secondary side to the primary side, and includes a phototransistor 135A and a photodiode 135B. The collector of the phototransistor 135A is connected to VDD, and the emitter of the phototransistor 135A is connected to FB. A resistor 134 is connected between VCC and CL, and a current corresponding to the voltage of VCC flows into the CL terminal.
[0015]
A rectifying / smoothing circuit including a diode 150 and a capacitor 151 is connected to the secondary winding 140 </ b> B and connected to a load 155. The secondary side control circuit 156 includes a constant voltage control circuit 157 and a constant current control circuit 158, and the constant voltage control circuit 157 inputs a voltage divided by the detection resistors 152 and 153 of the secondary side output voltage VO. The current flowing through the photodiode 135B is controlled so that the secondary output voltage VO is constant. The constant current control circuit 158 operates when the current flowing through the output current detection resistor 154 exceeds a certain level, and controls the current flowing through the photodiode 135B so that the output current IO becomes a constant current.
[0016]
The operation of the switching power supply device configured as described above will be described below with reference to the drawings.
FIG. 7 is a time chart for explaining the operation waveform of each part in FIG. As shown in FIG. 7, when the power is turned on, a DC voltage VIN generated by rectifying and smoothing a commercial AC power supply, for example, is input to the input terminal of the apparatus. The DC voltage VIN is applied to the DRAIN terminal of the semiconductor device 130 via the primary winding 140A of the transformer 140.
[0017]
Then, a starting current generated by the starting constant current source 103 flows, charges the capacitor 132 via the switch 102A in the regulator 102, and the voltage of VCC increases. Since the switch 102C in the regulator 102 operates so that VDD becomes a constant voltage, a part of the starting current charges the capacitor 133 connected to VDD via the switch 102C, and the voltage of VDD also rises. To do.
[0018]
The switch 102B in the regulator 102 is in the off state of the switching operation (the state where the IDS flows) when the VCC voltage is equal to or lower than a certain value (VCC_UV), such as immediately after starting or at the time of overload, in the state after starting. Even if the VCC voltage is insufficient, VDD is not lowered.
[0019]
When VCC and VDD rise and VDD reaches the start-up voltage (VDD_UV) set by the start / stop circuit 107, oscillation starts and the switching operation of the switching element 101 (IDS switching) starts. At this time, since the switch 102A in the regulator 102 is turned off at the same time, the start-up current supply to the VCC is stopped. When the switching operation is started, energy is supplied to each winding of the transformer 140, a current flows through the secondary winding 140B and the auxiliary winding 140C, and VCC starts.
[0020]
The current flowing through the secondary winding 140 </ b> B is rectified and smoothed by the diode 150 and the capacitor 151 to become DC power and supplies power to the load 155. When the switching operation is repeated, the output voltage VO gradually increases, and when it reaches the voltage set by the output voltage detection resistors 152 and 153, the current flowing through the photodiode 135B is caused by the signal from the constant voltage control circuit 157. To increase. Then, the current flowing through the phototransistor 135A increases and the current flowing into the FB terminal also increases. When the FB terminal current increases, the voltage input to the comparator 108 decreases, so that the start-up is completed and the drain current IDS flowing through the switching element 101 decreases. By applying such negative feedback, the output voltage VO is stabilized.
[0021]
The current flowing through the auxiliary winding 140C is rectified and smoothed by the diode 131 and the capacitor 132, is used as an auxiliary power source for the semiconductor device 130, and supplies current to the VCC terminal. Once VDD reaches the start-up voltage, the switch 102A in the regulator 102 is turned off, so that the current of the semiconductor device after start-up is supplied from the auxiliary winding 140C.
[0022]
Since the polarity of the auxiliary winding 140C is the same as that of the secondary winding 140B, VCC is a voltage proportional to the output voltage VO. However, when the voltage of VCC is equal to or lower than a certain value (VCC_UV), the switch 102B in the regulator 102 becomes conductive. At this time, the startup current is supplied to VDD through the switch 102B, so that VDD Is stabilized.
[0023]
After the output voltage VO is stabilized, the output current IO flowing through the load 155 is increased, and when the current flowing through the output current detection resistor 154 reaches a certain value, the constant current control circuit 158 operates and flows through the photodiode 135B. Increase current. Then, the current flowing through the phototransistor 135A increases and the current flowing into the FB terminal also increases. When the FB terminal current increases, the voltage input to the comparator 108 decreases, so that the drain current IDS flowing through the switching element 101 decreases.
[0024]
By applying such negative feedback, the output current IO is controlled to be constant. Therefore, when the load current exceeds a certain level, the output current IO is constant, and the constant current drooping characteristic that the output voltage VO decreases is obtained.
[0025]
When the load is further increased, the output voltage VO further decreases. At this time, the auxiliary power supply voltage VCC also decreases. When VCC decreases, the current flowing into the CL terminal via the resistor 134 decreases accordingly. Then, the clamp voltage of the clamp circuit 112 is decreased by the clamp voltage variable circuit 113.
[0026]
Therefore, as VCC stops and VO and VCC decrease, the overcurrent protection value ILIMIT of the switching element 101 decreases. When the voltage drops to a certain output voltage, the ILIMIT operation starts, and the switching element 101 becomes excessive. The current protection state is entered, and the output current IO becomes smaller than the constant droop current value. Further, since the oscillation frequency lowering signal is output from the clamp voltage variable circuit 113 to the oscillation circuit 109, the oscillation frequency is lowered and the output current is rapidly reduced. Therefore, the output current voltage characteristics in FIG. 5 are as shown in FIG. Thus, when the output voltage VO drops below a certain voltage, the so-called U-shaped characteristic is such that the output current IO is reduced.
[0027]
FIG. 6 is a circuit diagram showing an example of the configuration of a semiconductor device for controlling a switching power supply that constitutes a conventional switching power supply device, and shows in detail the internal circuit of the semiconductor device 130 in FIG. Corresponds to that of FIG. 5, and the description of the same components is omitted.
[0028]
In FIG. 6, the start / stop circuit 107 includes a VCC comparator 107A, inverters 107B and 107D, an AND circuit 107C, and a VDD comparator 107E. VCC comparator 107A compares the voltage of VCC with a reference voltage and outputs a signal to inverter 107B. The VDD comparator 107E compares the VDD voltage with the reference voltage and outputs a signal to the NAND circuit 105, the AND circuit 107C, and the inverter 107D. Inverter 107B outputs a signal to AND circuit 107C. The switch 102B is controlled by the output of the AND circuit 107C, and the switch 102A is controlled by the output of the inverter 107D.
[0029]
The operation of the start / stop circuit 107 configured as described above will be described below. Before startup, the output of the VCC comparator 107A is low and the output of the VDD comparator 107E is low, so the switch 102A in the regulator 102 is on and the switch 102B is off. Therefore, the starting current of the starting constant current source 103 flows to VCC through the switch 102A. In addition, since the switch 102C operates so that VDD becomes a constant value, at the time of activation, the switch 102C also flows through the switch 102C to VDD.
[0030]
When the VDD voltage reaches the VDD start-up voltage set by the VDD comparator 107E, the output of the VDD comparator 107E becomes high level, the switching operation of the switching element 101 is enabled, and the switch 102A is turned off. It becomes. After the startup, when the VCC voltage is higher than the VCC startup voltage set by the VCC comparator 107A, the output of the VCC comparator 107A is at a high level, so the output of the AND circuit 107C is at a low level. Thus, the switch 102B is turned off.
[0031]
When the VCC voltage after startup is lower than the VCC startup voltage set by the VCC comparator 107A, the output of the VCC comparator 107A is at a low level, so the output of the AND circuit 107C is It becomes high level and the switch 102B is turned on. Therefore, since the VDD current after startup is supplied from either DRAIN or VCC, the operation of the semiconductor device continues even if VCC decreases immediately after startup or during overload.
[0032]
[Patent Document 1]
JP-A-6-149396
[0033]
[Problems to be solved by the invention]
However, the conventional switching power supply device as described above has the following problems and will be described with reference to the drawings.
[0034]
In general, a switching power supply must have a protection function when the load is short-circuited, and even if the load short-circuit condition continues, the load short-circuit current is reduced so that the components of the switching power supply do not generate heat or break down. It is desirable to make it as small as possible. For this reason, a protection circuit is provided for suppressing the output current when the load is short-circuited.
[0035]
In the conventional switching power supply device as shown in FIG. 5, it is possible to reduce the output current when the load is short-circuited by detecting the load short-circuit state with the VCC voltage and suppressing the overcurrent protection value of the switching element and the oscillation frequency. However, if the VCC voltage drops to a certain value during overload, the current supply to the control circuit is switched to DRAIN, so the VCC load becomes lighter with this voltage as a boundary, so the drop in VCC slows down and the overcurrent The decrease in the protection value is also delayed.
[0036]
Therefore, as shown in FIG. 8B, at the moment of load short-circuiting, the drain current increases to the maximum value of the overcurrent protection value, and VCC rises momentarily and then gradually decreases. Since the decrease is delayed, the decrease in the overcurrent protection value is also delayed. In some cases, the decrease in VCC and the decrease in the overcurrent protection value are balanced, and the VCC and the overcurrent protection value may be stabilized.
[0037]
In this case, as shown in FIG. 10, the original U-shaped protection characteristic cannot be obtained and the load short-circuit current becomes large.
Also, the VCC voltage at the start of startup is equal to the voltage at which the current supply to the semiconductor device is switched from the DRAIN side. Since the overcurrent protection value is small, sufficient power cannot be supplied to the secondary side, and the system cannot be started.
[0038]
The present invention solves the above-mentioned conventional problems, and can start up smoothly regardless of the voltage setting to enter the U-shaped protection, and also against the load fluctuation at the time of load fluctuation such as overload. Therefore, it is possible to obtain a good U-shaped protection characteristic that can be applied quickly and quickly, and to prevent deterioration of circuit components due to overcurrent. A switching power supply device capable of reliably protecting against destruction due to overcurrent.
[0039]
[Means for Solving the Problems]
In order to solve the above problems, a switching power supply device according to claim 1 of the present invention is supplied to a transformer having a primary winding, a secondary winding, and an auxiliary winding, and to the primary winding. A switching element for switching on and off the first DC voltage by a switching control signal to the switching control terminal, and a secondary AC voltage generated in the secondary winding by the switching of the first DC voltage And an output voltage generation circuit that generates a second DC voltage as an output voltage by smoothing, an output voltage control circuit that stabilizes and controls the second DC voltage, and the switching element to its switching control terminal A control circuit that supplies the switching control signal to control switching of the first DC voltage; and a voltage signal that is stabilized and controlled by the output voltage control circuit. Is transmitted to the control circuit as a signal for controlling the switching of the first DC voltage by the control circuit, and the auxiliary is generated in the auxiliary winding by the switching of the first DC voltage. And an auxiliary power supply voltage generating circuit for generating an auxiliary power supply voltage of the control circuit by rectifying and smoothing the side AC voltage, and used in the control circuit from the first DC voltage and the auxiliary power supply voltage. A regulator for generating various power supply voltages, an oscillator for generating the switching control signal, a current detection circuit for detecting a current flowing through the switching element and outputting it as an element current detection signal, and the control signal transmission circuit A feedback signal control circuit that outputs a control signal of A comparator that compares the feedback signal and outputs the comparison result signal, a switching signal control circuit that controls the current amount and output of the switching control signal based on the comparison result signal from the comparator, and A clamp circuit that clamps the maximum value of the element current detection signal at the time of comparison by the comparator, and a clamp voltage by the clamp circuit is varied according to the voltage value of the auxiliary power supply voltage, and the clamp voltage is less than a certain value If it is low, a clamp voltage variable circuit that supplies an oscillation frequency lowering signal for lowering the oscillation frequency of the oscillator to the oscillator, and a dummy load circuit connected to the auxiliary power supply voltage, The regulator includes a first switch for flowing a starting current to an auxiliary power supply voltage input terminal, a second switch for flowing a starting current to an internal circuit power supply terminal, and the internal circuit power supply from the auxiliary power supply voltage input terminal. A third switch for supplying a current to the terminal, operates to supply power from the auxiliary power supply voltage to the control circuit, and when the auxiliary power supply voltage is lower than a predetermined value, the first switch Configured to supply power to the control circuit from the DC voltage of The dummy load circuit is configured to conduct when the auxiliary power supply voltage becomes a certain voltage or less.
[0040]
As described above, when the auxiliary power supply voltage becomes a certain voltage or less during overload, the dummy load circuit becomes conductive, so that the auxiliary power supply voltage is rapidly lowered, and the response to overload can be improved.
[0043]
Further, the claims of the present invention 2 The switching power supply device according to claim 1 In the switching power supply device described above, the clamp voltage variable circuit is configured to vary the clamp voltage so that the clamp voltage becomes smaller as the voltage value of the auxiliary power supply voltage becomes lower. .
[0044]
As described above, since the overcurrent protection value of the switching element decreases as the auxiliary power supply voltage decreases, the overcurrent protection value when the load is short-circuited decreases, and the output current when the load is short-circuited can be reduced.
[0045]
Further, the claims of the present invention 3 The switching power supply device according to claim 1 In the switching power supply device described above, the clamp voltage variable circuit fixes the clamp voltage to a maximum value until the oscillation frequency reduction signal is output, and outputs the oscillation frequency reduction signal at the same time as the auxiliary power supply. The clamp voltage is made variable so that the lower the voltage value, the smaller the clamp voltage becomes.
[0046]
As described above, when the output voltage drops, the overcurrent protection value of the switching element decreases after the oscillation frequency decreases, so the point at which the output current begins to decrease does not affect the variation in the overcurrent protection value. Can be facilitated.
[0047]
Further, the claims of the present invention 4 The switching power supply device according to claim 1 is a claim. 3 4. The switching power supply device according to claim 1, wherein the clamp voltage variable circuit is configured to vary the clamp voltage so that a minimum value thereof is about 10% of a maximum value. .
[0048]
Further, the claims of the present invention 5 The switching power supply device according to claim 1 is a claim. 4 The switching power supply device according to any one of the above, wherein the oscillator is configured to have an oscillation frequency of about 1/5 of a normal time when the oscillation frequency lowering signal is input. And
[0049]
As described above, the output current when the load is short-circuited can be sufficiently reduced.
Further, the claims of the present invention 6 The switching power supply device according to claim 1 is a claim. 5 The switching power supply device according to any one of claims 1 to 3, wherein the switching element and the control circuit are formed on the same semiconductor substrate, the two connection terminals between the first DC voltage and the switching element, and the control A connection terminal between the circuit and the auxiliary power supply voltage, a power supply voltage output terminal from the control circuit, an input terminal of the feedback signal to the control circuit, and an input terminal of the auxiliary power supply voltage to the clamp voltage variable circuit It is characterized by comprising as a semiconductor device having.
[0050]
As described above, the number of parts for configuring the circuit can be reduced, and the size and weight can be easily reduced.
[0051]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a switching power supply device according to an embodiment of the present invention will be specifically described with reference to the drawings.
[0052]
FIG. 1 is a block diagram showing a configuration example of the switching power supply device according to the present embodiment. In FIG. 1, reference numeral 30 denotes a semiconductor device for controlling a switching power supply device, which is composed of a switching element 1 and its control circuit.
[0053]
The semiconductor device 30 has, as external input terminals, an input terminal (DRAIN) of the switching element 1, an auxiliary power supply voltage input terminal (VCC), an internal circuit power supply terminal (VDD), a feedback signal input terminal (FB), and an overcurrent protection value variable. 6 terminals of a terminal (CL) and a GND terminal (GND) of the control circuit which is also an output terminal of the switching element 1 are provided.
[0054]
Reference numeral 2 denotes a regulator for supplying power for the internal circuit of the semiconductor device 30. The switch 2A is used for supplying the startup current to VCC, the switch 2B is used for supplying the startup current to VDD, and the current is supplied from VCC to VDD. Switch 2 </ b> C for performing the operation.
[0055]
Reference numeral 3 denotes a starting constant current source for supplying a starting circuit current, and supplies the starting current to the VCC via the switch 2A at the time of starting. When VCC is equal to or lower than a certain voltage after startup, a circuit current is supplied to VDD via the switch 2B.
[0056]
Reference numeral 7 denotes a start / stop circuit for controlling the start and stop of the semiconductor device 30. When the VDD voltage is below a certain level, a signal for stopping the switching operation of the switching element 1 is detected by a NAND circuit. Output to 5. Further, even after VDD reaches a constant voltage, a signal for turning on the switch 2A is output to the regulator 2 until VCC reaches the constant voltage, and a starting current flows from DRAIN to VCC.
[0057]
A dummy load circuit 15 is connected between VCC and GND, and gives a dummy load to the VCC in a pseudo manner while the switch 2B is turned on by a signal from the start / stop circuit 7.
[0058]
Reference numeral 6 denotes a drain current detection circuit for detecting a current flowing through the switching element 1, which converts the detected current into a voltage signal and outputs a signal to the plus terminal (+ terminal) of the comparator 8 as an element current detection signal. To do. A feedback signal control circuit 11 converts a current signal input to the FB terminal into a voltage signal and outputs a signal to the minus terminal (−terminal) of the comparator 8.
[0059]
The comparator 8 outputs a signal to the reset terminal (R) of the RS flip-flop circuit 10 when the output signal from the feedback signal control circuit 11 becomes equal to the output signal from the drain current detection circuit 6.
[0060]
Reference numeral 12 denotes a clamp circuit for determining the maximum value of the output signal of the feedback signal control circuit 11, which determines the maximum value of the current flowing through the switching element 1 and functions as overcurrent protection for the switching element 1.
[0061]
Reference numeral 13 denotes a clamp voltage variable circuit for changing the clamp voltage value of the clamp circuit 12. When the current flowing through the P-type MOSFET 14 from the CL terminal increases, the clamp voltage increases by the clamp voltage variable circuit 13. That is, when the current flowing into the CL terminal increases, the overcurrent protection level of the switching element 1 increases. Further, when the current flowing from the CL terminal through the P-type MOSFET 14 becomes a certain value or less, an oscillation frequency lowering signal is output to the oscillation circuit 9.
[0062]
The P-type MOSFET 14 is an element for passing a current from the CL terminal to the clamp voltage variable circuit 13 and fixing the voltage at the CL terminal to a constant value, and its drain is connected to the clamp voltage variable circuit 13 and its gate is a reference voltage. The source is connected to the CL terminal.
[0063]
An oscillation circuit 9 outputs a maximum duty cycle signal 9A that determines the maximum duty cycle of the switching element 1 and a clock signal 9B that determines the oscillation frequency of the switching element 1. Further, when the oscillation frequency lowering signal is input from the clamp voltage variable circuit 13, the oscillation frequency is decreased. The maximum duty cycle signal 9A is input to the NAND circuit 5, and the clock signal 9B is input to the set terminal (S) of the RS flip-flop circuit 10.
[0064]
The NAND circuit 5 receives the output signal from the start / stop circuit 7, the maximum duty cycle signal 9 A, and the output signal from the terminal Q of the RS flip-flop circuit 10. The output signal of the NAND circuit 5 is input to the gate driver 4 and controls the switching operation of the switching element 1.
[0065]
A transformer 40 has a primary winding 40A, a secondary winding 40B, and an auxiliary winding 40C. A rectifying / smoothing circuit including a diode 31 and a capacitor 32 is connected to the auxiliary winding 40C, and is used as an auxiliary power supply unit of the semiconductor device 30 and input to VCC. Reference numeral 33 denotes a VDD stabilization capacitor.
[0066]
Reference numeral 35 denotes a control signal transmission circuit for transmitting a control signal from the secondary side for taking out the output voltage of the power source to the primary side, and includes a phototransistor 35A and a photodiode 35B. The collector of the phototransistor 35A is connected to VDD, and the emitter of the phototransistor 35A is connected to FB. A resistor 34 is connected between VCC and CL, and a current corresponding to the voltage of VCC flows into the CL terminal.
[0067]
A rectifying / smoothing circuit including a diode 50 and a capacitor 51 is connected to the secondary winding 40 </ b> B and connected to a load 55. The secondary side control circuit 56 includes a constant voltage control circuit 57 and a constant current control circuit 58. The constant voltage control circuit 57 inputs a voltage divided by the detection resistors 52 and 53 of the secondary side output voltage VO. Then, the current flowing through the photodiode 35B is controlled so that the secondary output voltage VO is constant. The constant current control circuit 58 operates when the current flowing through the output current detection resistor 54 exceeds a certain level, and controls the current flowing through the photodiode 35B so that the output current IO becomes a constant current.
[0068]
The operation of the switching power supply device configured as described above will be described below with reference to the drawings.
FIG. 4 is a time chart for explaining the operation waveforms of the respective parts in FIG. As shown in FIG. 4, when the power is turned on, a DC voltage VIN, for example, produced by rectifying and smoothing a commercial AC power supply is input to the input terminal of the apparatus. The DC voltage VIN is applied to the DRAIN terminal of the semiconductor device 30 through the primary winding 40A of the transformer 40.
[0069]
Then, a startup current generated by the startup constant current source 3 flows, charges the capacitor 32 via the switch 2A in the regulator 2, and the voltage of VCC rises. Since the switch 2C in the regulator 2 operates so that VDD becomes a constant voltage, a part of the starting current charges the capacitor 33 connected to VDD via the switch 2C, and the voltage of VDD also rises. To do.
[0070]
The switch 2B in the regulator 2 is in the off period of the switching operation (the IDS is flowing) when the VCC voltage is below a certain value (VCC_UV), such as immediately after startup or during overload, in the state after startup. Even if the VCC voltage is insufficient, VDD is not lowered.
[0071]
When VCC and VDD rise and VDD reaches the start-up voltage (VDD_UV) set by the start / stop circuit 7, oscillation starts and the switching operation of the switching element 1 (IDS switching) starts. The internal switch 2A is turned on until VCC reaches the set voltage. Therefore, VCC at the start of startup rises to the set voltage, turns off after reaching the set voltage, and supply of the startup current to VCC stops. When the switching operation is started, energy is supplied to each winding of the transformer 40, and a current flows through the secondary winding 40B and the auxiliary winding 40C.
[0072]
The current flowing through the secondary winding 40 </ b> B is rectified and smoothed by the diode 50 and the capacitor 51 to become DC power and supplies power to the load 55. By repeating the switching operation, the output voltage VO gradually increases, and when it reaches the voltage set by the output voltage detection resistors 52 and 53, a current flowing through the photodiode 35B is caused by a signal from the constant voltage control circuit 57. To increase. Then, the current flowing through the phototransistor 35A increases and the current flowing into the FB terminal also increases. When the FB terminal current increases, the voltage input to the comparator 8 decreases, so that the startup is completed and the drain current IDS flowing through the switching element 1 decreases. By applying such negative feedback, the output voltage VO is stabilized.
[0073]
The current flowing through the auxiliary winding 40C is rectified and smoothed by the diode 31 and the capacitor 32, and is used as an auxiliary power source for the semiconductor device 30 to supply current to the VCC terminal. Once VDD reaches the starting voltage, the oscillation operation of the switching element 1 is started. After that, when VCC further increases and reaches the set voltage, the switch 2A in the regulator 2 is turned off. The current of 30 is supplied from the auxiliary winding 40C.
[0074]
Since the polarity of the auxiliary winding 40C is the same as that of the secondary winding 40B, VCC is a voltage proportional to the output voltage VO. However, when the voltage of VCC is equal to or lower than a certain value (VCC_UV), the switch 2B in the regulator 2 becomes conductive. At this time, the startup current is supplied to VDD via the switch 2B, so that VDD is Stabilized.
[0075]
After the output voltage VO is stabilized, the output current IO flowing through the load 55 is increased, and when the current flowing through the output current detection resistor 54 reaches a certain value, the constant current control circuit 58 operates and flows through the photodiode 35B. Increase current. Then, the current flowing through the phototransistor 35A increases and the current flowing into the FB terminal also increases. When the FB terminal current increases, the voltage input to the comparator 8 decreases, so that the drain current IDS flowing through the switching element 1 decreases.
[0076]
By applying such negative feedback, the output current IO is controlled to be constant. Therefore, when the load current exceeds a certain level, the output current IO is constant, and the constant current drooping characteristic that the output voltage VO decreases is obtained.
[0077]
When the load is further increased, the output voltage VO further decreases. At this time, the auxiliary winding voltage VCC also decreases. When VCC decreases, the current flowing into the CL terminal via the resistor 34 decreases accordingly. Then, the clamp voltage of the clamp circuit 12 is decreased by the clamp voltage variable circuit 13.
[0078]
Therefore, as VCC stops and VO and VCC decrease, the overcurrent protection value ILIMIT of the switching element 1 decreases. When the voltage drops to a certain output voltage, the ILIMIT operation starts and the switching element 1 The current protection state is entered, and the output current IO becomes smaller than the constant droop current value. Further, since the oscillation frequency lowering signal is output from the clamp voltage variable circuit 13 to the oscillation circuit 9, the oscillation frequency is lowered and the output current is rapidly reduced. Therefore, the output current-voltage characteristic in FIG. 1 is as shown in FIG. Thus, when the output voltage VO drops below a certain voltage, the so-called U-shaped characteristic is such that the output current IO is reduced.
[0079]
Here, when VCC drops when overload occurs and VCC drops to the voltage set by the start / stop circuit 7, the switch 2B in the regulator 2 becomes conductive and current is supplied from DRAIN to VDD. Therefore, the load on VCC is reduced. At this time, the dummy load circuit 15 is turned on / off in synchronization with the on / off timing of the switch 2B, so that VCC is equal to or lower than the set voltage (VCC_UV) as shown in FIG. Even if the voltage drops to the level, the rate of decrease in the VCC does not change, and continues to decrease while remaining constant.
[0080]
FIG. 2 is a circuit diagram showing a configuration example of a semiconductor device for controlling a switching power source that constitutes the switching power source device of the present embodiment. FIG. 2 shows details of the internal circuit of the semiconductor device 30 in FIG. 1, and the reference numerals in the drawing correspond to those in FIG. 1, and thus the description of the same components is omitted. In FIG. 2, the start / stop circuit 7 includes a VCC comparator 7A, inverters 7B and 7D, an AND circuit 7C, a VDD comparator 7E, an RS flip-flop circuit 7F, an OR circuit 7G, and a NAND circuit 7H.
The VCC comparator 7A compares the VCC voltage with the reference voltage (VCC_UV) and outputs a signal to the inverter 7B and the set terminal (S) of the RS flip-flop circuit 7F. The VDD comparator 7E compares the VDD voltage with the reference voltage (VDD_UV) and outputs a signal to the NAND circuit 5, the AND circuit 7C, the inverter 7D, and the NAND circuit 7H. Inverter 7B outputs a signal to AND circuit 7C. The inverter 7D outputs a signal to the reset terminal (R) of the RS flip-flop circuit 7F. The OR circuit 7G receives the output signal from the Q terminal of the RS flip-flop circuit 7F and the output signal of the gate driver 4, and outputs a signal to the NAND circuit 7H. The switch 2B is controlled by the output of the AND circuit 7C, and the switch 2A is controlled by the output of the NAND circuit 7H. The output of the NAND circuit 7C controls the dummy load circuit 15.
[0081]
The operation of the start / stop circuit 7 configured as described above will be described below.
Before startup, the output of the VCC comparator 7A is low and the output of the VDD comparator 7E is low, so that the switch 2A in the regulator 2 is on and the switch 2B is off. Therefore, the starting current of the starting constant current source 3 flows to VCC through the switch 2A. Further, since the switch 2C operates so that VDD becomes a constant value, at the time of activation, the switch 2C also flows through the switch 2C to VDD. When the VDD voltage reaches the VDD start-up voltage set by the VDD comparator 7E, the output of the VDD comparator 7E becomes high level, and the switching operation of the switching element 1 becomes possible.
[0082]
Since the voltage of VCC at this time is lower than the VCC starting voltage set by the VCC comparator 7A, the output of the flip-flop circuit 7F is at a low level. Therefore, when the output of the gate driver 4 is at a low level, that is, during the OFF period of the switching element 1, the output of the OR circuit 7G is at a low level, so that the regulator 2A is turned on. The voltage continues to rise. When the VCC starting voltage set by the VCC comparator 7A is reached, the set signal is input to the flip-flop circuit 7F, so that the output of the OR circuit 7G becomes high level and the switch 2A is turned off.
[0083]
After the startup, when the VCC voltage becomes lower than the VCC startup voltage set by the VCC comparator 7A, the output of the VCC comparator 7A becomes low level, so that the output of the AND circuit 7C becomes high level, and the switch Since 2B is turned on, VDD is held constant by the current from DRAIN.
[0084]
Therefore, although the VDD current after startup is supplied from VCC, when VCC decreases during an overload, the VDD current supply is switched from the DRAIN side, and the operation of the semiconductor device continues.
[0085]
FIG. 3A is a circuit diagram showing a configuration example of the dummy load circuit 15 in the switching power supply device of the present embodiment. In FIG. 3A, the dummy load circuit 15 includes a switching element 15A, a mirror circuit including transistors 15B and 15C, and a constant current source 15D. The drain of the switching element 15A is connected to VCC and the gate thereof. Is an input terminal of the dummy load circuit, and its source is connected to the transistor 15B of the mirror circuit.
[0086]
The operation of the dummy load circuit 15 configured as described above will be described below.
When the switch 2B in the regulator 2 is turned on, a signal for turning on the switching element 15A is input. Therefore, a constant current set by the mirror circuit including the transistors 15B and 15C and the constant current source 15D flows between VCC and GND. It becomes like this. Accordingly, when VCC becomes below a certain level during overload, a dummy current flows through VCC while the current is supplied from DRAIN to VDD, so that the rate of decrease in VCC does not slow down. Here, if the dummy current value is made equal to the entire circuit consumption current of the semiconductor device 30, the rate of decrease in VCC at the time of overload becomes constant.
[0087]
FIG. 3B is a circuit diagram showing another configuration example of the dummy load circuit 15 in the switching power supply device of the present embodiment. The difference from FIG. 3 (a) is that the dummy load current value of VCC is set by the resistors 15E and 15F. After the drop in VCC, the current value determined by the resistors 15E and 15F becomes a dummy current, which is excessive. It is possible to increase the speed of decreasing VCC at the time of load.
[0088]
【The invention's effect】
As described above, according to the present invention, it is possible to reduce the output current when the load is short-circuited, and to realize an excellent load short-circuit protection function that can quickly cope with the response when the load suddenly changes.
[0089]
Also, the VCC voltage at the start of startup rises to a voltage higher than the voltage at which the current supply to the semiconductor device is switched from the DRAIN terminal side, so the voltage entering the U-shaped protection is set to a voltage higher than this switching voltage. However, it does not become impossible to start up, and there is also an effect that the setting range of the U-shaped protection can be widened according to the specifications of the switching power supply.
[0090]
Even if the secondary constant current control circuit required for the switching power supply for the charger is configured, the overcurrent protection function operates when the load is short-circuited, and the load short-circuit current can be reduced. The addition is unnecessary, and the switching element and the control circuit can be easily integrated by providing them in the same semiconductor. When the main circuit components are provided in such a single semiconductor, The number of parts for configuring the circuit can be reduced, and there is an effect that the power supply device can be easily reduced in size, weight, and cost.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of a switching power supply device according to an embodiment of the present invention.
FIG. 2 is a block diagram showing a configuration example of a control circuit in the switching power supply device according to the embodiment;
FIG. 3 is a circuit diagram showing a configuration example of a dummy load circuit in the switching power supply device according to the embodiment;
FIG. 4 is a time chart showing the operation of the switching power supply device according to the embodiment;
FIG. 5 is a block diagram showing a configuration example of a conventional switching power supply device.
FIG. 6 is a block diagram showing a configuration example of a control circuit in the conventional switching power supply device;
FIG. 7 is a time chart showing the operation of the conventional switching power supply device;
FIG. 8 is a time chart for explaining the operation when the load is short-circuited in the switching power supply according to the embodiment of the present invention, compared with the conventional one.
FIG. 9 is an explanatory diagram of output voltage current characteristics in the switching power supply device according to the embodiment;
FIG. 10 is an explanatory diagram of output voltage-current characteristics in a conventional switching power supply device.
[Explanation of symbols]
1 Switching element
2 Regulator
2A, 2B, 2C switch
3 Constant current source for starting
4 Gate driver
5 NAND circuit
6 Drain current detection circuit
7 Start / stop circuit
7A VCC comparator
7B, 7D inverter
7C AND circuit
7E VDD comparator
7F RS flip-flop circuit
7G OR circuit
7H NAND circuit
8 comparator
9 Oscillator circuit
9A Maximum duty cycle signal
9B clock signal
10 RS flip-flop circuit
11 Feedback signal control circuit
12 Clamp circuit
13 Clamp voltage variable circuit
14 P-type MOSFET
15 Dummy load circuit
15A switching element
15B, 15C N-type MOSFET
15D constant current source
15E, 15F resistance
30 Semiconductor device for switching power supply
31 diode
32, 33 capacitors
34 Resistance
35 Control signal transmission circuit
35A phototransistor
35B photodiode
40 transformer
40A primary winding
40B secondary winding
40C Auxiliary winding
50 diodes
51 capacitors
52, 53 Output voltage detection resistor
54 Output current detection resistor
55 Load
56 Secondary control circuit
57 Constant voltage control circuit
58 Constant current control circuit

Claims (6)

A transformer having a primary winding, a secondary winding, and an auxiliary winding, and switching for switching on and off the first DC voltage supplied to the primary winding by a switching control signal to a switching control terminal An output voltage generation circuit that rectifies and smoothes a secondary AC voltage generated in the secondary winding by switching the first DC voltage and generates a second DC voltage as an output voltage; An output voltage control circuit for stabilizing and controlling the DC voltage of 2; a control circuit for controlling the switching of the first DC voltage by supplying the switching control signal to the switching control terminal of the switching element; A signal for controlling the switching of the first DC voltage by the control circuit, using the voltage signal that is stabilized and controlled by the output voltage control circuit. Then, the control signal transmission circuit for transmitting to the control circuit and the auxiliary AC voltage generated in the auxiliary winding by switching the first DC voltage are rectified and smoothed to generate the auxiliary power supply voltage for the control circuit. An auxiliary power supply voltage generation circuit for generating a regulator for generating various power supply voltages used in the control circuit from the first DC voltage and the auxiliary power supply voltage, and for generating the switching control signal. An oscillator; a current detection circuit that detects a current flowing through the switching element and outputs it as an element current detection signal; a feedback signal control circuit that outputs a control signal from the control signal transmission circuit as a feedback signal; and the element current detection A comparator that compares a signal with the feedback signal and outputs a comparison result signal; A switching signal control circuit for controlling the current amount and output of the switching control signal based on a comparison result signal from the comparator, and a clamp circuit for clamping the maximum value of the element current detection signal at the time of comparison by the comparator; The clamp voltage by the clamp circuit is varied according to the voltage value of the auxiliary power supply voltage, and when the clamp voltage is lower than a certain value, an oscillation frequency lowering signal for lowering the oscillation frequency of the oscillator is provided. A clamp voltage variable circuit to be supplied to the oscillator, and a dummy load circuit connected to the auxiliary power supply voltage;
The regulator includes a first switch for flowing a starting current to an auxiliary power supply voltage input terminal, a second switch for flowing a starting current to an internal circuit power supply terminal, and the internal circuit power supply from the auxiliary power supply voltage input terminal. A third switch for supplying a current to the terminal, operates to supply power from the auxiliary power supply voltage to the control circuit, and when the auxiliary power supply voltage is lower than a predetermined value, the first switch Configured to supply power to the control circuit from the DC voltage of
The switching power supply device according to claim 1, wherein the dummy load circuit is configured to conduct when the auxiliary power supply voltage becomes a predetermined voltage or less. 2. The switching power supply device according to claim 1, wherein the clamp voltage variable circuit is configured to vary the clamp voltage so that the clamp voltage becomes smaller as a voltage value of the auxiliary power supply voltage becomes lower. . The clamp voltage variable circuit fixes the clamp voltage to a maximum value until the oscillation frequency lowering signal is output, and simultaneously outputs the oscillation frequency lowering signal, and at the same time, the clamp power voltage decreases as the auxiliary power supply voltage decreases. The switching power supply device according to claim 1, wherein the switching power supply device is configured to be variable so that the voltage is reduced. The clamp voltage variable circuit, the clamp voltage, according to the so that the minimum value is about 10% of the maximum value, any one of claims 1 to 3, characterized by being configured so as to variably Switching power supply. 5. The oscillator according to claim 1 , wherein the oscillation frequency is configured to be approximately 1/5 of a normal frequency when the oscillation frequency reduction signal is input. The switching power supply device described. The switching element and the control circuit are formed on the same semiconductor substrate, two connection terminals between the first DC voltage and the switching element, a connection terminal between the control circuit and the auxiliary power supply voltage, A semiconductor device comprising: a power supply voltage output terminal from a control circuit; an input terminal for the feedback signal to the control circuit; and an input terminal for the auxiliary power supply voltage to the clamp voltage variable circuit. The switching power supply device according to any one of claims 1 to 5.

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