JP3748563B2 - Detector and array antenna device - Google Patents

Description

  The present invention relates to a detector that despreads and detects a modulated signal multiplexed by a spread code, and an array antenna apparatus using the detector.

  2. Description of the Related Art In digital communication systems, a system for reducing the size of a device by multiplexing and transmitting signals of a plurality of channels through one physical transmission path is widely used. One of them is a code spread multiplexing method. In this method, on the signal generation side, each of a plurality of signals is multiplied by a spread code signal orthogonalized to each other, and added and synthesized to generate a code spread multiplexed signal. On the signal reproduction side, the multiplexed signal is again multiplied by the orthogonal spread code signal and integrated over the spread code section to reproduce the signal. Here, the sign is orthogonal means that the value becomes zero when two codes are multiplied and integrated. If the characteristics of orthogonal codes are used, the signal reproduction side does not reproduce signals other than the signal that it intends to reproduce, but separates and reproduces the signal from the multiplexed signal of multiple channels. be able to. The code spread multiplexing method is used for transmission / reception waves of a mobile communication system and multi-channel transmission lines in the communication system, such as a power supply unit of an array antenna. The code spread multiplexing method is disclosed in the following document.

Marubayashi Gen, Nakagawa Masao, Kawano Ryuji, "Spread Spectrum Communication and its Applications", The Institute of Electronics, Information and Communication Engineers, October 1998

  In general, a signal that is code spread multiplexed on the signal generation side is often transmitted as an analog signal. For example, in the array antenna apparatus 3 shown in FIG. 6, the signal received from each antenna 32 is code spread multiplexed by the code spread multiplexer 34. The multiplexed modulated signal is frequency-converted to an intermediate frequency band by the analog receiver 38 and then subjected to digital quadrature detection and despreading processing by the detector 1. Digital quadrature detection and despreading processing are performed by a detector 1 as shown in FIG. The code spread multiplexed modulation signal input from the analog circuit is converted into a digital signal by the A / D converter 10 and then input to the detector 2 corresponding to each antenna 32. The input code spread multiplexed modulation signal is multiplied by a spread code by a spread code multiplier 14, and then an in-phase component and a quadrature component are extracted by a digital quadrature detector 16. Is given. By such processing, a baseband signal composed of I channel and Q channel is obtained from the output of the integrator 24. When the I channel signal and the Q channel signal are plotted in the IQ coordinate system, a figure corresponding to the complex amplitude vector locus of the baseband signal as shown in FIG. 8 is obtained with time change, so-called constellation is obtained. A digital signal is reproduced.

  In general, in an analog circuit, the frequency band of a transmission signal cannot be expanded due to effective use of the frequency or due to the frequency characteristics of the circuit. Therefore, in the analog receiver 38 in FIG. 6, it must be sufficiently considered that the code spread multiplexed modulation signal is subjected to frequency band limitation.

  Waveform distortion is a problem caused by the signal being subjected to frequency band limitation. Since the code spread multiplexed modulation signal is generated by multiplying the square wave spread code signal, it has discontinuities at the code change points of the spread code. A signal exhibiting a sharp amplitude change occupies a wide frequency bandwidth because its frequency spectrum is widened. FIG. 9 (e) shows an example of one code spread modulation signal (hereinafter referred to as a single code spread modulation signal) among signals constituting a multiplexed signal having such discontinuous points. This signal is a signal obtained by multiplying the QPSK modulation signal shown in FIG. 9A by the spreading code signal shown in FIG. 9B, and in FIG. 9C to FIG. Is shown enlarged. The section of the spread code signal is set to 1 / n (n is a natural number) of one symbol section of the QPSK signal. When a signal occupying such a wide frequency bandwidth is transmitted to an analog circuit, the signal is subjected to frequency band limitation, and a waveform near a discontinuous point where the amplitude change is particularly steep is distorted. FIG. 9 (f) shows an example of a single code spread modulation signal having a frequency band and a distorted waveform. Such waveform distortion causes an error in the phase and amplitude of the digital quadrature detection signal. FIG. 10 shows a constellation in the case where a detection error occurs, and it can be seen that it is difficult to obtain a digital signal corresponding to the locus in this state.

  The present invention has been made to solve such a problem, and provides a detector for a code spread multiplexed modulation signal in which a detection error based on waveform distortion caused by frequency band limitation is reduced.

The present invention is multiplexed by spreading codes, a detector for detecting the multiplexed signals inputted as a sample value obtained by sampling the amplitude despreading processing on a part of the sample value before Symbol multiplexed signal the thinned out process which does not contribute to the despreading processing, the thinning processing, by performing relative sample values of sample point nearest to the discontinuous point of the multiplexed signal before being sampled, the discontinuous point The contribution of the waveform distortion component generated in the multiplexed signal to the despreading process due to the presence of is reduced .

Further, in the detector according to the present invention, the decimation processing detects a code change point of the spreading code, specifies the sample value not to contribute to the despreading processing based on the detection result, and specifies the specified value. Further, it is preferable that the sample value is configured to be performed by a thinning-out device that performs processing that does not contribute to the despreading processing.

The present invention is also a detector for detecting by performing despread processing on a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value, and one of the sample values of the multiplexed signal. A decimation process that does not contribute to the despreading process, the decimation process is performed on the sample value of the sample point closest to the discontinuous point of the multiplexed signal before being sampled, and the decimation process, Decimation for detecting a code change point of the spreading code, specifying the sample value that does not contribute to the despreading process based on the detection result, and performing a process that does not contribute the specified sample value to the despreading process It is performed by a vessel.

In the detector according to the present invention, a spread code multiplier for multiplying and outputting the multiplexed signal and the spread code, and integrating the signal after the spread code multiplier is multiplied by the spread code multiplier It is preferable that the despreading process is performed by the spreading code multiplier and the integrator . In the detector according to the present invention, it is preferable that the decimation process is performed at an input of the integrator. In the detector according to the present invention, it is preferable that the decimation process is performed at the input of the detector.

The present invention is also a detector for detecting by performing despreading processing on a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value, wherein the spreading code, the multiplexed signal, A spreading code multiplier that outputs a spreading code multiplication signal, an in-phase component extractor that extracts an in-phase component of the spreading code multiplication signal, and an orthogonal component extractor that extracts an orthogonal component of the spreading code multiplication signal. An in-phase component decimator that outputs a part of the sample value of the in-phase component as zero and outputs it as a thinned out in-phase component; An in-phase component integrator that integrates and outputs the decimation in-phase component, and a quadrature component integrator that integrates and outputs the decimation quadrature component. And a means for replacing a sample value input to the in-phase component decimation unit at a timing closest to a timing at which a code of the spreading code changes among sample values of the in-phase component, and the quadrature component decimation unit Comprises means for replacing the sample value input to the orthogonal component decimation unit with zero at the timing closest to the timing at which the code of the spreading code changes among the sample values of the orthogonal component.

The present invention is also a detector for detecting by performing despread processing on a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value, and one of the sample values of the multiplexed signal. An input decimation unit that replaces the part with zero and outputs as a decimation multiplexed signal, a demultiplexing code multiplier that multiplies the decimation multiplexed signal and the spreading code, and outputs as a decimation spreading code multiplication signal, and the decimation spreading code An in-phase component extractor for extracting the in-phase component of the multiplication signal; an orthogonal component extractor for extracting the quadrature component of the decimation-spread code multiplication signal; an in-phase component integrator for integrating and outputting the in-phase component; and the quadrature component A quadrature component integrator that integrates and outputs the signal, and the input decimation unit is most suitable at a timing at which a code of the spreading code changes among sample values of the multiplexed signal. Characterized in that it comprises a means for replacing a zero sample value input to have the input decimator timing.

Further, the present invention is a detector for detecting by performing despread processing on a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value, wherein the spreading code and the multiplexed signal are detected. And a spreading code multiplier that outputs the result as a spreading code multiplication signal, a part of the sample value of the sampled sine wave signal is replaced with zero and multiplied by the spreading code multiplication signal, and the in-phase component of the spreading code multiplication signal An in-phase component extractor that extracts a quadrature component extractor that extracts a quadrature component of the spread code multiplication signal by substituting a part of the sample value of the sampled cosine wave signal with zero and multiplying the spread code multiplication signal, An in-phase component integrator that integrates and outputs the in-phase component extracted by the in-phase component extractor, and a quadrature component that integrates and outputs the quadrature component extracted by the quadrature component extractor. An in-phase component extractor, wherein the in-phase component extractor receives a sample value input to the in-phase component extractor at a timing closest to a timing at which a code of the spreading code changes among sample values of the spreading code multiplication signal. Means for replacing a sample value of the sine wave signal with zero at a timing input to the in-phase component extractor, wherein the quadrature component extractor includes a code of the spreading code among the sample values of the spreading code multiplication signal; And a means for replacing a sample value of the cosine wave signal with zero at a timing when a sample value input to the quadrature component extractor is input to the quadrature component extractor at a timing closest to the changing timing. To do.

In the detector according to the present invention, a code spread multiplexing unit that multiplexes and outputs a plurality of received signals with a spreading code, and samples and outputs an amplitude value of a signal output from the code spread multiplexing unit It is preferable that the receiving apparatus includes a sampling unit that performs despreading on the multiplexed signal output from the sampling unit and detects the multiplexed signal. Further, the present invention provides an array antenna device directivity is determined by a plurality of antennas, and code spreading multiplexing unit for multi-duplicating a plurality of signals received by the plurality of antennas, the code spreading multiplex And a detector for despreading and detecting the multiplexed signal, and the detector includes the detector according to the present invention described above.

  According to the present invention, even if the code spread multiplexed modulation signal is subjected to band limitation due to the characteristics of the analog circuit and the like, even if waveform distortion occurs near the amplitude discontinuity generated at the code change point of the spread code, It is possible to realize a detector that reduces errors.

  FIG. 1 shows a configuration of a first embodiment of a detector according to the present invention. This detector 1 is composed of a detector 2 corresponding to each of a plurality of multiplexed modulation signals, and can be used, for example, in the array antenna detector 1 shown in FIG. Each detector 2 is assigned a spreading code orthogonal to each other, and a spreading code signal, which is a signal representing the spreading code in time series, is supplied from the spreading code generator 12.

  In this configuration, an integrator 24 of the detector 2 shown in FIG. 1 is preceded by a thinning-out device 22 that is means for discarding digital sample data near the code change point of the spread code. The decimation unit 22 obtains the timing at which the sample data is discarded from the spreading code generation means, and performs processing for extracting and discarding sample data that does not contribute to the despreading processing from the sample data in the vicinity of the timing.

  Here, first, an outline of the operation of a single code spread modulation signal and one detector 2 corresponding to the single code spread modulation signal will be described. Actually, a single code spread modulation signal is not transmitted alone, but if the transmission path is linear, the superposition principle holds, and each detector 2 is based on the orthogonality of the codes. Separation and regeneration are possible. Therefore, since the operation of each detector 2 is considered to be the same regardless of whether or not the input signal is multiplexed, even if the operation of the detector 2 is described using a single code spread modulation signal. Generality is not lost.

  2 (c), FIG. 2 (d), FIG. 2 (e) and FIG. 2 (f) are respectively a QPSK modulation signal, a spread code signal, an ideal single code spread modulation signal, and a band-limited single code. An example of a spread modulation signal is shown. Here, the interval of the spread code signal is set to 1 / n of one symbol interval of the QPSK signal. 2A and 2B show a single code spread modulation signal and a spread code signal in a long cycle. Here, the A / D converter 10 performs digital sampling with a fixed clock four times the carrier frequency, and sampling points are indicated by black circles as shown in FIG. White circles indicate sampling points for an ideal signal with no distortion. The spreading code is a signal composed of two symbols of +1 and −1. If one section of the binary symbols is defined as one chip, one chip is composed of four digital samples in the example of FIG. Is done.

  As shown in FIGS. 2 (d) and 2 (f), a large waveform distortion occurs at the amplitude discontinuity point of the code spread signal corresponding to the vicinity of the data change point in the spread code due to band limitation. Yes. As described above, since this waveform distortion becomes an error in digital quadrature detection, if digital sample data near the point corresponding to the code change point of the spread code is discarded and it does not contribute to the despreading process, Baseband data with reduced demodulation error can be obtained. This operation can be realized by adopting a configuration in which the digital sample data in the vicinity of the code change point of the spread code is not added in the integration calculation by the decimation unit 22 placed in front of the integrator 24 of FIG.

  The integrator 24 outputs one sample data of the QPSK baseband signal every time integration is performed in one spread code section. In terms of operation principle, the symbol frequency of the QPSK signal is lower than the digital sample frequency in the A / D converter 10, and in the integration operation, the data input in one spread code section is collectively processed and one sample data is output. Therefore, it is not necessary to input digital sample data at equal time intervals. Therefore, even if a part of the digital sample data is discarded within the integration interval, the waveform of the output symbol data of the QPSK signal is not affected.

  Next, the operation when the code spread multiplexed modulation signal is input to the detector 2 and the details of the operation of each unit will be described. The code spread multiplexed modulation signal is a combination of a plurality of single code spread modulation signals to which different spreading codes are assigned. As described above, since the principle of superposition is established in the transmission path, the operation of each detector 2 is exactly the same as when a single code spread modulation signal assigned to itself is input.

When the code spread multiplexed modulation signal is input, the A / D converter 10 outputs digital sampling data at a sampling interval as shown in FIG. The digital sampling data output from the A / D converter 10 is multiplied by the spreading code by the spreading code multiplier 14 and input to the digital quadrature detector 16. The in-phase component is multiplied by a code sequence (0, −1, 0, 1) (indicated as −sin in FIG. 1 ) by a sine multiplier 18, and a quadrature component is encoded by a cosine multiplier 20. The series (1, 0, −1, 0) ( denoted as cos in FIG. 1) are multiplied to be extracted. Here, since the processing in the spread code multiplier 14, the sine multiplier 18 and the cosine multiplier 20 is a process of multiplying 0, 1 or -1, it is not necessary to actually provide a multiplier, and the code to be multiplied It can be realized by a sign inversion circuit and a switch circuit that operate according to the series.

  The signal processed by the digital quadrature detector 16 is input to the integrator 24. The integrator 24 completes the process of extracting signal components that are not orthogonal from the code spread signal, that is, the despreading process, by adding the signal sequences obtained in the spread code section, and is assigned to each detector 2. Separated baseband signals are played back. Here, the integrator 24 is preceded by a thinning-out unit 22, and the digital sample data corresponding to the vicinity of the code change point in the spread code is discarded, and the summation is performed, so that the data contributes to the despreading process. Never do.

  The decimation unit 22 receives a spread code clock signal from the spread code generator 12. The spread code generation unit 12 is always provided in a system that performs despread processing from a multiplexed spread code, and includes a clock signal generation circuit for generating a spread code signal defined by the system specifications, Means for generating a spreading code sequence defined in (1).

  FIG. 3 shows the configuration of the thinning device 22. The timing detector 26 provided in the decimation unit 22 detects the timing at which the code change point of the spread code signal appears based on the spread code clock signal, and outputs a timing pulse at the detected timing. The timing coincides with the timing at which a discontinuity occurs in the code spread multiplexed modulation signal as shown in FIGS. 2D and 2G, and at least the code of the spread code changes when the digital sample data is discarded. This is performed on the sample data near the timing including the sample data closest to the timing. Based on the timing pulse output from the timing detection unit 26, the discard range determination unit 28 outputs a discard signal that is a signal having a pulse width preset by the user as shown in FIG. In the discard range determination unit 28, an operation is performed in which the time of τ is counted from the fall of the timing pulse and the pulse of the discard signal is raised. If the pulse width is set large, the number of digital sample points to be discarded increases, and detection errors due to waveform distortion can be sufficiently avoided. However, the signal-to-noise ratio (SNR) due to data discarding Therefore, the user needs to determine the pulse width in consideration of such points.

  Upon receiving the discard signal, the changeover switch 30 forcibly sets the data value to zero at the timing of discarding the digital sample data. In the example of FIG. 2, two digital sample data near the sign change point, that is, the discontinuity point, are discarded.

  In the first embodiment, the thinning device 22 is placed in front of the integrator 24 to perform processing for discarding the sample data. That is, the processing is performed in the order of A / D conversion, spreading code multiplication, quadrature detection, data discard, and integration. Separation / reproduction processing by despreading is realized by a combination of multiplication and integration processing of spreading codes, and is therefore independent of data discard processing. The first embodiment can be said to be a form in which data discarding processing is intervened in the process of separation reproduction processing by despreading. Thus, since the data discarding process can be performed independently of the separation / reproduction process, it is not always necessary to perform this process immediately before the integrator 24, and the following embodiments are also conceivable.

  In the second embodiment shown in FIG. 4, the data discarding is performed before the multiplication by the spreading code, and the decimation unit 22 is placed in front of the spreading code multiplier 14.

In the third embodiment shown in FIG. 5, Ru der performs data discarding in digital orthogonal detector 16. As shown in FIG. 5, the code sequence (0, −1, 0, 1) (denoted as −sin in FIG. 5) is input to the sine multiplier 18 via the decimation unit 22, and the code The sequence (1, 0, −1, 0) (denoted as “cos” in FIG. 5) is input to the cosine multiplier 20 via the decimation unit 22.

  The components of the detector 2 in the first to third embodiments described above are configured by digital circuits. The digital circuit outputs the input digital signal as a digital signal after performing arithmetic processing on the binary number represented by the digital signal. The arithmetic processing results in addition, subtraction, digit shift, etc. of the binary number. Is done. The binary arithmetic processing can be configured by hardware in which a switching circuit is associated with each calculation step.

  Further, it can be configured by a DSP (Digital Signal Processor). The DSP is provided with a circuit for performing basic arithmetic processing that operates according to a program created in advance. It has a high-speed multiply-accumulate arithmetic unit composed of a multiplier and an adder / subtracter, and is configured so that various instructions can be executed in one step per instruction in principle. A program is required to operate the DSP, and a program corresponding to the operation of each unit is created by a known technique.

  When the detector 2 is configured by a DSP, for example, it is not necessary to generate a timing pulse output from the timing detection unit 26 in the decimation unit 22, a discard signal output from the discard range determination unit, and the like as actual signals. . However, FIG. 2 (g) and FIG. 2 (h) representing these signals are used as operation timing charts in the design by the DSP. The thinning-out device 22 constituted by the DSP is exactly the same as the case where signals are actually generated at the timings shown in FIGS. 2G and 2H, and each component operates based on this. Arithmetic processing is performed so that the above operation is realized. Here, it has been described that the thinning-out device 22 is configured by a DSP, but even when the other components are configured by a DSP, the arithmetic processing is not performed based on the operation timing chart. Needless to say.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to such embodiment. For example, in the above description, the detection device according to the present invention is applied to the feeding unit of the array antenna device 3 as an example. However, a configuration in which a multi-channel signal is multiplexed and transmitted, and is detected. The present invention can also be applied to other communication systems having the same. Further, although the QPSK system has been taken as the system of the modulation signal to be code spread, it can be applied to other general PSK systems. Thus, the present invention can be implemented in various forms without departing from the scope of the invention.

It is a figure which shows the structure of 1st Embodiment of the detection apparatus which concerns on this invention. It is a figure which shows the signal handled with the detection apparatus which concerns on this invention. It is a figure which shows the structure of a thinning device. It is a figure which shows the structure of 2nd Embodiment of the detection apparatus which concerns on this invention. It is a figure which shows the structure of 3rd Embodiment of the detection apparatus which concerns on this invention. It is a figure which shows the structure of an array antenna apparatus. It is a figure which shows the structure of a detection apparatus. It is a figure which shows a constellation. It is a figure which shows the signal handled with a detection apparatus. It is a figure which shows the constellation in case a code-spread signal receives a frequency band restriction | limiting, and produces waveform distortion.

Explanation of symbols

1 detector, 2 detector, 3 array antenna device, 10 A / D converter, 12 spreading code generator, 14 spreading code multiplier, 16 digital quadrature detector, 18 sine multiplier, 20 cosine multiplier, 22 decimation 24, integrator, 26 timing detection unit, 28 discard range determination unit, 30 changeover switch, 32 antenna, 34 code spread multiplexer, 36 directivity adjuster, 38 analog reception unit.

Claims (11)

A detector that demultiplexes and detects a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value ,
A portion of the sample value before Symbol multiplexed signal performs thinning processing which does not contribute to the despreading processing,
By performing the decimation process on the sample value of the sample point closest to the discontinuous point of the multiplexed signal before being sampled , the waveform distortion component generated in the multiplexed signal due to the presence of the discontinuous point A detector that reduces the contribution to the despreading process . The detector according to claim 1,
The thinning process is
Detecting a code change point of the spreading code, specify the sample value which does not contribute to Kigyaku diffusion process, performs a process which does not contribute to the designated said sample values to said despreading processing before on the basis of the detection result A detector characterized by being performed by a thinning-out device. A detector that demultiplexes and detects a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value ,
A portion of the sample value before Symbol multiplexed signal performs thinning processing which does not contribute to the despreading processing,
The thinning process is performed on the sample value of the sample point closest to the discontinuous point of the multiplexed signal before being sampled ,
The thinning process is
Detecting a code change point of the spreading code, specify the sample value which does not contribute to Kigyaku diffusion process, performs a process which does not contribute to the designated said sample values to said despreading processing before on the basis of the detection result A detector characterized by being performed by a thinning-out device. The detector according to any one of claims 1 to 3, wherein
A spreading code multiplier for multiplying and outputting the multiplexed signal and the spreading code;
An integrator for integrating the signal after being multiplied by the spreading code by the spreading code multiplier;
With
The despreading process is performed by the spreading code multiplier and the integrator . The detector according to claim 4 , wherein
The detector is characterized in that the thinning-out process is performed at an input of the integrator. The detector according to any one of claims 1 to 4 , wherein
The detector is characterized in that the thinning-out process is performed at the input of the detector. A detector that demultiplexes and detects a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value,
A spreading code multiplier that multiplies the spreading code and the multiplexed signal and outputs the result as a spreading code multiplication signal;
An in-phase component extractor for extracting an in-phase component of the spread code multiplication signal;
An orthogonal component extractor for extracting an orthogonal component of the spread code multiplication signal;
A common-mode component decimation device that outputs a part of the sample value of the common-mode component as a thinned-out common-mode component by replacing it with zero;
A quadrature component decimator that replaces some of the sample values of the quadrature component with zero and outputs as a decimation quadrature component;
An in-phase component integrator that integrates and outputs the decimation in-phase component;
An orthogonal component integrator that integrates and outputs the thinned orthogonal component;
With
The in-phase component thinning device is
Means for replacing a sample value input to the in-phase component decimation device with zero at a timing closest to a timing at which a code of the spreading code changes among sample values of the in-phase component;
The orthogonal component decimator is
A detector comprising: a means for replacing a sample value input to the orthogonal component decimation unit at a timing closest to a timing at which a code of the spreading code changes among sample values of the orthogonal component with zero. A detector that demultiplexes and detects a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value,
An input decimation device that replaces a part of the sample value of the multiplexed signal with zero and outputs it as a decimation multiplexed signal;
A spreading code multiplier for multiplying the demultiplexed multiplexed signal and the spreading code and outputting as a decimation spreading code multiplied signal;
An in-phase component extractor for extracting an in-phase component of the decimation spread code multiplication signal;
An orthogonal component extractor for extracting an orthogonal component of the decimation spread code multiplication signal;
An in-phase component integrator for integrating and outputting the in-phase component;
An orthogonal component integrator that integrates and outputs the orthogonal component;
With
The input decimation unit is
A detector comprising: a means for replacing a sample value input to the input decimation unit at a timing closest to a timing at which a code of the spreading code changes among sample values of the multiplexed signal. A detector that demultiplexes and detects a multiplexed signal that is multiplexed by a spreading code and input as a sample value obtained by sampling an amplitude value,
A spreading code multiplier that multiplies the spreading code and the multiplexed signal and outputs the result as a spreading code multiplication signal;
A part of the sample value of the sampled sine wave signal is replaced with zero and multiplied by the spreading code multiplication signal, and an in-phase component extractor for extracting the in-phase component of the spreading code multiplication signal;
A quadrature component extractor for substituting a part of the sample value of the sampled cosine wave signal with zero and multiplying the spread code multiplied signal to extract the quadrature component of the spread code multiplied signal;
An in-phase component integrator that integrates and outputs the in-phase component extracted by the in-phase component extractor;
An orthogonal component integrator that integrates and outputs the orthogonal component extracted by the orthogonal component extractor;
With
The in-phase component extractor is
Of the sample values of the spread code multiplication signal, the sample value input to the in-phase component extractor at the timing closest to the timing at which the code of the spread code changes is input to the in-phase component extractor, and the sine Means for replacing the sample value of the wave signal with zero,
The orthogonal component extractor is
The cosine is a timing at which a sample value input to the orthogonal component extractor is input to the orthogonal component extractor at a timing closest to a timing at which the code of the spread code changes among sample values of the spread code multiplication signal. A detector comprising means for replacing a sample value of a wave signal with zero. The detector according to any one of claims 1 to 9, wherein
A receiving apparatus including: a code spreading multiplexing unit that multiplexes and outputs a plurality of received signals with a spreading code; and a sampling unit that samples and outputs an amplitude value of a signal output from the code spreading multiplexing unit. Provided,
A detector that demultiplexes and outputs a multiplexed signal output from the sampling unit. An array antenna apparatus in which directivity is determined by a plurality of antennas,
A code spreading multiplexing unit for multi-duplicating a plurality of signals received by the plurality of antennas,
A detector for despreading and detecting the signal multiplexed by the code spread multiplexer;
10. The array antenna apparatus according to claim 1, wherein the detector includes the detector according to any one of claims 1 to 9 .

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